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175 lines
5.9 KiB
C
175 lines
5.9 KiB
C
/*
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File: HALc96GC.c
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Contains: Grand Central SCSI HBA
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Written by: Craig Prouse
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Copyright: © 1993-1994 by Apple Computer, Inc., all rights reserved.
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Change History (most recent first):
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<SM2> 1/12/94 chp Comment out pipeline mode initialization.
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<SMG2> 10/26/93 chp Remove ATI bringup hack.
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*/
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#include "SIMCorePriv.h"
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#include "HALc96.h"
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// Should match MIN_AMIC_DMA_SIZE in order to reuse Setup/Teardown routines.
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#define MIN_GC_DMA_SIZE 0x0200
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/* ……………………………………………………………………………………………………………………………………………………………………………………………………………………
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InitHW_GC:
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Vestigial.
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……………………………………………………………………………………………………………………………………………………………………………………………………………………
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*/
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OSErr InitHW_GC (HALc96Globals *HALg)
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{
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#pragma unused (HALg)
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// Grand Central doesn’t require any particular channel hardware initialization.
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/*
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* It is assumed that HammerHead is previously programmed to allow the system
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* to run in pipeline mode. During bringup, this programming was effected here.
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* Pipeline mode is now enabled by TNT HardwareInit, before the emulator runs.
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*/
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// *(unsigned long *) 0xF80001D0 = 0x04000000; /* ChipExpress HammerHead */
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// *(unsigned long *) 0xF8000090 = 0x04000000; /* TI HammerHead */
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return noErr;
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}
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/* ……………………………………………………………………………………………………………………………………………………………………………………………………………………
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InitSW_GC:
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Allocate memory for double-buffered DMA and the DB-DMA Channel Command List.
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Both structures are contiguously locked physical buffers. They are allocated
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together on a page boundary and extend for an integral number of whole pages
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in order to avoid any other data structures sharing the same physical pages.
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*** WARNING: The following code is page-size dependent and hard codes both
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the page size of the machine and the DMA buffer size. While
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not strictly kosher, this is consistent with other DMA HBAs.
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……………………………………………………………………………………………………………………………………………………………………………………………………………………
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*/
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OSErr InitSW_GC (HALc96Globals *HALg)
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{
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OSErr err;
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Ptr memStart;
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void * pageStart;
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unsigned long needSize, peCount;
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const unsigned long pageSize = 4096;
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const unsigned long bufferSize = 1 * pageSize; // must be a multiple of pageSize
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const unsigned long cclSize = 1 * pageSize; // must be a multiple of pageSize
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LogicalToPhysicalTable mappingTable;
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// Allocate a block with some extra slop for page alignment.
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needSize = bufferSize + cclSize;
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memStart = NewPtrSys(needSize + pageSize);
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if (memStart == nil) {
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err = MemError();
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goto failNewPtrSys;
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}
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// Calculate the first page boundary within the allocated block.
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// Scale back the allocation as much as possible.
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pageStart = (void *) ((unsigned long) memStart + (pageSize - 1) & ~(pageSize - 1));
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SetPtrSize(memStart, needSize + ((unsigned long) pageStart - (unsigned long) memStart));
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// Lock the buffers contiguously with respect to VM and calculate physical addresses.
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err = LockMemoryContiguous(pageStart, needSize);
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if (err)
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goto failLockMemoryContiguous;
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peCount = 1;
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mappingTable.logical.address = pageStart;
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mappingTable.logical.count = needSize;
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err = GetPhysical(&mappingTable, &peCount);
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if (err)
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goto failGetPhysical;
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// Record buffer addresses (logical and physical) in the HAL globals.
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HALg->physicalCopyBuffer = mappingTable.physical[0].address;
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HALg->logicalCopyBuffer = pageStart;
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HALg->cclPhysicalAddr = HALg->physicalCopyBuffer + bufferSize;
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HALg->cclLogicalAddr = (Ptr) ((unsigned long) pageStart + bufferSize);
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HALg->minDMAsize = MIN_GC_DMA_SIZE;
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return noErr;
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// Failure handlers:
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failGetPhysical:
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UnlockMemory(pageStart, needSize);
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failLockMemoryContiguous:
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DisposePtr(memStart);
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failNewPtrSys:
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return err;
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}
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/* ……………………………………………………………………………………………………………………………………………………………………………………………………………………
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SetupIOGC:
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Inspection shows that the PSC and AMIC versions of this routine are nearly
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identical. No major changes are yet required for TNT. Rather than copy and
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paste (again), just call the existing version.
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Some minor changes may be required eventually. But perhaps these would best
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be implemented by adding double buffer criteria to the HwDesc table rather
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than hard coding them. Many HBAs could share the bulk of this routine.
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……………………………………………………………………………………………………………………………………………………………………………………………………………………
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*/
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void SetupIOGC (SIM_IO *ioPtr)
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{
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extern void SetupIOAMIC (SIM_IO *ioPtr);
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SetupIOAMIC(ioPtr);
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}
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/* ……………………………………………………………………………………………………………………………………………………………………………………………………………………
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TeardownIOGC:
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See the notes on SetupIOGC above.
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……………………………………………………………………………………………………………………………………………………………………………………………………………………
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*/
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void TeardownIOGC (SIM_IO *ioPtr, HALc96Globals *HALg)
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{
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extern void TeardownIOAMIC (SIM_IO *ioPtr, HALc96Globals *HALg);
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TeardownIOAMIC(ioPtr, HALg);
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}
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