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597 lines
25 KiB
Plaintext
597 lines
25 KiB
Plaintext
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;_______________________________________________________________________
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;
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; File: SlotInterrupts.a
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;
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; Contains: This file contains the core routines pertaining to the slot interrupt
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; queue manager as well as some table initialization routines called
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; at startup time. Slot interrupts are handled by the slot interrupt
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; dispatcher which finds the interrupting slot and then looks through
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; the slot's interrupt queue for an interrupt routine to call.
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;
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; SIntINSTALL installs a routine into the slot interrupt queue poll list
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; while SIntREMOVE removes it. There is one queue per slot, with a system
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; heap table of ptrs pointing to the head of each queue. A low mem variable,
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; SlotQDT, points to the system heap table.
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;
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; Written by: Rich Castro 22-July-86
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; Rewritten by: Gary Davidian 16-April-89
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;
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; Copyright: © 1986-1993 by Apple Computer, Inc., all rights reserved.
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;
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; Change History (most recent first):
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;
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; <SM12> 11/9/93 KW added some eieioSTP macros. Only expands for CygnusX1 ROM
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; <SM11> 10/6/93 RC Added forPDMProto to build conditional of the interrupt line
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; hack
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; <SM10> 9/10/93 RC Added check fo BART1 to the below hack, so this would only
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; happen on EVT1 Cold Fusions
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; <SM9> 9/3/93 GMR Added a hack for Cold Fusion EVT1 units to fix the slot ID's
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; being wired incorrectly.
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; <SM8> 8/2/93 GMR Added hack for EVT1/2 PDM machines which swaps the slot
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; interrupt lines for those boards.
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; <SM7> 10/18/92 CCH Added a nop to support non-serialized IO space.
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; <SM6> 8/24/92 PN Take out CycloneboxEVT1 stuff
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; <SM5> 6/30/92 kc Rename EclipseVia2SlotInt to DAFBVia2SlotInt. Move SlotInterrupt
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; handlers from InterruptHandlers.a.
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; <SM4> 5/16/92 kc Roll in Horror changes. Comments follow:
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; <H2> 2/14/92 JC Export RunSlotHandlers for use by Sonora Level 3 interrupt for
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; Sonic Ethernet
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; <9> 5/4/92 JSM Roll-in change from SuperMario: Changed the mask value used for
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; Interrupts on Quadra900.
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; <8> 5/4/92 JSM Get rid of conditionals: this file is only used in ROM builds,
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; so Cpu is always ≥ 020, hasMac2Via2, hasEclipseVia2, hasRBV, and
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; hasOSS are always true.
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; <7> 9/16/91 JSM Cleanup header.
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; <6> 6/12/91 LN removed #include 'HardwareEqu.a'
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; <5> 9/19/90 BG Removed <4>. 040s are behaving more reliably now.
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; <4> 7/20/90 BG Added EclipseNOPs to handle flakey 040s.
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; <3> 2/19/90 BG Add Eclipse VIA2 support to SlotMgr.
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; <2> 1/11/90 CCH Added include of “HardwarePrivateEqu.a”.
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; <1.4> 8/7/89 GGD Roll in patch to change SIntInstall to handle equal priorities
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; the same as the Mac II, Most recently installed is run sooner.
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; <1.3> 4/16/89 GGD Completely re-written and faster, uses new internal data
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; structures, supports all 15 slots, removed slot priority
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; (priority within a slot is still used). Made more universal.
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; <1.2> 3/6/89 GGD Moved SlotInt from InterruptHandlers.a to SlotInterrupts.a.
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; Modified to use feature based conditionals. Changed RBV register
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; usage now that equates are offsets from RBVBase, instead of
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; being absolute addresses.
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; <1.1> 11/10/88 CCH Fixed Header.
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; <1.0> 11/9/88 CCH Adding to EASE.
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; <1.5> 10/24/88 djw Modified InitSPTbl and InitSDTbl to alloc space for all
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; supported slots.
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; <•1.4> 9/23/88 CCH Got rid of inc.sum.d and empty nFiles
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; <1.3> 7/6/88 BBM Changed sqHeadSize back to sqHDSize
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; <1.2> 2/16/88 BBM Changed sqHDSize to sqHeadSize
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; <1.1> 2/15/88 BBM modified for mpw 3.0 equates
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; <1.0> 2/10/88 BBM Adding file for the first time into EASE…
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; <C914> 10/8/87 rwh Changed 'Via2IntMask' to 'SlotIntMask' to make it more general
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; for Modern Victorian.
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; <C665> 1/22/87 RDC Code review cleanup changes
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; <C582> 1/2/87 RDC Misc cleanup
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; <C556> 12/19/86 FJL Changed NumSlots to sNumSlots for GWN.
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; <C422> 11/18/86 RDC Added check of queue type in all routines
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; <C328> 11/2/86 RDC Added copyright notice
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; <C224> 10/15/86 RDC Return Dequeue error code from SIntRemove Added error checking
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; for valid slot #
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; <C166> 10/11/86 RDC Substantially rewrote SIntInstall to include priority handling
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; of slot interrupt queue elements
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; <C147> 10/10/86 RDC Added init routines for slot priority and interrupt dispatch
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; tables
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; <C206> 10/9/86 bbm Modified to mpw aincludes.
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;
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print off
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LOAD 'StandardEqu.d'
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INCLUDE 'HardwarePrivateEqu.a'
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INCLUDE 'SlotMgrEqu.a'
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INCLUDE 'UniversalEqu.a'
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print on
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print nomdir
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machine mc68020
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SIntCORE PROC EXPORT
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WITH SlotIntQElement,slotIntGlobals
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EXPORT InitSPTbl,InitSDTbl
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EXPORT SIntINSTALL,SIntREMOVE,DAFBVia2SlotInt,PSCVIA2SlotInt,NiagraVIA2SlotInt
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EXPORT SlotInt,SlotIntCommon,Via2SlotInt,RbvSlotInt,OssSlotInt
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EXPORT RunSlotHandlers ; accessed by level 3 Sonic Interrupt on <H2>
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; Sonora based systems
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;_______________________________________________________________________
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;
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; Routine: GetSlotIntQHead
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;
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; Arguments: D0 (input) : video card slot ($0..$E possible)
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; D0 (output): error code
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; A1 (output): address of pointer to first SlotIntQElement
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;
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; Function: Utility routine to do check for valid slot number, and return
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; the address of the associated slot slotIntInfo record.
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; If the queue type is wrong, or the slot number is out of range,
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; an error code will be returned, and the routine will return to
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; the callers caller, instead of directly to the caller.
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;
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; Called by: SIntInstall, SIntRemove
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;
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; Registers Used: D0,A1
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;_______________________________________________________________________
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GetSlotIntQHead
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cmpi.w #SIQType,SQType(A0) ; is it the proper type?
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bne.s @wrongType ; if not, report the error
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ext.w d0 ; ignore high byte
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cmpi.w #sLastSlot,d0 ; check for valid slot #
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bgt.s @slotTooBig ; return error if too big
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lea ([SlotQDT],d0.w*4,slotIntQHeads-SQLink),a1 ; get address of queue header
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rts ; return with success
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@wrongType moveq.l #VTypErr,d0 ; queue element type is wrong
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bra.s @error ; report the error
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@slotTooBig move.w #smSlotOOBErr,d0 ; return with slot # error
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@error addq.w #4,sp ; pop the return address
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rts ; return to callers caller
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;_______________________________________________________________________
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;
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; Routine: SIntINSTALL
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;
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; Arguments: D0 (input) : slot number for routine ($0..$E possible)
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; A0 (input) : ptr to queue element
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; D0 (output): error code - 0 no error
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;
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; Function: Installs a slot interrupt poll routine which is called when
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; a slot interrupt occurs. The queue element is installed in
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; in priority order, $FF highest (first), $00 lowest (last).
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;
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; When elements with EQUAL priorities exist, the most recently
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; installed one is run sooner.
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;
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; Only low byte of priority word is used (0-255 range).
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; Priorities 200-255 are reserved by Apple.]
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;
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; The Mac II used to maintain priority across slots, which was
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; used when multiple slots interrupted AT THE SAME TIME.
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; We no longer support this, and prioritize by slot number instead.
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; This will be removed from the Mac II in system 7.0
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;
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; The Mac II had a bug in SIntInstall, which had $FF as the highest
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; priority across slots, but had $FF as the lowest within a slot.
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; Most cards used the priority order as documented, ($FF highest), so
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; we will retain that ordering.
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; This will be fixed in the Mac II in System 7.0.
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;
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; Registers Used: D0,D1,D2,A0,A1
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;_______________________________________________________________________
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SIntINSTALL bsr.s GetSlotIntQHead ; a1 := pointer to qheader
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move.b SQPrio+1(a0),d0 ; get the priority (low byte of word)
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move.w sr,-(sp) ; save interrupt level
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ori.w #HiIntMask,sr ; disable interrupts
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@PrioritySearch
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move.l SQLink(a1),d1 ; get next queue element to check
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beq.s @insert ; if end of list, insert before this
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exg.l a1,d1 ; swap previous and current pointers
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cmp.b SQPrio+1(a1),d0 ; compare priorities
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blo.s @PrioritySearch ; loop until lower priority found <1.4>
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; if equal, insert newer in front of older <1.4>
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exg.l d1,a1 ; a1 points to previous, d1 points to current
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@insert ; insert before the lower priority element
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move.l d1,SQLink(a0) ; remainder of queue goes after new element
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move.l a0,SQLink(a1) ; new element goes after previous element
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move.w (sp)+,sr ; restore interrupt level
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moveq.l #noErr,d0 ; return success
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rts ; all done
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;_______________________________________________________________________
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;
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; Routine: SIntREMOVE
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;
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; Arguments: D0 (input) : slot number for routine ($0..$E possible)
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; A0 (input) : ptr to queue element to remove
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; D0 (output): error code - 0 = no error
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;
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; Function: Removes a poll routine from the slot interrupt queue.
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;
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; Registers Used: D0,D1,A1
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;
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;_______________________________________________________________________
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SIntREMOVE bsr.s GetSlotIntQHead ; a1 := pointer to qheader
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moveq.l #qErr,d0 ; error code in case it's not found
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move.w sr,-(sp) ; save interrupt level
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ori.w #HiIntMask,sr ; disable interrupts
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@search move.l SQLink(a1),d1 ; get next queue element to check
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beq.s @notFound ; if end of list, nothing to remove
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exg.l a1,d1 ; swap previous and current pointers
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cmpa.l a0,a1 ; see if this is the one to remove
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bne.s @search ; loop until removee is fount
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movea.l d1,a1 ; a1 points to previous
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move.l SQLink(a0),SQLink(a1) ; remainder of queue goes after previous element
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moveq.l #noErr,d0 ; return success
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@notFound move.w (sp)+,sr ; restore interrupt level
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rts ; all done
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;_______________________________________________________________
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;
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; Secondary Dispatch routines for slot interrupts
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;
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; On Entry: A1.L = VIA2/RBV/OSS base address
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; D0-D3/A0-A3 have been saved
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;
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;____________________________________________________________________________
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SlotInt
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PSCVIA2SlotInt
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MoveQ #~$78, D0 ; mask for slot bits (active low)
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; (slots c,d,e, onboard video vbl)
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Or.b PSCVIA2SInt(a1), D0 ; read and mask slot interrupt indicators
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Not.l D0 ; convert to active high bit mask
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Bne.l SlotIntCommon ; if interrupt pending, service it
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Rts ; if not, return from interrupt <SM4> rb, end
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DAFBVia2SlotInt
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move.b #$02,vIFR(a1) ; reset the VIA any slot interrupt flag <3>
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if nonSerializedIO then
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nop ; force write to complete <SM7>
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endif
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moveq.l #~$7F,d0 ; mask for slot bits (active low) (5 slots+Enet+Video) <3> <9>
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or.b vBufA(a1),d0 ; read and mask slot interrupt indicators <3>
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not.l d0 ; convert to active high bit mask <3>
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bne SlotIntCommon ; if interrupt pending, service it <3>
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rts ; if not, return from interrupt <3>
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; ••• These need moved (into HardwarePrivateEqu.a?) •••
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AIV3Base EQU $FEE00000 ; base address of AIV3 (Apple Integrated VIA 3)
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AIV3SlotInt EQU $0002
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VBLIRQ EQU 6
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AIV3Int EQU $0003
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AnySlot EQU 1
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NiagraVIA2SlotInt
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move.b #$02,vIFR(a1) ; reset the VIA any slot interrupt flag
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lea AIV3Base,a0 ; get base address
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btst #AnySlot,AIV3Int(a0) ; any of our slots interrupting?
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beq.s @notOurs ; no, exit
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moveq #0,D0 ; clear the register
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btst #VBLIRQ,AIV3SlotInt(a0) ; check for VSC interrupt pending
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bne.s @notOurs ; IF VBLIRQ pending THEN
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ori.b #%00100000,D0 ; set slot E interrupt flag
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bra SlotIntCommon
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@notOurs
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rts ; if not, return from interrupt <SM6> rb, end
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Via2SlotInt
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eieioSTP
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move.b #$02,vIFR(a1) ; reset the VIA any slot interrupt flag
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eieioSTP
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moveq.l #~$3F,d0 ; mask for slot bits (active low)
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eieioSTP
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or.b vBufA(a1),d0 ; read and mask slot interrupt indicators
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not.l d0 ; convert to active high bit mask
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eieioSTP
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bne SlotIntCommon ; if interrupt pending, service it
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rts ; if not, return from the interrupt
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RbvSlotInt
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eieioSTP
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move.b #$82,RvIFR(a1) ; reset the RBV any slot interrupt flag
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eieioSTP
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moveq.l #~$7F,d0 ; mask for slot bits (active low)
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eieioSTP
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or.b RvSInt(a1),d0 ; get slot interrupt indicators
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eieioSTP
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not.l d0 ; convert to active high bit mask
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;•••••••••••• <SM8>
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; for PDM's with EVT1/2 boards, we need a small hack to swap the
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; slot interrupt lines, since they're reversed on the logic board.
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; AMIC versions >= 3 are used on EVT3 and greater boards, so
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; we'll check for it and avoid the hack if it's present. Remove this hack
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; when we no longer need to support EVT1/2 boards.
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IF hasHMC AND forPDMProto THEN ; <sm11>
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TestFor AMICExists ; do we have an AMIC?
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beq.s @hackDone ; no, skip the hack
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btst.b #2,RvSEnb(a1) ; see if bit 2 is enabled (set)
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bne.s @chkCF1 ; yes, we have a new AMIC (>=3), see if CF EVT1
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move.b #$84,RvSEnb(a1) ; try setting bit 2
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btst.b #2,RvSEnb(a1) ; did it set?
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beq.s @doPDMHack ; no, must be AMIC1/2 (EVT1/2)
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move.b #$04,RvSEnb(a1) ; else, restore it
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bra.s @hackDone ; and skip the hack
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@chkCF1 lea $5ffffffe,a0 ; get CPU ID reg <SM9>
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move.b (a0)+,d1 ; <SM9>
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cmpi.b #$30,d1 ; are we a CF EVT1? <SM9>
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bne.s @hackDone ; no, exit <SM9>
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move.b (a0),d1 ; <SM9>
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cmpi.b #$13,d1 ; check 2nd byte of id <SM9>
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bne.s @hackDone ; not CF, no hack <SM9>
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lea $F0000008, a0 ; get Bart ID Register <SM10>
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move.l (a0), d1 ; <SM10>
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cmp.l #$43184000, d1 ; is this the first rev of Bart <SM10>
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bne.s @hackDone ; new bart, so don't do hack <SM10>
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move.b d0,d1 ; yes get interrupt bits <SM9>
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andi.b #%00001100,d1 ; get slot int bits ..CB (we loose slot E) <SM9>
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lsl.b #1,d1 ; map over into .DC. <SM9>
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andi.b #%11100011,d0 ; keep VBL & slot E (VDS) bits <SM9>
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or.b d1,d0 ; 'or' slots C,D into other bits <SM9>
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bra.s @hackDone ; and continue processing <SM9>
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@doPDMHack andi.w #$78,d0
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|||
|
lsr.w #3,d0
|
|||
|
move.b @swapTbl(d0.w),d0
|
|||
|
lsl.w #3,d0
|
|||
|
@hackDone
|
|||
|
ENDIF
|
|||
|
;•••••••••••• <SM8>
|
|||
|
|
|||
|
and.b RvSEnb(a1),d0 ; only look at enabled ones
|
|||
|
bne.s SlotIntCommon ; if interrupt pending, service it
|
|||
|
rts ; if not, return from the interrupt
|
|||
|
|
|||
|
IF hasHMC THEN ; <SM8>
|
|||
|
@swapTbl dc.b $00 ; 0000
|
|||
|
dc.b $04 ; 0001
|
|||
|
dc.b $02 ; 0010
|
|||
|
dc.b $06 ; 0011
|
|||
|
dc.b $01 ; 0100
|
|||
|
dc.b $05 ; 0101
|
|||
|
dc.b $03 ; 0110
|
|||
|
dc.b $07 ; 0111
|
|||
|
|
|||
|
dc.b $08 ; 1000
|
|||
|
dc.b $0c ; 1001
|
|||
|
dc.b $0a ; 1010
|
|||
|
dc.b $0e ; 1011
|
|||
|
dc.b $09 ; 1100
|
|||
|
dc.b $0d ; 1101
|
|||
|
dc.b $0b ; 1110
|
|||
|
dc.b $0f ; 1111
|
|||
|
ENDIF
|
|||
|
|
|||
|
|
|||
|
OssSlotInt
|
|||
|
moveq.l #$3F,d0 ; mask for slot bits (active high)
|
|||
|
and.b OSSIntStat+1(a1),d0 ; get slot interrupt indicators
|
|||
|
bne.s SlotIntCommon ; if interrupt pending, service it
|
|||
|
rts ; if not, return from the interrupt
|
|||
|
|
|||
|
SlotIntCommon
|
|||
|
subq.l #4,sp ; allocate a long (only a byte is used)
|
|||
|
move.b d0,(sp) ; save the interrupt pending bit mask
|
|||
|
|
|||
|
@loop move.b SlotPriority(d0.w),d0 ; get slot number / bit number
|
|||
|
bclr.b d0,(sp) ; clear the bit
|
|||
|
lsr.b #4,d0 ; get the slot number
|
|||
|
bsr.s RunSlotHandlers ; run the handlers for this slot
|
|||
|
bne.s @noHandler ; if couldn't be serviced, die with sys error
|
|||
|
move.b (sp),d0 ; see if any other slots were pending
|
|||
|
bne.s @loop ; loop until all slots serviced
|
|||
|
|
|||
|
addq.l #4,sp ; pop the pending bits
|
|||
|
|
|||
|
; Because AnySlot is edge triggered on some machines, we must make sure that all
|
|||
|
; slot interrupts go away, causing AnySlot to go away, so that the next slot interrupt
|
|||
|
; will cause an edge transition on AnySlot. We loop back to be start of the handler
|
|||
|
; to see if any slot interrupts occurred since we last checked, and only exit when they
|
|||
|
; all go away.
|
|||
|
|
|||
|
movea.l VIA2RBVOSS,a1 ; get base address of chip with slot int reg
|
|||
|
movea.l Via2DT+4*ifCA1,a0 ; get the handler address
|
|||
|
eieioSTP
|
|||
|
jmp (a0) ; loop until no slots interrupting
|
|||
|
|
|||
|
@noHandler _SysError ; no handler for slot interrupt
|
|||
|
|
|||
|
|
|||
|
RunSlotHandlers
|
|||
|
lea ([SlotQDT],d0.w*4,slotIntQHeads-SQLink),a1 ; get address of queue header
|
|||
|
@RunNext move.l SQLink(a1),d0 ; get next queue element
|
|||
|
beq.s @notFound ; if end of queue reached, return error
|
|||
|
movea.l d0,a1 ; setup queue element pointer
|
|||
|
move.l a1,-(sp) ; save queue element pointer
|
|||
|
movea.l SQAddr(a1),a0 ; get poll routine address
|
|||
|
movea.l SQParm(a1),a1 ; stuff optional A1 param
|
|||
|
jsr (a0) ; call the handler
|
|||
|
movea.l (sp)+,a1 ; restore the queue element pointer
|
|||
|
tst.w d0 ; see if the int was serviced
|
|||
|
beq.s @RunNext ; if not, try the next handler
|
|||
|
moveq.l #noErr,d0 ; if handled, return with success
|
|||
|
rts ; all done
|
|||
|
|
|||
|
@notFound moveq.l #dsBadSlotInt,d0 ; return with an error if no handler
|
|||
|
rts ; all done
|
|||
|
|
|||
|
|
|||
|
SlotPriority
|
|||
|
dc.b $00 ; 0 0 0 0 0 0 0 0 - no interrupt
|
|||
|
dc.b $90 ; 0 0 0 0 0 0 0 1 - Slot 9 (bit 0)
|
|||
|
dc.b $A1 ; 0 0 0 0 0 0 1 0 - Slot A (bit 1)
|
|||
|
dc.b $90 ; 0 0 0 0 0 0 1 1 - Slot 9 (bit 0)
|
|||
|
dc.b $B2 ; 0 0 0 0 0 1 0 0 - Slot B (bit 2)
|
|||
|
dc.b $90 ; 0 0 0 0 0 1 0 1 - Slot 9 (bit 0)
|
|||
|
dc.b $A1 ; 0 0 0 0 0 1 1 0 - Slot A (bit 1)
|
|||
|
dc.b $90 ; 0 0 0 0 0 1 1 1 - Slot 9 (bit 0)
|
|||
|
dc.b $C3 ; 0 0 0 0 1 0 0 0 - Slot C (bit 3)
|
|||
|
dc.b $90 ; 0 0 0 0 1 0 0 1 - Slot 9 (bit 0)
|
|||
|
dc.b $A1 ; 0 0 0 0 1 0 1 0 - Slot A (bit 1)
|
|||
|
dc.b $90 ; 0 0 0 0 1 0 1 1 - Slot 9 (bit 0)
|
|||
|
dc.b $B2 ; 0 0 0 0 1 1 0 0 - Slot B (bit 2)
|
|||
|
dc.b $90 ; 0 0 0 0 1 1 0 1 - Slot 9 (bit 0)
|
|||
|
dc.b $A1 ; 0 0 0 0 1 1 1 0 - Slot A (bit 1)
|
|||
|
dc.b $90 ; 0 0 0 0 1 1 1 1 - Slot 9 (bit 0)
|
|||
|
dc.b $D4 ; 0 0 0 1 0 0 0 0 - Slot D (bit 4)
|
|||
|
dc.b $90 ; 0 0 0 1 0 0 0 1 - Slot 9 (bit 0)
|
|||
|
dc.b $A1 ; 0 0 0 1 0 0 1 0 - Slot A (bit 1)
|
|||
|
dc.b $90 ; 0 0 0 1 0 0 1 1 - Slot 9 (bit 0)
|
|||
|
dc.b $B2 ; 0 0 0 1 0 1 0 0 - Slot B (bit 2)
|
|||
|
dc.b $90 ; 0 0 0 1 0 1 0 1 - Slot 9 (bit 0)
|
|||
|
dc.b $A1 ; 0 0 0 1 0 1 1 0 - Slot A (bit 1)
|
|||
|
dc.b $90 ; 0 0 0 1 0 1 1 1 - Slot 9 (bit 0)
|
|||
|
dc.b $C3 ; 0 0 0 1 1 0 0 0 - Slot C (bit 3)
|
|||
|
dc.b $90 ; 0 0 0 1 1 0 0 1 - Slot 9 (bit 0)
|
|||
|
dc.b $A1 ; 0 0 0 1 1 0 1 0 - Slot A (bit 1)
|
|||
|
dc.b $90 ; 0 0 0 1 1 0 1 1 - Slot 9 (bit 0)
|
|||
|
dc.b $B2 ; 0 0 0 1 1 1 0 0 - Slot B (bit 2)
|
|||
|
dc.b $90 ; 0 0 0 1 1 1 0 1 - Slot 9 (bit 0)
|
|||
|
dc.b $A1 ; 0 0 0 1 1 1 1 0 - Slot A (bit 1)
|
|||
|
dc.b $90 ; 0 0 0 1 1 1 1 1 - Slot 9 (bit 0)
|
|||
|
dc.b $E5 ; 0 0 1 0 0 0 0 0 - Slot E (bit 5)
|
|||
|
dc.b $90 ; 0 0 1 0 0 0 0 1 - Slot 9 (bit 0)
|
|||
|
dc.b $A1 ; 0 0 1 0 0 0 1 0 - Slot A (bit 1)
|
|||
|
dc.b $90 ; 0 0 1 0 0 0 1 1 - Slot 9 (bit 0)
|
|||
|
dc.b $B2 ; 0 0 1 0 0 1 0 0 - Slot B (bit 2)
|
|||
|
dc.b $90 ; 0 0 1 0 0 1 0 1 - Slot 9 (bit 0)
|
|||
|
dc.b $A1 ; 0 0 1 0 0 1 1 0 - Slot A (bit 1)
|
|||
|
dc.b $90 ; 0 0 1 0 0 1 1 1 - Slot 9 (bit 0)
|
|||
|
dc.b $C3 ; 0 0 1 0 1 0 0 0 - Slot C (bit 3)
|
|||
|
dc.b $90 ; 0 0 1 0 1 0 0 1 - Slot 9 (bit 0)
|
|||
|
dc.b $A1 ; 0 0 1 0 1 0 1 0 - Slot A (bit 1)
|
|||
|
dc.b $90 ; 0 0 1 0 1 0 1 1 - Slot 9 (bit 0)
|
|||
|
dc.b $B2 ; 0 0 1 0 1 1 0 0 - Slot B (bit 2)
|
|||
|
dc.b $90 ; 0 0 1 0 1 1 0 1 - Slot 9 (bit 0)
|
|||
|
dc.b $A1 ; 0 0 1 0 1 1 1 0 - Slot A (bit 1)
|
|||
|
dc.b $90 ; 0 0 1 0 1 1 1 1 - Slot 9 (bit 0)
|
|||
|
dc.b $D4 ; 0 0 1 1 0 0 0 0 - Slot D (bit 4)
|
|||
|
dc.b $90 ; 0 0 1 1 0 0 0 1 - Slot 9 (bit 0)
|
|||
|
dc.b $A1 ; 0 0 1 1 0 0 1 0 - Slot A (bit 1)
|
|||
|
dc.b $90 ; 0 0 1 1 0 0 1 1 - Slot 9 (bit 0)
|
|||
|
dc.b $B2 ; 0 0 1 1 0 1 0 0 - Slot B (bit 2)
|
|||
|
dc.b $90 ; 0 0 1 1 0 1 0 1 - Slot 9 (bit 0)
|
|||
|
dc.b $A1 ; 0 0 1 1 0 1 1 0 - Slot A (bit 1)
|
|||
|
dc.b $90 ; 0 0 1 1 0 1 1 1 - Slot 9 (bit 0)
|
|||
|
dc.b $C3 ; 0 0 1 1 1 0 0 0 - Slot C (bit 3)
|
|||
|
dc.b $90 ; 0 0 1 1 1 0 0 1 - Slot 9 (bit 0)
|
|||
|
dc.b $A1 ; 0 0 1 1 1 0 1 0 - Slot A (bit 1)
|
|||
|
dc.b $90 ; 0 0 1 1 1 0 1 1 - Slot 9 (bit 0)
|
|||
|
dc.b $B2 ; 0 0 1 1 1 1 0 0 - Slot B (bit 2)
|
|||
|
dc.b $90 ; 0 0 1 1 1 1 0 1 - Slot 9 (bit 0)
|
|||
|
dc.b $A1 ; 0 0 1 1 1 1 1 0 - Slot A (bit 1)
|
|||
|
dc.b $90 ; 0 0 1 1 1 1 1 1 - Slot 9 (bit 0)
|
|||
|
dc.b $06 ; 0 1 0 0 0 0 0 0 - Slot 0 (bit 6)
|
|||
|
dc.b $90 ; 0 1 0 0 0 0 0 1 - Slot 9 (bit 0)
|
|||
|
dc.b $A1 ; 0 1 0 0 0 0 1 0 - Slot A (bit 1)
|
|||
|
dc.b $90 ; 0 1 0 0 0 0 1 1 - Slot 9 (bit 0)
|
|||
|
dc.b $B2 ; 0 1 0 0 0 1 0 0 - Slot B (bit 2)
|
|||
|
dc.b $90 ; 0 1 0 0 0 1 0 1 - Slot 9 (bit 0)
|
|||
|
dc.b $A1 ; 0 1 0 0 0 1 1 0 - Slot A (bit 1)
|
|||
|
dc.b $90 ; 0 1 0 0 0 1 1 1 - Slot 9 (bit 0)
|
|||
|
dc.b $C3 ; 0 1 0 0 1 0 0 0 - Slot C (bit 3)
|
|||
|
dc.b $90 ; 0 1 0 0 1 0 0 1 - Slot 9 (bit 0)
|
|||
|
dc.b $A1 ; 0 1 0 0 1 0 1 0 - Slot A (bit 1)
|
|||
|
dc.b $90 ; 0 1 0 0 1 0 1 1 - Slot 9 (bit 0)
|
|||
|
dc.b $B2 ; 0 1 0 0 1 1 0 0 - Slot B (bit 2)
|
|||
|
dc.b $90 ; 0 1 0 0 1 1 0 1 - Slot 9 (bit 0)
|
|||
|
dc.b $A1 ; 0 1 0 0 1 1 1 0 - Slot A (bit 1)
|
|||
|
dc.b $90 ; 0 1 0 0 1 1 1 1 - Slot 9 (bit 0)
|
|||
|
dc.b $D4 ; 0 1 0 1 0 0 0 0 - Slot D (bit 4)
|
|||
|
dc.b $90 ; 0 1 0 1 0 0 0 1 - Slot 9 (bit 0)
|
|||
|
dc.b $A1 ; 0 1 0 1 0 0 1 0 - Slot A (bit 1)
|
|||
|
dc.b $90 ; 0 1 0 1 0 0 1 1 - Slot 9 (bit 0)
|
|||
|
dc.b $B2 ; 0 1 0 1 0 1 0 0 - Slot B (bit 2)
|
|||
|
dc.b $90 ; 0 1 0 1 0 1 0 1 - Slot 9 (bit 0)
|
|||
|
dc.b $A1 ; 0 1 0 1 0 1 1 0 - Slot A (bit 1)
|
|||
|
dc.b $90 ; 0 1 0 1 0 1 1 1 - Slot 9 (bit 0)
|
|||
|
dc.b $C3 ; 0 1 0 1 1 0 0 0 - Slot C (bit 3)
|
|||
|
dc.b $90 ; 0 1 0 1 1 0 0 1 - Slot 9 (bit 0)
|
|||
|
dc.b $A1 ; 0 1 0 1 1 0 1 0 - Slot A (bit 1)
|
|||
|
dc.b $90 ; 0 1 0 1 1 0 1 1 - Slot 9 (bit 0)
|
|||
|
dc.b $B2 ; 0 1 0 1 1 1 0 0 - Slot B (bit 2)
|
|||
|
dc.b $90 ; 0 1 0 1 1 1 0 1 - Slot 9 (bit 0)
|
|||
|
dc.b $A1 ; 0 1 0 1 1 1 1 0 - Slot A (bit 1)
|
|||
|
dc.b $90 ; 0 1 0 1 1 1 1 1 - Slot 9 (bit 0)
|
|||
|
dc.b $E5 ; 0 1 1 0 0 0 0 0 - Slot E (bit 5)
|
|||
|
dc.b $90 ; 0 1 1 0 0 0 0 1 - Slot 9 (bit 0)
|
|||
|
dc.b $A1 ; 0 1 1 0 0 0 1 0 - Slot A (bit 1)
|
|||
|
dc.b $90 ; 0 1 1 0 0 0 1 1 - Slot 9 (bit 0)
|
|||
|
dc.b $B2 ; 0 1 1 0 0 1 0 0 - Slot B (bit 2)
|
|||
|
dc.b $90 ; 0 1 1 0 0 1 0 1 - Slot 9 (bit 0)
|
|||
|
dc.b $A1 ; 0 1 1 0 0 1 1 0 - Slot A (bit 1)
|
|||
|
dc.b $90 ; 0 1 1 0 0 1 1 1 - Slot 9 (bit 0)
|
|||
|
dc.b $C3 ; 0 1 1 0 1 0 0 0 - Slot C (bit 3)
|
|||
|
dc.b $90 ; 0 1 1 0 1 0 0 1 - Slot 9 (bit 0)
|
|||
|
dc.b $A1 ; 0 1 1 0 1 0 1 0 - Slot A (bit 1)
|
|||
|
dc.b $90 ; 0 1 1 0 1 0 1 1 - Slot 9 (bit 0)
|
|||
|
dc.b $B2 ; 0 1 1 0 1 1 0 0 - Slot B (bit 2)
|
|||
|
dc.b $90 ; 0 1 1 0 1 1 0 1 - Slot 9 (bit 0)
|
|||
|
dc.b $A1 ; 0 1 1 0 1 1 1 0 - Slot A (bit 1)
|
|||
|
dc.b $90 ; 0 1 1 0 1 1 1 1 - Slot 9 (bit 0)
|
|||
|
dc.b $D4 ; 0 1 1 1 0 0 0 0 - Slot D (bit 4)
|
|||
|
dc.b $90 ; 0 1 1 1 0 0 0 1 - Slot 9 (bit 0)
|
|||
|
dc.b $A1 ; 0 1 1 1 0 0 1 0 - Slot A (bit 1)
|
|||
|
dc.b $90 ; 0 1 1 1 0 0 1 1 - Slot 9 (bit 0)
|
|||
|
dc.b $B2 ; 0 1 1 1 0 1 0 0 - Slot B (bit 2)
|
|||
|
dc.b $90 ; 0 1 1 1 0 1 0 1 - Slot 9 (bit 0)
|
|||
|
dc.b $A1 ; 0 1 1 1 0 1 1 0 - Slot A (bit 1)
|
|||
|
dc.b $90 ; 0 1 1 1 0 1 1 1 - Slot 9 (bit 0)
|
|||
|
dc.b $C3 ; 0 1 1 1 1 0 0 0 - Slot C (bit 3)
|
|||
|
dc.b $90 ; 0 1 1 1 1 0 0 1 - Slot 9 (bit 0)
|
|||
|
dc.b $A1 ; 0 1 1 1 1 0 1 0 - Slot A (bit 1)
|
|||
|
dc.b $90 ; 0 1 1 1 1 0 1 1 - Slot 9 (bit 0)
|
|||
|
dc.b $B2 ; 0 1 1 1 1 1 0 0 - Slot B (bit 2)
|
|||
|
dc.b $90 ; 0 1 1 1 1 1 0 1 - Slot 9 (bit 0)
|
|||
|
dc.b $A1 ; 0 1 1 1 1 1 1 0 - Slot A (bit 1)
|
|||
|
dc.b $90 ; 0 1 1 1 1 1 1 1 - Slot 9 (bit 0)
|
|||
|
|
|||
|
;_______________________________________________________________________
|
|||
|
;
|
|||
|
; Routine: InitSDTbl
|
|||
|
;
|
|||
|
; Arguments: D0 (output): error code
|
|||
|
;
|
|||
|
; Function: Creates and initializes a slot interrupt dispatch table in
|
|||
|
; the system heap. A pointer to the table is saved in low
|
|||
|
; memory as SlotQDT. This table is used by the slot interrupt
|
|||
|
; handler to dispatch a slot interrupt to the appropriate
|
|||
|
; routine. Each entry in the table points to a slot queue
|
|||
|
; header which in turns points to one or more slot queue
|
|||
|
; elements.
|
|||
|
;
|
|||
|
; Called from: InitSlots routine in OS:StartInit.a
|
|||
|
;
|
|||
|
; Registers Used: D0,A0,A1
|
|||
|
;_______________________________________________________________________
|
|||
|
|
|||
|
with slotVBLInfo
|
|||
|
InitSDTbl move.l #sIntGlobalSize,d0 ; alloc space for all possible slots
|
|||
|
_NewPtr ,sys,clear ; create table in system heap, cleared
|
|||
|
move.l a0,SlotQDT ; save ptr to table in low mem
|
|||
|
|
|||
|
lea slotVBLInfos+\
|
|||
|
slotVBLQHdr-\
|
|||
|
slotVBLInfo(a0),a1 ; setup pointer to first slotVBLInfos record
|
|||
|
moveq.l #TotalSlots-1,d0 ; setup loop counter for all possible slots
|
|||
|
|
|||
|
@init move.l a1,(a0)+ ; point to the slotIntInfo record for this slot
|
|||
|
adda.w #sVBLInfoSize,a1 ; point to next slotIntInfo record
|
|||
|
dbra d0,@init ; init all possible slots
|
|||
|
moveq.l #noErr,D0 ; indicate success (remove this, can't fail)
|
|||
|
rts ; all done
|
|||
|
endwith
|
|||
|
|
|||
|
|
|||
|
InitSPTbl RTS ; this routine no longer exists (remove this)
|
|||
|
|
|||
|
END
|
|||
|
|