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803 lines
36 KiB
Plaintext
803 lines
36 KiB
Plaintext
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;
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; File: UniversalEqu.a
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;
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; Contains: low-level equates for accessing the Universal ROM information
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;
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; Written by: Gary G. Davidian 17-Apr-89
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;
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; Copyright: © 1989-1993 by Apple Computer, Inc. All rights reserved.
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;
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; Change History (most recent first):
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;
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; <SM33> 12/13/93 PN Roll in KAOs and Horror changes to support Malcom and AJ
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; machines
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; <SM32> 11/10/93 fau Update from SuperMunggio <SMG4>.
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; <SMG4> 9/8/93 chp Rearranged two BasesValid flags that weren't really in the
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; correct order.
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; <SMG3> 8/27/93 fau Changed the name of the Hammer Head controller in the decoder
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; table to HHead.
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; <SMG2> 8/25/93 chp Added some information for Grand Central, the TNT DMA
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; controller.
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; <SM31> 10/10/93 SAM Roll in <MC2> from mc900ftjesus.
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; <MC2> 10/10/93 SAM Added external features hasNewMemMgr and hasEnhancedLTalk.
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; <SM30> 08-03-93 jmp Added a new field to the VideoInfo record (imported from the
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; HORROR sources).
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; <SM29> 7/14/93 RC Added BARTExists to exist list and added the BARTAddress to
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; address list
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; <SM28> 6/14/93 kc Roll in Ludwig.
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; <LW7> 4/29/93 fau Bug #1081636: Update from Reality: The sound bits definition
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; in external features changed.
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; <LW6> 4/14/93 fau Moved Civic and Sebastian to a unique position in the table of
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; Base Addresses.
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; <SM27> 5/19/93 GMR Added ICONInfoPtr to the ProductInfo record.
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; <SM26> 4/11/93 chp Removed Time Manager ProductInfo bits. Added SerialDMA and
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; serial HAL binding info to ProductInfo.
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; <SM25> 4/5/93 jb Added AwacsExists & AwacsAddr for PDM.
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; <SM24> 3/31/93 chp Clean up ProductInfo conflicts and make some masks easier to
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; read and maintain. Change has68kEmulator from 0 to 32 so it
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; doesn't conflict with PGC flag and so it works with TestFor.
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; <SM23> 3/2/93 CSS Move SupportsROMDisk to be in the same bit position as in Horror
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; (was 31 now 28).
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; <LW2> 2/26/93 fau Removed support for Cyclone EVT3 (MMC).
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; <SM22> 2/5/93 SAM <CCH> Fixed the testFor macro to do the right thing when testing
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; ExternalFeatures with bits numbers greater 32.
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; <SM21> 2/5/93 SAM Cleaned up some things in this file. Added has68kEmulator to
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; External Features.
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; <SM20> 2/2/93 GMR Added SWIM3Exists flag and SWIM3Addr entry.
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; <SM19> 12/4/92 fau Backed out <SM16> and fix it in the files that used DAFBExists
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; to check for SCSI stuff.
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; <SM18> 12/1/92 EH Adding PrattExists flag, PrattAddr entry, PrattDecoder entry.
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; <SM17> 12/1/92 SWC Added IntHandlerPtr, a pointer to the interrupt handler setup
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; table, to ProductInfo.
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; <SM16> 11/23/92 mal Split CIVICAddr and DAFBAddr so TestFor CIVICExists and
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; DAFBExists are unique tests.
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; <SM15> 11/23/92 dwc Added a AMICExists to the features flag for PDM.
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; <SM14> 11/20/92 fau Added a MuniExists to the features flag.
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; <SM13> 11/19/92 SWC Added PowerManagerPtr, a pointer to the Power Manager primitives
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; table, to ProductInfo.
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; <SM12> 11/6/92 rab Roll in Horror changes. Comments follow:
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; <H26> 10/16/92 JC Add ROM external feature bit and set on for Vail and WLCD to
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; indicate that machine has Hard Power off so it can be used by a
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; disk based gestalt patch so that we do not need to add
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; additional items to the table in the disk patch.
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; <H25> 8/11/92 NJV Added equates for 25 and 33 MHz vail CPU Id registers.
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; <H24> 6/12/92 GA Add CUDA external features flags and move SupportsBtnInt and
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; SupportsROMDisk bits up to make room for CUDA because Cube-E needs
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; the CUDA/Egret bits defined in bits 24,25, and 26 (if they are not
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; in these bit positions Cube-E no longer works with Cyclone).
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; <H23> 6/12/92 HY Define SupportsROMDisk external feature flag.
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; <SM11> 11/01/92 HY Defined bit 31 in the ExtValid flags. This bit defines whether
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; or not a machine supports ROM disks.
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; <SM10> 10/22/92 fau Released Universal bits 21 and 31 that were previously used by
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; the Cyclone MMC and YMCA decoders.
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; <SM9> 10/18/92 CCH Added equates for HMC decoder and Singer.
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; <SM8> 10/6/92 SES Added bit mask definitions for different Time Mgr
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; implementations in external features flag.
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; <SM7> 9/30/92 fau Added the new Cyclone EVT4 decoder (YMCA) to decoder kinds.
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; Used bit 21 of the universal bits for the YMCA (it was unused).
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; This should be moved to MMC once we stop supporting the MMC.
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; <SM6> 8/17/92 CCH Extended universal support to 96 bits and addition extFeatures
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; longwords. Also added the BitVector32 macro, and updated the
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; TestInRam macro.
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; <SM5> 6/4/92 KW (RM,H21) Roll in Cuda/Egret firmware in external hardware
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; features so that the bit positions are frozen as Cuda support is
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; rolled into Horror (Slice & Hook Projects).
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; (BG,H20) Adding some bits for Hook/Slice in ExtValid features.
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; (NJV,H19) Due to popular demand, we changed the SoundNoPlaywRec
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; equate mask to SoundPlayAndRecord - machines that can Play and
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; Record simultaneously will have this bit set in their
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; ProductInfo Table.
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; (NJV,H18) Added SoundNoPlaywRec equate mask for machines that
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; cannot Play and Record simultaneously.
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; KW DID NOT roll in SupportsBtnInt equ 24 or the changes to Egret
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; masks (went from 24,25,26-->25,26,27)
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; <SM4> 5/26/92 RB Fixed the DecoderInfo record after I messed up. VDACAddr shares
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; the same addr as Sebastian, and DAFB shares its address with
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; Civic. Way to go Ricardo...1 full day lost.
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; <SM3> 5/21/92 RB Making changes for Cyclone. Pandora comments follow: Some
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; comments may be repeated due to the Pandora/Horror history.
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; <P12> 5/13/92 KW (HV,H17) Add equate for RAMBankInfo record size.
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; (jmp,H16) Updated some comments.
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; (BG,H15) Added djMEMCDecoder to DecoderTable. Added -djMEMCChipBit-
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; to ExtValid flags definitions since there is no more space to add
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; entries in the BaseAddrs table.
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; <P11> 5/11/92 KW Bumped Egret equates from 22,23,24 to 24,25,26
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; <P10> 4/24/92 KW (NJV,H14) Adding equates needed to support Patch ROMs
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; (SWC,H13) Added ADB/DebugUtil primitives vector entry to ProductInfo record.
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; <P9> 3/3/92 chp (SWC,H12) Added SoundStereoMixing to ExtValid so the system disk (Cube-E)
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; can determine if that feature is available on new machines that it doesn't
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; know about.
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; <P8> 2/28/92 chp Changed “DMAExists” to more specific “PSCExists.”
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; <P7> 02/19/92 jmp (HJR,H11) Added NiagraExistsBit to ProductInfo's external
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; features, since Niagra is just a minor variant of Jaws. (Note:
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; Because of this change, moved the Egret Firmware bits to 22, 23,
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; and 24 from 21, 22, and 23).
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; <P6> 2/11/92 chp (jmp) The Egret Firmware bits (added in P4) were off by one bit.
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; <P5> 1/18/92 RMP Aliased a couple of equates to meet Cyclones needs. Added debug
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; Macros for Cyclone.
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; <P4> 1/16/92 GS Updated the ProductInfo Record ExtValid bits to include
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; information about the Firmware version used in the Egret chip
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; (MC68HC05E1). The Current versions of firmware are Egret8 used
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; in Elsie and Erickson, Caboose used in Eclipse, and Cuda used in
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; Cyclone.
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; <P3> 1/15/92 RP Added Cyclone specific equates.
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; <P2> 01/13/92 jmp (jmp,H10) Added two new fields to the VideoInfo record in an
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; effort to eliminate the BoxFlag dependencies for machines having
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; built-in video.
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; (SWC,H9) Added a new bit to the NubusInfo structure to mark
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; slots that are used for docking purposes (i.e., a portable into
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; a desktop docking unit).
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; <SM2> 5/17/92 kc Roll in Horror changes. Original comments follow.
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; <H14> 4/20/92 NJV Adding equates needed to support Patch ROMs
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; <H13> 4/3/92 SWC Added ADB/DebugUtil primitives vector entry to ProductInfo
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; record.
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; <H12> 2/25/92 SWC Added SoundStereoMixing to ExtValid so the system disk (Cube-E)
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; can determine if that feature is available on new machines that
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; it doesn't know about.
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; <H11> 2/13/92 HJR Added NiagraExistsBit to ProductInfo's external features, since
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; Niagra is just a minor variant of Jaws.
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; <H10> 01/11/92 jmp Added two new fields to the VideoInfo record in an effort to
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; eliminate the BoxFlag dependencies for machines having built-in
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; video.
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; <H9> 1/9/92 SWC Added a new bit to the NubusInfo structure to mark slots that
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; are used for docking purposes (i.e., a portable into a desktop
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; docking unit).
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; <H8> 12/16/91 HJR Added Niagra decoded to decoder table.
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; <H7> 12/4/91 CCH Moved CPUID-value global from DecoderInfo to ProductInfo record.
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; <H6> 11/26/91 jmp Just added a comment to the VDACAddr definition.
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; <H5> 10/24/91 SWC Moved MSCChipBit to bit 20 since it was colliding with one of
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; the keyswitch bits.
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; <H4> 10/22/91 SWC Removed MSCAddr and MSCExists from DecoderInfo and added
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; MSCChipBit to ProductInfo's external features, since MSC is just
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; a variant of the RBV (so we free up a decoder slot).
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; <H3> 10/15/91 SWC Added clock/PRAM primitives vector entry to ProductInfo record.
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; <H2> 8/21/91 rww Added Sonora-related equates.
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; <T13> 6/25/91 BG Added Keyswitch values within the ExtValid (UnivROMFlags)
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; description. This universalizes the keyswitch feature for
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; Macintosh. Hopefully this will not ever actually be needed ...
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; <T12> 6/21/91 BG Swapped the order of the OrwellDecoder and VISADecoder in the
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; DecoderKinds table, since VISA=LC, and LC shipped before this
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; ROM, but the decoders would be in a different order than the
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; previous ROMs, and that's not good.
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; <T9> 5/22/91 BG Adding in RomPhysAddr as part of the decoder table addresses for
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; Apollo, high-volume style machines (for Gus).
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; <T8> 5/10/91 djw Add sound attribute flag SoundStereoOut, moved SupportsIdle to
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; bit 16.
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; <T7> 5/1/91 HJR SWC - Adding in equates for DB-Lite.
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; <T6> 1/24/91 HJR Add version number to product info and extended product info to
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; include new sound low level routine vector.
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; <T5> 1/15/91 DAF Added DAFB-related features to Universal structure templates
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; <T4> 12/11/90 JJ Mac LC: Changes references to VISAChipBit to V8ChipBit.
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; <T3> 12/6/90 CCH (actually JMA) Added definitions for SCSI96Addr and
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; SCSI96_1Exists, SCSI96_2Exists for TERROR Turbo SCSI.
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; <23> 1/28/92 RB Fixed the comment in <22>
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; <22> 1/22/92 RB Added two fields to DecoderInfo Record, also added definitions
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; for the CPU ID register.
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; <21> 1/20/92 KC Add KeyswCabooseBit equate.
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; <20> 10/28/91 SAM/KSM Rolled in Regatta file.
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;
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; Regatta Change History:
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;
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; <2> 8/8/91 SAM (BG) Updated the defines in this file to agree with TERROR F1.
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; <1> 8/8/91 SAM Split off from 7.0 GM sources.
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;
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; 7.0 Change History:
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;
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; <19> 8/26/91 JSM Cleanup header.
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; <18> 6/11/91 gbm Take out conditional for Regatta
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; <17> 4/8/91 KIP djw, forRegattaCPUs: Fix conditional in universal info record to
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; work only on Regatta.
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; <16> 3/28/91 SAM Added entries in DecoderInfo for SCSIC96 & DAFB (used three
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; previously unused entries.)
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; <15> 1/30/91 gbm sab, #38: Change the ‘already including this file’ variable to
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; all uppercase (for security reasons)
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; <14> 10/22/90 JJ Rex V8: Change VISAChipBit to V8ChipBit.
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; <13> 8/14/90 BG Added a definition for -SonicExists- for the on-board Ethernet
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; in use on Eclipse.
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; <11> 4/4/90 MSH Waimea equates to build Universal.
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; <9> 3/29/90 MSH Add SupportsIdel run time flag.
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; <8> 3/26/90 CCH Adding sound input flags to ExtValid flags.
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; <7> 3/21/90 MSH Added new clock decode type.
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; <6> 2/13/90 JJ Added VISA Chip indicator to External Features word to
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; distinguish VISA from RBV/MDU.
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; <5> 1/25/90 GMR Renamed the ADB/Clock types so they don't conflict with assembly
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; conditionals (like iopADB).
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; <4> 1/18/90 JJ Added VISADecoder to to DecoderKinds list.
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; <3> 1/15/90 GMR Added ADB and Clock/Pram bits to External Features longword, to
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; help support Erickson/Elsie which use the Egret chip.
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; <2> 1/2/90 BG Added *OrwellDecoder* to *DecoderKinds* and *OrwellExists* to
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; *DecoderInfo* for Eclipse.
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; <1.6> 11/15/89 GMR NEEDED FOR ZONE-5: Added RPUAddr to DecoderInfo table, and
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; RPUExists.
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; <1.5> 7/16/89 GGD Added PGCInstalled bit name to the ProductInfo record.
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; <1.4> 6/30/89 GGD Added DefaultRSRCs field to ProductInfo record. Added
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; information about NuBus slot configurations.
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; <1.3> 6/12/89 djw Added slot zero pram addr to video table
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; <1.2> 6/11/89 GGD Added new definitions for Ram Bank and Video tables.
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; <1.1> 6/10/89 GGD Moved box flag constants into Private.a
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; <1.0> 4/30/89 GGD Adding to EASE for the first time. Equates to support Universal
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; ROMs.
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;
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IF &TYPE('__INCLUDINGUNIVERSALEQU__') = 'UNDEFINED' THEN
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__INCLUDINGUNIVERSALEQU__ SET 1
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; This record is used in MMUTables.a and in SizeMem.a
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DecoderKinds record 0,increment
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UnknownDecoder ds.b 1
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MacPALDecoder ds.b 1
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BBUDecoder ds.b 1
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NormandyDecoder ds.b 1
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GLUEDecoder ds.b 1
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MDUDecoder ds.b 1
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OSSFMCDecoder ds.b 1
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VISADecoder ds.b 1
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OrwellDecoder ds.b 1
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JAWSDecoder ds.b 1
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MSCDecoder ds.b 1
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SonoraDecoder ds.b 1
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NiagraDecoder ds.b 1
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YMCADecoder ds.b 1 ; <SM7> fau
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djMEMCDecoder ds.b 1
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HMCDecoder ds.b 1 ; <SM9> cch
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PrattDecoder ds.b 1 ; <SM18>
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HHeadDecoder ds.b 1
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endr
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;--------------------------------------------------------------------------------------------
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; DecoderInfo Record
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;
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; This record contains information pertaining to the memory decoder
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; of a particular machine.
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;
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; If you change the DecoderInfo record, bump the version up by 1.
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;
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;--------------------------------------------------------------------------------------------
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DecoderInfoVersion equ 1 ; Version of the DecoderInfo record <SM6>
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DecoderInfo record {FirstBaseAddr},increment ; data structure describing address decoder
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DefaultBases ds.l 1 ; default valid flags for base addresses 0-31
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DefaultBases1 ds.l 1 ; default valid flags for base addresses 32-63 <SM6>
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DefaultBases2 ds.l 1 ; default valid flags for base addresses 64-95 <SM6>
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|
|
DefExtFeatures ds.l 1 ; default valid flags for external features 0-31
|
|||
|
|
DefExtFeatures1 ds.l 1 ; default valid flags for external features 32-63 <SM6>
|
|||
|
|
DefExtFeatures2 ds.l 1 ; default valid flags for external features 64-95 <SM6>
|
|||
|
|
AvoidVIA1A ds.b 1 ; mask for VIA1 Port A bits to avoid changing
|
|||
|
|
AvoidVIA1B ds.b 1 ; mask for VIA1 Port B bits to avoid changing
|
|||
|
|
AvoidVIA2A ds.b 1 ; mask for VIA2 Port A bits to avoid changing
|
|||
|
|
AvoidVIA2B ds.b 1 ; mask for VIA2 Port B bits to avoid changing
|
|||
|
|
CheckForProc ds.l 1 ; offset to routine to check for this decoder
|
|||
|
|
AddrMap ds.b 1 ; Decoder Kind
|
|||
|
|
DecoderInfoVers ds.b 1 ; DecoderInfo version <SM6>
|
|||
|
|
ds.b 2 ; filler
|
|||
|
|
|
|||
|
|
DecoderAddr ds.l 1 ; base of address of memory decoder, if any <SM6>
|
|||
|
|
|
|||
|
|
FirstBaseAddr ds.l 0 ; record origin, and offset of first base address field
|
|||
|
|
ROMAddr ds.l 1 ; Base of ROM
|
|||
|
|
DiagROMAddr ds.l 1 ; Base of DIagnostic ROM
|
|||
|
|
VIA1Addr ds.l 1 ; Base of VIA1
|
|||
|
|
SCCRdAddr ds.l 1 ; Base of SCC for reading
|
|||
|
|
SCCWrAddr ds.l 1 ; Base of SCC for writing
|
|||
|
|
IWMAddr ds.l 1 ; Base of IWM/SWIM
|
|||
|
|
PWMAddr ds.l 1 ; Base of PWM DIsk speed buffer
|
|||
|
|
SoundAddr ds.l 1 ; Base of RAM based Sound buffer
|
|||
|
|
SCSIAddr ds.l 1 ; Base of SCSI Chip (normal accesses)
|
|||
|
|
SCSIDackAddr ds.l 1 ; Base of SCSI Chip, asserting Dack
|
|||
|
|
SCSIHskAddr ds.l 1 ; Base of SCSI Chip, waiting for Dreq, asserting Dack
|
|||
|
|
VIA2Addr ds.l 1 ; Base of VIA2
|
|||
|
|
ASCAddr ds.l 1 ; Base of Apple Sound Chip
|
|||
|
|
RBVAddr ds.l 1 ; Base of RBV
|
|||
|
|
VDACAddr ds.l 1 ; Base of Video D/A converter *and/or* CLUT <SM4> rb
|
|||
|
|
SCSIDMAAddr ds.l 1 ; Base of SCSI DMA Chip
|
|||
|
|
SWIMIOPAddr ds.l 1 ; Base of SWIM IOP
|
|||
|
|
SCCIOPAddr ds.l 1 ; Base of SCC IOP
|
|||
|
|
OSSAddr ds.l 1 ; Base of OSS
|
|||
|
|
FMCAddr ds.l 1 ; Base of Fitch Memory Controller
|
|||
|
|
RPUAddr ds.l 1 ; Base of RAM Parity Unit <1.6>
|
|||
|
|
OrwellAddr ds.l 1 ; Base of Orwell Memory Controller <2><SM12>
|
|||
|
|
JAWSAddr ds.l 1 ; Base of JAWS Memory Controller <10>
|
|||
|
|
SonicAddr ds.l 1 ; Base of Sonic Ethernet Chip <13>
|
|||
|
|
SCSI96Addr1 ds.l 1 ; Base of 1st SCSI96 Chip (normal accesses) <T3>
|
|||
|
|
SCSI96Addr2 ds.l 1 ; Base of 2nd SCSI96 Chip (normal accesses) <T3>
|
|||
|
|
DAFBAddr ds.l 1 ; Base of DAFB frame buffer controller <T5><SM4> rb <SM16>
|
|||
|
|
PSCAddr ds.l 1 ; Base of PSC DMA controller <P3><SM3> rb
|
|||
|
|
ROMPhysAddr ds.l 1 ; Base of ROM physical address <T9><SM3> rb
|
|||
|
|
PatchROMAddr ds.l 1 ; Base of Patch ROM <H14><SM3> rb
|
|||
|
|
NewAgeAddr ds.l 1 ; Base of NewAge floppy disk controller <P3><SM3> rb
|
|||
|
|
Unused31Addr ds.l 1 ;
|
|||
|
|
|
|||
|
|
SingerAddr ds.l 1 ; Base of Singer Sound Chip <SM9>
|
|||
|
|
DSPAddr ds.l 1 ; Base of DSP chip <SM10>
|
|||
|
|
MACEAddr ds.l 1 ; Base of MACE chip <SM10>
|
|||
|
|
MUNIAddr ds.l 1 ; Base of MUNI NuBus bus controller <SM14>
|
|||
|
|
AMICAddr ds.l 1 ; Base of AMIC DMA controller (PDM) <SM15> dwc
|
|||
|
|
PrattAddr ds.l 1 ; Base of the Pratt Memory Controller <SM18>
|
|||
|
|
SWIM3Addr ds.l 1 ; Base of the SWIM3 chip <SM20>
|
|||
|
|
AwacsAddr ds.l 1 ; Base of Awacs Sound Chip
|
|||
|
|
CivicAddr ds.l 1 ; Base of Civic buffer controller <P3><SM3> rb <SM16>
|
|||
|
|
SebastianAddr ds.l 1 ; Base of Cyclone Video Clut DAC <P3><SM3> rb <SM7>
|
|||
|
|
BARTAddr ds.l 1 ; Base of Cold Fusion Nubus Controller
|
|||
|
|
GrandCentralAddr ds.l 1 ; Base of TNT Grand Central I/O Controller
|
|||
|
|
Unused44Addr ds.l 1
|
|||
|
|
Unused45Addr ds.l 1
|
|||
|
|
Unused46Addr ds.l 1
|
|||
|
|
Unused47Addr ds.l 1
|
|||
|
|
Unused48Addr ds.l 1
|
|||
|
|
Unused49Addr ds.l 1
|
|||
|
|
Unused50Addr ds.l 1
|
|||
|
|
Unused51Addr ds.l 1
|
|||
|
|
Unused52Addr ds.l 1
|
|||
|
|
Unused53Addr ds.l 1
|
|||
|
|
Unused54Addr ds.l 1
|
|||
|
|
Unused55Addr ds.l 1
|
|||
|
|
Unused56Addr ds.l 1
|
|||
|
|
Unused57Addr ds.l 1
|
|||
|
|
Unused58Addr ds.l 1
|
|||
|
|
Unused59Addr ds.l 1
|
|||
|
|
Unused60Addr ds.l 1
|
|||
|
|
Unused61Addr ds.l 1
|
|||
|
|
FooAddr ds.l 1
|
|||
|
|
Unused63Addr ds.l 1
|
|||
|
|
|
|||
|
|
Unused64Addr ds.l 1
|
|||
|
|
BarAddr ds.l 1
|
|||
|
|
Unused66Addr ds.l 1
|
|||
|
|
Unused67Addr ds.l 1
|
|||
|
|
Unused68Addr ds.l 1
|
|||
|
|
Unused69Addr ds.l 1
|
|||
|
|
Unused70Addr ds.l 1
|
|||
|
|
Unused71Addr ds.l 1
|
|||
|
|
Unused72Addr ds.l 1
|
|||
|
|
Unused73Addr ds.l 1
|
|||
|
|
Unused74Addr ds.l 1
|
|||
|
|
Unused75Addr ds.l 1
|
|||
|
|
Unused76Addr ds.l 1
|
|||
|
|
Unused77Addr ds.l 1
|
|||
|
|
Unused78Addr ds.l 1
|
|||
|
|
Unused79Addr ds.l 1
|
|||
|
|
Unused80Addr ds.l 1
|
|||
|
|
Unused81Addr ds.l 1
|
|||
|
|
Unused82Addr ds.l 1
|
|||
|
|
Unused83Addr ds.l 1
|
|||
|
|
Unused84Addr ds.l 1
|
|||
|
|
Unused85Addr ds.l 1
|
|||
|
|
Unused86Addr ds.l 1
|
|||
|
|
Unused87Addr ds.l 1
|
|||
|
|
Unused88Addr ds.l 1
|
|||
|
|
Unused89Addr ds.l 1
|
|||
|
|
Unused90Addr ds.l 1
|
|||
|
|
Unused91Addr ds.l 1
|
|||
|
|
Unused92Addr ds.l 1
|
|||
|
|
Unused93Addr ds.l 1
|
|||
|
|
Unused94Addr ds.l 1
|
|||
|
|
Unused95Addr ds.l 1
|
|||
|
|
Size equ *-DecoderInfo
|
|||
|
|
|
|||
|
|
; Bit numbers of BasesValid flags, the lowmem AddrMapFlags contains these bits.
|
|||
|
|
|
|||
|
|
ROMExists equ (ROMAddr-FirstBaseAddr)/4
|
|||
|
|
DiagROMExists equ (DiagROMAddr-FirstBaseAddr)/4
|
|||
|
|
VIA1Exists equ (VIA1Addr-FirstBaseAddr)/4
|
|||
|
|
SCCRdExists equ (SCCRdAddr-FirstBaseAddr)/4
|
|||
|
|
SCCWrExists equ (SCCWrAddr-FirstBaseAddr)/4
|
|||
|
|
IWMExists equ (IWMAddr-FirstBaseAddr)/4
|
|||
|
|
PWMExists equ (PWMAddr-FirstBaseAddr)/4
|
|||
|
|
SoundExists equ (SoundAddr-FirstBaseAddr)/4
|
|||
|
|
SCSIExists equ (SCSIAddr-FirstBaseAddr)/4
|
|||
|
|
SCSIDackExists equ (SCSIDackAddr-FirstBaseAddr)/4
|
|||
|
|
SCSIHskExists equ (SCSIHskAddr-FirstBaseAddr)/4
|
|||
|
|
VIA2Exists equ (VIA2Addr-FirstBaseAddr)/4
|
|||
|
|
ASCExists equ (ASCAddr-FirstBaseAddr)/4
|
|||
|
|
RBVExists equ (RBVAddr-FirstBaseAddr)/4
|
|||
|
|
VDACExists equ (VDACAddr-FirstBaseAddr)/4
|
|||
|
|
SCSIDMAExists equ (SCSIDMAAddr-FirstBaseAddr)/4
|
|||
|
|
SWIMIOPExists equ (SWIMIOPAddr-FirstBaseAddr)/4
|
|||
|
|
SCCIOPExists equ (SCCIOPAddr-FirstBaseAddr)/4
|
|||
|
|
OSSExists equ (OSSAddr-FirstBaseAddr)/4
|
|||
|
|
FMCExists equ (FMCAddr-FirstBaseAddr)/4
|
|||
|
|
RPUExists equ (RPUAddr-FirstBaseAddr)/4 ; <1.6>
|
|||
|
|
OrwellExists equ (OrwellAddr-FirstBaseAddr)/4 ; <2><SM12>
|
|||
|
|
JAWSExists equ (JAWSAddr-FirstBaseAddr)/4 ; <10>
|
|||
|
|
SonicExists equ (SonicAddr-FirstBaseAddr)/4 ; <13>
|
|||
|
|
SCSI96_1Exists equ (SCSI96Addr1-FirstBaseAddr)/4 ; <T3>
|
|||
|
|
SCSI96_2Exists equ (SCSI96Addr2-FirstBaseAddr)/4 ; <T3>
|
|||
|
|
DAFBExists equ (DAFBAddr-FirstBaseAddr)/4 ; <5>
|
|||
|
|
PSCExists equ (PSCAddr-FirstBaseAddr)/4 ; <P3><SM3> rb
|
|||
|
|
ROMPhysAddrExists equ (ROMPhysAddr-FirstBaseAddr)/4 ; <T9><SM3> rb
|
|||
|
|
PatchROMExists equ (PatchROMAddr-FirstBaseAddr)/4 ; <H14><SM3> rb
|
|||
|
|
NewAgeExists equ (NewAgeAddr-FirstBaseAddr)/4 ; <P3><SM3> rb
|
|||
|
|
|
|||
|
|
SingerExists equ (SingerAddr-FirstBaseAddr)/4 ; <SM9>
|
|||
|
|
DSPExists equ (DSPAddr-FirstBaseAddr)/4 ; <SM10>
|
|||
|
|
MACEExists equ (MACEAddr-FirstBaseAddr)/4 ; <SM10>
|
|||
|
|
MUNIExists equ (MUNIAddr-FirstBaseAddr)/4 ; <SM14>
|
|||
|
|
AMICExists equ (AMICAddr-FirstBaseAddr)/4 ; <SM15> dwc
|
|||
|
|
PrattExists equ (PrattAddr-FirstBaseAddr)/4 ; <SM18>
|
|||
|
|
SWIM3Exists equ (SWIM3Addr-FirstBaseAddr)/4 ; <SM20>
|
|||
|
|
AwacsExists equ (AwacsAddr-FirstBaseAddr)/4
|
|||
|
|
CivicExists equ (CivicAddr-FirstBaseAddr)/4 ; <P3><SM3> rb
|
|||
|
|
SebastianExists equ (SebastianAddr-FirstBaseAddr)/4 ; <P3><SM3> rb <SM7> fau
|
|||
|
|
BARTExists equ (BARTAddr-FirstBaseAddr)/4
|
|||
|
|
GrandCentralExists equ (GrandCentralAddr-FirstBaseAddr)/4
|
|||
|
|
|
|||
|
|
endr
|
|||
|
|
|
|||
|
|
|
|||
|
|
;--------------------------------------------------------------------------------------------
|
|||
|
|
; RAM Bank info data structure for use by memory sizing code
|
|||
|
|
|
|||
|
|
RamBankInfo record 0,increment ; data structure describing RAM Bank features
|
|||
|
|
MinBankSize ds.l 1 ; minimum size possible in any bank
|
|||
|
|
|
|||
|
|
HighBankStart ds.l 1 ; starting physical address of highest bank
|
|||
|
|
HighBankEnd ds.l 1 ; ending physical address of highest bank
|
|||
|
|
|
|||
|
|
; the following fields repeat for each additional bank. Start addr $FFFFFFFF is end of table
|
|||
|
|
NextBankStart ds.l 1 ; starting physical address of next bank (-1 if end of table)
|
|||
|
|
NextBankEnd ds.l 1 ; ending physical address of next bank
|
|||
|
|
RAMInfoSize equ *-RamBankInfo ; size of a RAM info record for two banks <H17><SM3> rb
|
|||
|
|
endr
|
|||
|
|
|
|||
|
|
|
|||
|
|
;--------------------------------------------------------------------------------------------
|
|||
|
|
; Video info data structure for describing built in video.
|
|||
|
|
|
|||
|
|
VideoInfo record 0,increment ; data structure describing built in video features
|
|||
|
|
if hasSlotMgr then ; Describe RBV Slot Zero video
|
|||
|
|
VRAMPhysAddr ds.l 1 ; Physical base address of screen
|
|||
|
|
VRAMLogAddr32 ds.l 1 ; Logical 32 bit base address of screen
|
|||
|
|
VRAMLogAddr24 ds.l 1 ; Logical 24 bit base address of screen
|
|||
|
|
SlotNumberAlias ds.b 1 ; Slot number to use for PRAM storage
|
|||
|
|
SlotPramAddr ds.b 1 ; PRAM address for RBV slot zero <1.3>
|
|||
|
|
SuperSRsrcDirID ds.b 1 ; ID of sRsrc directory directory <H10>
|
|||
|
|
BoardSRsrcID ds.b 1 ; ID of board sRsrc (or 0 to just use boxFlag) <H10>
|
|||
|
|
DrvrHwID ds.w 1 ; DrHwID for controller (maintained by DTS).
|
|||
|
|
VIBuiltInSize EQU *-VideoInfo ; size of record with slot manager info
|
|||
|
|
|
|||
|
|
else ; Describe classic built in video
|
|||
|
|
VRAMAddr ds.l 1 ; Base address of screen
|
|||
|
|
ScreenByteSize ds.l 1 ; size of screen, in bytes
|
|||
|
|
ScreenTop ds.w 1 ; screen bounds, top
|
|||
|
|
ScreenLeft ds.w 1 ; screen bounds, left
|
|||
|
|
ScreenBottom ds.w 1 ; screen bounds, bottom
|
|||
|
|
ScreenRight ds.w 1 ; screen bounds, right
|
|||
|
|
RowByteSize ds.w 1 ; size of scan line, in bytes
|
|||
|
|
RetraceRate ds.w 1 ; vertical retrace rate, in Hz
|
|||
|
|
HorizDPI ds.w 1 ; dots per inch, horizontally
|
|||
|
|
VertDPI ds.w 1 ; dots per inch, vertically
|
|||
|
|
VIClassicSize EQU *-VideoInfo ; size of record with Classic info
|
|||
|
|
endif
|
|||
|
|
endr
|
|||
|
|
|
|||
|
|
|
|||
|
|
;--------------------------------------------------------------------------------------------
|
|||
|
|
; NuBus info data structure for describing NuBus slots
|
|||
|
|
|
|||
|
|
NuBusInfo record 0,increment ; data structure describing NuBus Slot features
|
|||
|
|
; Bit numbers of flags for each slot
|
|||
|
|
hasPRAM equ 0 ; Parameter RAM is allocated for this slot
|
|||
|
|
canInterrupt equ 1 ; Interrupt line can exist for this slot
|
|||
|
|
hasConnector equ 2 ; NuBus connector exists in the box for this slot
|
|||
|
|
slotDisabled equ 3 ; Cannot be used, address space used for something else
|
|||
|
|
directSlot equ 4 ; Direct slot has support for this NuBus slot
|
|||
|
|
slotReserved equ 5 ; set if slot addr space is reserved from VM use
|
|||
|
|
dockingSlot equ 6 ; set if this slot is used for docking (a portable) <H9>
|
|||
|
|
|
|||
|
|
Slot0 ds.b 1 ; info for Slot 0
|
|||
|
|
Slot1 ds.b 1 ; info for Slot 1
|
|||
|
|
Slot2 ds.b 1 ; info for Slot 2
|
|||
|
|
Slot3 ds.b 1 ; info for Slot 3
|
|||
|
|
Slot4 ds.b 1 ; info for Slot 4
|
|||
|
|
Slot5 ds.b 1 ; info for Slot 5
|
|||
|
|
Slot6 ds.b 1 ; info for Slot 6
|
|||
|
|
Slot7 ds.b 1 ; info for Slot 7
|
|||
|
|
Slot8 ds.b 1 ; info for Slot 8
|
|||
|
|
Slot9 ds.b 1 ; info for Slot 9
|
|||
|
|
SlotA ds.b 1 ; info for Slot A
|
|||
|
|
SlotB ds.b 1 ; info for Slot B
|
|||
|
|
SlotC ds.b 1 ; info for Slot C
|
|||
|
|
SlotD ds.b 1 ; info for Slot D
|
|||
|
|
SlotE ds.b 1 ; info for Slot E
|
|||
|
|
SlotF ds.b 1 ; info for Slot F
|
|||
|
|
endr
|
|||
|
|
|
|||
|
|
|
|||
|
|
;--------------------------------------------------------------------------------------------
|
|||
|
|
; ProductInfo Record
|
|||
|
|
;
|
|||
|
|
; This record contains information specific to a particular machine.
|
|||
|
|
; The lowmem UnivInfoPtr is a pointer to this data structure.
|
|||
|
|
;
|
|||
|
|
; If you change the ProductInfo record, bump the version up by 1.
|
|||
|
|
;
|
|||
|
|
;--------------------------------------------------------------------------------------------
|
|||
|
|
ProductInfoVersion equ 1 ; Version of the ProductInfo record
|
|||
|
|
|
|||
|
|
ProductInfo record 0,increment ; data structure describing product dependent features
|
|||
|
|
|
|||
|
|
DecoderInfoPtr ds.l 1 ; offset to address decoder info
|
|||
|
|
RamInfoPtr ds.l 1 ; offset to RAM bank base/size info
|
|||
|
|
VideoInfoPtr ds.l 1 ; offset to Built in Video info
|
|||
|
|
NuBusInfoPtr ds.l 1 ; offset to NuBus Slot info
|
|||
|
|
HwCfgWord ds.w 1 ; value to load into lowmem hwCfgFlags
|
|||
|
|
ProductKind ds.b 1 ; unique id of this product (boxFlag value)
|
|||
|
|
DecoderKind ds.b 1 ; unique id of associated address decoder
|
|||
|
|
Rom85Word ds.w 1 ; value to load into lowmem ROM85
|
|||
|
|
DefaultRSRCs ds.b 1 ; default ROM Resource configuration <1.4>
|
|||
|
|
ProductInfoVers ds.b 1 ; version number of productinfo record <6> HJR
|
|||
|
|
|
|||
|
|
BasesValid ds.l 1 ; valid flags for base addresses 0-31
|
|||
|
|
BasesValid1 ds.l 1 ; valid flags for base addresses 32-63 <SM6>
|
|||
|
|
BasesValid2 ds.l 1 ; valid flags for base addresses 64-95 <SM6>
|
|||
|
|
ExtValid ds.l 1 ; valid flags for external features 0-31
|
|||
|
|
ExtValid1 ds.l 1 ; valid flags for external features 32-63
|
|||
|
|
ExtValid2 ds.l 1 ; valid flags for external features 64-95
|
|||
|
|
VIAIdMask ds.l 1 ; mask for VIA1/2 Port A/B inputs
|
|||
|
|
VIAIdMatch
|
|||
|
|
YMCAIdMatch
|
|||
|
|
MMCIdMatch ds.l 1 ; value to match to identify this product <SM3> rb <P5>
|
|||
|
|
VIA1InitPtr ds.l 1 ; offset to VIA1 initialization info
|
|||
|
|
VIA2InitPtr ds.l 1 ; offset to VIA2 initialization info
|
|||
|
|
|
|||
|
|
SndControlPtr ds.l 1 ; offset to low level sound vector table <6> HJR
|
|||
|
|
ClockPRAMPtr ds.l 1 ; offset to low level clock/PRAM vector table <H3>
|
|||
|
|
ADBDebugUtilPtr ds.l 1 ; offset to low level ADB and DebugUtil vector table <H13>
|
|||
|
|
PowerManagerPtr ds.l 1 ; offset to low level Power Manager vector table <SM13>
|
|||
|
|
IntHandlerPtr ds.l 1 ; offset to low level interrupt handler setup table <SM17>
|
|||
|
|
ImmgPrimPtr ds.l 1 ; offset to primitives table for the internal modem manager <H29><H31>
|
|||
|
|
lastPrimitive EQU * ; <H13>
|
|||
|
|
|
|||
|
|
CPUIDValue ds.w 1 ; expected contents of CPU ID register <H7>
|
|||
|
|
ds.w 1 ; [padding for now]
|
|||
|
|
IconInfoPtr ds.l 1 ; offset to Icon info table <SM27>
|
|||
|
|
|
|||
|
|
SIze equ *-ProductInfo
|
|||
|
|
|
|||
|
|
|
|||
|
|
;-------------------------------------------------------------------------------------------- <SM21>
|
|||
|
|
; ExtValid/UnivROMFlags Flags (DefExtFeatures)
|
|||
|
|
;
|
|||
|
|
; Bit numbers of ExtValid flags, the lowmem UnivROMFlags contains these bits
|
|||
|
|
; which describe some external hardware features, that don't have base addresses;
|
|||
|
|
; A total of 96 bits are available.
|
|||
|
|
;
|
|||
|
|
; If you need to encode features, create a mask for the number of bits needed and
|
|||
|
|
; enumerate the entries for that mask.
|
|||
|
|
;--------------------------------------------------------------------------------------------
|
|||
|
|
|
|||
|
|
; ••• Miscellaneous Features bits 0-31 (DefExtFeatures) •••
|
|||
|
|
|
|||
|
|
PGCInstalled equ 0 ; the optional PGC chip is installed
|
|||
|
|
|
|||
|
|
; ADB Mask uses bits 1-3
|
|||
|
|
|
|||
|
|
ADBMask equ %111 << 1 ; Mask for this feature
|
|||
|
|
ADBXcvr equ %000 << 1 ; GI transceiver based ADB
|
|||
|
|
ADBPwrMgr equ %001 << 1 ; Power Manager based ADB
|
|||
|
|
ADBIop equ %010 << 1 ; IOP based ADB
|
|||
|
|
ADBEgret equ %011 << 1 ; Egret based ADB
|
|||
|
|
ADBspare4 equ %100 << 1
|
|||
|
|
ADBspare5 equ %101 << 1
|
|||
|
|
ADBspare6 equ %110 << 1
|
|||
|
|
ADBspare7 equ %111 << 1
|
|||
|
|
|
|||
|
|
; Clock Mask uses bits 4-6
|
|||
|
|
|
|||
|
|
ClockMask equ %111 << 4 ; Mask for this feature
|
|||
|
|
ClockRTC equ %000 << 4 ; Real-Time-Clock chip based Clock/PRAM
|
|||
|
|
ClockPwrMgr equ %001 << 4 ; Power Manager based Clock/PRAM
|
|||
|
|
ClockEgret equ %010 << 4 ; Egret based Clock/PRAM
|
|||
|
|
ClockNoPram equ %011 << 4 ; PRAM is not in the clock chip
|
|||
|
|
Clockspare4 equ %100 << 4
|
|||
|
|
Clockspare5 equ %101 << 4
|
|||
|
|
Clockspare6 equ %110 << 4
|
|||
|
|
Clockspare7 equ %111 << 4
|
|||
|
|
|
|||
|
|
V8ChipBit equ 7 ; 1 in bit 7 means V8 variant of RBV/MDU
|
|||
|
|
|
|||
|
|
; Sound Mask uses bits 8-15 <LW7>
|
|||
|
|
|
|||
|
|
SoundHasSoundIn equ 1 << 8 ; has sound input hardware <LW7>
|
|||
|
|
Sound16Bit equ 1 << 9 ; has 16-bit hardware <LW7>
|
|||
|
|
SoundStereoIn equ 1 << 10 ; has stereo input <LW7>
|
|||
|
|
SoundStereoOut equ 1 << 11 ; stereo output flag
|
|||
|
|
SoundStereoMixing equ 1 << 12 ; stereo mixing to built-in speaker flag
|
|||
|
|
SoundPlayAndRecord equ 1 << 13 ; machine can play and record simultaneously flag
|
|||
|
|
SoundHasDFAC2 equ 1 << 14 ; machine has DFAC II chip flag
|
|||
|
|
SoundLineLevel equ 15 ; machine requires line level input (instead of mike level) <LW7>
|
|||
|
|
|
|||
|
|
SupportsIdle equ 16
|
|||
|
|
PMgrNewIntf equ 17 ; 1=serial PMgr interface & new protocol
|
|||
|
|
|
|||
|
|
KeyswCabooseBit equ 18 ; an Egret/Caboose-flavored keyswitch
|
|||
|
|
ksBit1 equ 19 ; note: bits 18 and 19 are defined below in KeyswMask
|
|||
|
|
|
|||
|
|
MSCChipBit equ 20 ; 1=MSC variant of RBV/MDU
|
|||
|
|
NiagraExistsBit equ 21 ; 1=Niagra variant of Jaws
|
|||
|
|
SonoraExistsBit equ 22 ; 1=Sonora
|
|||
|
|
djMEMCChipBit equ 23 ; 1=djMEMC
|
|||
|
|
|
|||
|
|
; EgretFWMask uses bits 24-26. See below.
|
|||
|
|
|
|||
|
|
SupportsBtnInt equ 27 ; 1=has button interrupt register (for Slice)
|
|||
|
|
SupportsROMDisk equ 28 ; 1=supports ROM Disk <SM23>
|
|||
|
|
hasHardPowerOff equ 29 ; 1=has hard power off switch. Used by Gestalt (only valid on Horror or newer)
|
|||
|
|
SoftVBL equ 30 ; VBL emulated by Time Mgr task
|
|||
|
|
hasNewMemMgr equ 31 ; ROM has support for Figment (new heap/memory manager) <MC2>
|
|||
|
|
|
|||
|
|
|
|||
|
|
; ••• Miscellaneous Features bits 32-63 (DefExtFeatures1) •••
|
|||
|
|
|
|||
|
|
has68kEmulator equ 32 ; ROM supports 68k emulation
|
|||
|
|
|
|||
|
|
; SerialDMA flags and HAL binding info occupies bits 33-36.
|
|||
|
|
|
|||
|
|
SerialDMA equ 33 ; serial hardware requires SerialDMA driver and HAL
|
|||
|
|
|
|||
|
|
SHALMask equ %111 << (34//32) ; mask for product’s HAL resource ID
|
|||
|
|
SHALReserved equ %000 << (34//32) ; (0) reserved
|
|||
|
|
SHALPSC equ %001 << (34//32) ; (1) PSC HAL
|
|||
|
|
SHALAMIC equ %010 << (34//32) ; (2) AMIC HAL
|
|||
|
|
SHALSpare3 equ %011 << (34//32)
|
|||
|
|
SHALSpare4 equ %100 << (34//32)
|
|||
|
|
SHALSpare5 equ %101 << (34//32)
|
|||
|
|
SHALSpare6 equ %110 << (34//32)
|
|||
|
|
SHALSpare7 equ %111 << (34//32)
|
|||
|
|
|
|||
|
|
hasEnhancedLTalk equ 37 ; Enhanced Curio LocalTalk <MC2>
|
|||
|
|
|
|||
|
|
|
|||
|
|
; ••• Miscellaneous Features bits 64-95 (DefExtFeatures2) •••
|
|||
|
|
|
|||
|
|
endr
|
|||
|
|
|
|||
|
|
|
|||
|
|
; NOTE - the following are defined outside of the ProductInfo record because EQUs
|
|||
|
|
; defined within a RECORD are limited to 16-bit signed values, whereas EQUs
|
|||
|
|
; defined OUTSIDE of a RECORD can be 32-bit values. Thanks, MPW.
|
|||
|
|
|
|||
|
|
; Support for current and possible future keyswitch implementations
|
|||
|
|
; Keyswitch Mask uses bits 18 and 19 of DefExtFeatures.
|
|||
|
|
;
|
|||
|
|
|
|||
|
|
KeyswMask equ %11 << 18 ; mask for keyswitch existence
|
|||
|
|
KeyswNone equ %00 << 18 ; NO keyswitch (default case)
|
|||
|
|
KeyswCaboose equ %01 << 18 ; an Egret/Caboose-flavored keyswitch
|
|||
|
|
KeyswSpare2 equ %10 << 18
|
|||
|
|
KeyswSpare3 equ %11 << 18
|
|||
|
|
|
|||
|
|
|
|||
|
|
; Support for current and possible future Egret Firmware implementations
|
|||
|
|
; Egret Type Mask uses bits 24, 25, and 26 of DefExtFeatures.
|
|||
|
|
|
|||
|
|
EgretFWMask equ %111 << 24 ; mask for Egret FW Types (MC68HC05E1)
|
|||
|
|
EgretNone equ %000 << 24 ; No Egret Chip (MC68HC05E1)
|
|||
|
|
Egret8 equ %001 << 24 ; an Egret8 flavored firmware
|
|||
|
|
Caboose equ %010 << 24 ; a Caboose flavored firmware
|
|||
|
|
Cuda equ %011 << 24 ; a Cuda flavored firmware
|
|||
|
|
EgretFWSpare4 equ %100 << 24
|
|||
|
|
EgretFWSpare5 equ %101 << 24
|
|||
|
|
EgretFWSpare6 equ %110 << 24
|
|||
|
|
EgretFWSpare7 equ %111 << 24
|
|||
|
|
|
|||
|
|
;--------------------------------------------------------------------------------------------
|
|||
|
|
; End of ExtValid/UnivROMFlags Flags
|
|||
|
|
;
|
|||
|
|
;--------------------------------------------------------------------------------------------
|
|||
|
|
|
|||
|
|
|
|||
|
|
;--------------------------------------------------------------------------------------------
|
|||
|
|
; Encapsulate the hwCfgFlags bit numbers in a record for use with the TestFor macro
|
|||
|
|
|
|||
|
|
hwCfgInfo record 0,increment ; bit numbers of the lowmem hwCfgFlags
|
|||
|
|
hwCbSCSI equ hwCbSCSI ; SCSI port present
|
|||
|
|
hwCbClock equ hwCbClock ; New clock chip present
|
|||
|
|
hwCbExPRAM equ hwCbExPRAM ; Extra Parameter Ram valid.
|
|||
|
|
hwCbFPU equ hwCbFPU ; FPU chip present.
|
|||
|
|
hwCbMMU equ hwCbMMU ; Some kind of MMU present (see MMUType for what kind).
|
|||
|
|
hwCbADB equ hwCbADB ; Apple Desktop Bus present.
|
|||
|
|
hwCbAUX equ hwCbAUX ; Running A/UX
|
|||
|
|
hwCbPwrMgr equ hwCbPwrMgr ; Power Manager present
|
|||
|
|
endr
|
|||
|
|
|
|||
|
|
|
|||
|
|
;--------------------------------------------------------------------------------------------
|
|||
|
|
; Equates describing the CPU ID register <7> HJR
|
|||
|
|
|
|||
|
|
CPUIDReg EQU $5FFFFFFC
|
|||
|
|
|
|||
|
|
cpuIDSig EQU $A55A ; bits 31-16: signature
|
|||
|
|
cpuIDHiVol EQU 0<<12 ; 15-12: design center
|
|||
|
|
cpuIDPortable EQU 1<<12
|
|||
|
|
cpuIDHiEnd EQU 2<<12
|
|||
|
|
cpuIDRISC EQU 3<<12
|
|||
|
|
cpuIDinReg EQU 0<<11 ; 11: complete ID appears in this register
|
|||
|
|
cpuIDinVIA EQU 1<<11 ; supplemental ID appears in VIA
|
|||
|
|
cpuIDinMMC EQU 1<<11 ; or in MMC on Cyclone (jeez). <P5><SM3> rb
|
|||
|
|
cpuIDinBoard EQU 1<<11 ; or in Mother/Daughter board ID registers.
|
|||
|
|
cpuIDFieldMask EQU $07FF ; mask to and value with to get CPU ID Field of CPU ID Register
|
|||
|
|
|
|||
|
|
|
|||
|
|
Vail25IDField EQU 1 ; Vail 25 MHz CPU ID <H25><SM12>
|
|||
|
|
Vail33IDField EQU 3 ; Vail 33 MHz CPU ID <H25><SM12>
|
|||
|
|
|
|||
|
|
;--------------------------------------------------------------------------------------------
|
|||
|
|
; TestFor macro. (RAM version)
|
|||
|
|
;
|
|||
|
|
; The macro TestFor allows for easy testing of features by just knowing the feature name,
|
|||
|
|
; and not needing to remember where it is.
|
|||
|
|
|
|||
|
|
macro
|
|||
|
|
TestFor &Feature
|
|||
|
|
lcla &a
|
|||
|
|
lcla &b
|
|||
|
|
|
|||
|
|
&a: seta 0
|
|||
|
|
if (&type(&concat('DecoderKinds.',&Feature)) <> 'UNDEFINED') then
|
|||
|
|
cmp.b #DecoderKinds.&Feature,([UnivInfoPtr],ProductInfo.DecoderKind)
|
|||
|
|
eori #4,ccr ; return ccr.z=0 if equal
|
|||
|
|
else
|
|||
|
|
if (&type(&concat('DecoderInfo.',&Feature)) <> 'UNDEFINED') then
|
|||
|
|
&b: seta &eval(&concat('DecoderInfo.',&Feature))
|
|||
|
|
if (&b < 32) then ; if in first 32 bits, use AddrMapFlags
|
|||
|
|
&a: seta AddrMapFlags+3 ; bit numbering assumes longword
|
|||
|
|
elseif (&b < 64) then ; if in second 32 bits, use AddrMapFlags1
|
|||
|
|
&a: seta AddrMapFlags1+3
|
|||
|
|
elseif (&b < 96) then ; if in third 32 bits, use AddrMapFlags2
|
|||
|
|
&a: seta AddrMapFlags2+3
|
|||
|
|
endif
|
|||
|
|
elseif (&type(&concat('ProductInfo.',&Feature)) <> 'UNDEFINED') then
|
|||
|
|
&b: seta &eval(&concat('ProductInfo.',&Feature))
|
|||
|
|
if (&b < 32) then ; if in first 32 bits, use UnivROMFlags <SM22>
|
|||
|
|
&a: seta UnivROMFlags+3 ; bit numbering assumes longword
|
|||
|
|
elseif (&b < 64) then ; if in second 32 bits, use UnivROMFlags1
|
|||
|
|
&a: seta UnivROMFlags1+3
|
|||
|
|
elseif (&b < 96) then ; if in third 32 bits, use UnivROMFlags2
|
|||
|
|
&a: seta UnivROMFlags2+3
|
|||
|
|
endif
|
|||
|
|
elseif (&type(&concat('hwCfgInfo.',&Feature)) <> 'UNDEFINED') then
|
|||
|
|
&a: seta hwCfgFlags+1 ; bit numbering assumes word
|
|||
|
|
&b: seta &eval(&concat('hwCfgInfo.',&Feature))
|
|||
|
|
endif
|
|||
|
|
if &a=0 then
|
|||
|
|
aerror 'Unknown feature name'
|
|||
|
|
else
|
|||
|
|
btst.b #(&b//8),&a-((&b//32)/8)
|
|||
|
|
endif
|
|||
|
|
endif
|
|||
|
|
endm
|
|||
|
|
|
|||
|
|
|
|||
|
|
;--------------------------------------------------------------------------------------------
|
|||
|
|
; BitVector32 macro.
|
|||
|
|
;
|
|||
|
|
; The BitVector macro creates a 32-bit bitvector made up of the bits specified in
|
|||
|
|
; the parameter field modulo 32.
|
|||
|
|
;
|
|||
|
|
|
|||
|
|
macro
|
|||
|
|
BitVector32
|
|||
|
|
lcla &index
|
|||
|
|
lcla &count
|
|||
|
|
lcla &vector
|
|||
|
|
|
|||
|
|
&count: seta &nbr(&syslist)
|
|||
|
|
if &count > 32 then
|
|||
|
|
aerror 'too many parameters; up to 32 allowed'
|
|||
|
|
endif
|
|||
|
|
|
|||
|
|
&index: seta 1
|
|||
|
|
&vector: seta 0
|
|||
|
|
while &index <= &count do
|
|||
|
|
&vector: seta &vector + (1 << (&eval( &syslist[&index]) // 32 ))
|
|||
|
|
&index: seta &index + 1
|
|||
|
|
endwhile
|
|||
|
|
|
|||
|
|
dc.l &vector
|
|||
|
|
endm
|
|||
|
|
|
|||
|
|
ENDIF ; ...already included
|