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400 lines
11 KiB
Plaintext
400 lines
11 KiB
Plaintext
;
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; File: XOpErr.a
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;
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; Contains: Routines to handle the Operand Error Exception
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;
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; Originally Written by: Motorola Inc.
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; Adapted to Apple/MPW: Jon Okada
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;
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; Copyright: © 1990, 1991 by Apple Computer, Inc., all rights reserved.
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;
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; This file is used in these builds: Mac32
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;
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; Change History (most recent first):
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;
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; <2> 3/30/91 BG Rolling in Jon Okada's latest changes.
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; <1> 12/14/90 BG First checked into TERROR/BBS.
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; xoperr.a
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; Based upon Motorola file 'x_operr.sa'.
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; CHANGE LOG:
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; 09 Jan 91 JPO Inserted label "operr" at top of code. Deleted
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; unreferenced labels "ck_inex", "enabled", and
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; "take_inex". Replaced "bsr get_fline" with in-line
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; code. Modified code which branches to user handlers.
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; Changed "bra fpsp_done" to "rte".
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; 14 Jan 91 JPO Folded in Motorola update of 'x_operr.sa'.
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;
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*
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* x_operr.sa 3.3 12/18/90
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*
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* fpsp_operr --- FPSP handler for operand error exception
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*
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* See 68040 User's Manual pp. 9-44f
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*
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* Note 1: For trap disabled 040 does the following:
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* If the dest is a fp reg, then an extended precision non_signaling
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* NAN is stored in the dest reg. If the dest format is b, w, or l and
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* the source op is a NAN, then garbage is stored as the result (actually
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* the upper 32 bits of the mantissa are sent to the integer unit). If
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* the dest format is integer (b, w, l) and the operr is caused by
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* integer overflow, or the source op is inf, then the result stored is
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* garbage.
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* There are three cases in which operr is incorrectly signaled on the
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* 040. This occurs for move_out of format b, w, or l for the largest
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* negative integer (-2^7 for b, -2^15 for w, -2^31 for l).
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*
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* On opclass = 011 fmove.(b,w,l) that causes a conversion
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* overflow -> OPERR, the exponent in wbte (and fpte) is:
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* byte 56 - (62 - exp)
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* word 48 - (62 - exp)
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* long 32 - (62 - exp)
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*
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* where exp = (true exp) - 1
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*
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* So, wbtemp and fptemp will contain the following on erroneoulsy
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* signalled operr:
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* fpts = 1
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* fpte = $4000 (15 bit externally)
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* byte fptm = $ffffffff ffffff80
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* word fptm = $ffffffff ffff8000
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* long fptm = $ffffffff 80000000
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*
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* Note 2: For trap enabled 040 does the following:
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* If the inst is move_out, then same as Note 1.
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* If the inst is not move_out, the dest is not modified.
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* The exceptional operand is not defined for integer overflow
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* during a move_out.
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*
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* Copyright (C) Motorola, Inc. 1990
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* All Rights Reserved
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*
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* THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE OF MOTOROLA
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* The copyright notice above does not evidence any
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* actual or intended publication of such source code.
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* X_OPERR IDNT 2,1 Motorola 040 Floating Point Software Package
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operr: ; label added <1/9/91, JPO>
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fpsp_operr:
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*
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link a6,#-LOCAL_SIZE
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fsave -(a7)
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movem.l d0-d1/a0-a1,USER_DA(a6)
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fmovem.x fp0-fp3,USER_FP0(a6)
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fmovem.l fpcr/fpsr/fpiar,USER_FPCR(a6)
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*
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* Check if this is an opclass 3 instruction.
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* If so, fall through, else branch to operr_end
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*
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btst.b #TFLAG,T_BYTE(a6)
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beq.b operr_end
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*
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* If the destination size is B,W,or L, the operr must be
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* handled here.
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*
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move.l CMDREG1B(a6),d0
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bfextu d0{3:3},d0 ;0=long, 4=word, 6=byte
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cmpi.b #0,d0 ;determine size; check long
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beq.b operr_long
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cmpi.b #4,d0 ;check word
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beq operr_word
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cmpi.b #6,d0 ;check byte
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beq.w operr_byte
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*
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* The size is not B,W,or L, so the operr is handled by the
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* kernel handler. Set the operr bits and clean up, leaving
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* only the integer exception frame on the stack, and the
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* fpu in the original exceptional state.
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*
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operr_end:
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bset.b #operr_bit,FPSR_EXCEPT(a6)
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bset.b #aiop_bit,FPSR_AEXCEPT(a6)
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movem.l USER_DA(a6),d0-d1/a0-a1
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fmovem.x USER_FP0(a6),fp0-fp3
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fmovem.l USER_FPCR(a6),fpcr/fpsr/fpiar
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frestore (a7)+
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unlk a6
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; bra.l real_operr ; deleted <1/9/91, JPO>
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move.l (FPOPERR_VEC040).W,-(sp) ; push vector to user's handler <1/9/91, JPO>
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rts ; execute user's handler <1/9/91, JPO>
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operr_long:
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moveq.l #4,d1 ;write size to d1
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move.b STAG(a6),d0 ;test stag for nan
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andi.b #$e0,d0 ;clr all but tag
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cmpi.b #$60,d0 ;check for nan
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beq operr_nan
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cmpi.l #$80000000,FPTEMP_LO(a6) ;test if ls lword is special
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bne.b chklerr ;if not equal, check for incorrect operr
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bsr check_upper ;check if exp and ms mant are special
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tst.l d0
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bne.b chklerr ;if d0 is true, check for incorrect operr
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move.l #$80000000,d0 ;store special case result
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bsr operr_store
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bra.w not_enabled ;clean and exit
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*
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* CHECK FOR INCORRECTLY GENERATED OPERR EXCEPTION HERE
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*
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chklerr:
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move.w FPTEMP_EX(a6),d0
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and.w #$7FFF,d0 ;ignore sign bit
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cmp.w #$3FFE,d0 ;this is the only possible exponent value
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bne.b chklerr2
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fixlong:
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move.l FPTEMP_LO(a6),d0
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bsr operr_store
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bra.w not_enabled
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chklerr2:
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move.w FPTEMP_EX(a6),d0
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and.w #$7FFF,d0 ;ignore sign bit
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cmp.w #$4000,d0
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bhs.w store_max ;exponent out of range
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move.l FPTEMP_LO(a6),d0
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and.l #$7FFF0000,d0 ;look for all 1's on bits 30-16
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cmp.l #$7FFF0000,d0
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beq.b fixlong
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tst.l FPTEMP_LO(a6)
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bpl.b chklepos
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cmp.l #$FFFFFFFF,FPTEMP_HI(a6)
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beq.b fixlong
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bra.w store_max
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chklepos:
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tst.l FPTEMP_HI(a6)
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beq.b fixlong
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bra.w store_max
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operr_word:
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moveq.l #2,d1 ;write size to d1
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move.b STAG(a6),d0 ;test stag for nan
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andi.b #$e0,d0 ;clr all but tag
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cmpi.b #$60,d0 ;check for nan
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beq operr_nan
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cmpi.l #$ffff8000,FPTEMP_LO(a6) ;test if ls lword is special
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bne.b chkwerr ;if not equal, check for incorrect operr
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bsr check_upper ;check if exp and ms mant are special
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tst.l d0
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bne.b chkwerr ;if d0 is true, check for incorrect operr
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move.l #$80000000,d0 ;store special case result
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bsr operr_store
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bra.w not_enabled ;clean and exit
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*
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* CHECK FOR INCORRECTLY GENERATED OPERR EXCEPTION HERE
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*
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chkwerr:
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move.w FPTEMP_EX(a6),d0
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and.w #$7FFF,d0 ;ignore sign bit
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cmp.w #$3FFE,d0 ;this is the only possible exponent value
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bne.b store_max
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move.l FPTEMP_LO(a6),d0
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swap d0
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bsr operr_store
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bra.w not_enabled
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operr_byte:
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moveq.l #1,d1 ;write size to d1
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move.b STAG(a6),d0 ;test stag for nan
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andi.b #$e0,d0 ;clr all but tag
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cmpi.b #$60,d0 ;check for nan
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beq.b operr_nan
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cmpi.l #$ffffff80,FPTEMP_LO(a6) ;test if ls lword is special
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bne.b chkberr ;if not equal, check for incorrect operr
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bsr check_upper ;check if exp and ms mant are special
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tst.l d0
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bne.b chkberr ;if d0 is true, check for incorrect operr
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move.l #$80000000,d0 ;store special case result
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bsr.b operr_store
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bra.w not_enabled ;clean and exit
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*
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* CHECK FOR INCORRECTLY GENERATED OPERR EXCEPTION HERE
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*
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chkberr:
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move.w FPTEMP_EX(a6),d0
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and.w #$7FFF,d0 ;ignore sign bit
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cmp.w #$3FFE,d0 ;this is the only possible exponent value
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bne.b store_max
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move.l FPTEMP_LO(a6),d0
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asl.l #8,d0
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swap d0
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bsr.b operr_store
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bra.w not_enabled
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*
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* This operr condition is not of the special case. Set operr
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* and aiop and write the portion of the nan to memory for the
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* given size.
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*
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operr_nan:
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or.l #opaop_mask,USER_FPSR(a6) ;set operr & aiop
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move.l ETEMP_HI(a6),d0 ;output will be from upper 32 bits
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bsr.b operr_store
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bra end_operr
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*
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* Store_max loads the max pos or negative for the size, sets
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* the operr and aiop bits, and clears inex and ainex, incorrectly
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* set by the 040.
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*
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store_max:
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or.l #opaop_mask,USER_FPSR(a6) ;set operr & aiop
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bclr.b #inex2_bit,FPSR_EXCEPT(a6)
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bclr.b #ainex_bit,FPSR_AEXCEPT(a6)
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fmove.l #0,FPSR
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tst.w FPTEMP_EX(a6) ;check sign
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blt.b load_neg
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move.l #$7fffffff,d0
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bsr.b operr_store
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bra.b end_operr
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load_neg:
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move.l #$80000000,d0
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bsr.b operr_store
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bra.b end_operr
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*
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* This routine stores the data in d0, for the given size in d1,
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* to memory or data register as required. A read of the fline
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* is required to determine the destination.
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*
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operr_store:
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move.l d0,L_SCR1(a6) ;move write data to L_SCR1
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; move.l d1,-(a7) ;save register size - DELETED <1/9/91, JPO>
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; bsr.l get_fline ;fline returned in d0 - DELETED <1/9/91, JPO>
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; move.l (a7)+,d1 ;deleted <1/9/91, JPO>
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movea.l USER_FPIAR(a6),a0 ; return opcode in d0.w <1/9/91, JPO>
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sub.l d0,d0 ; <1/9/91, JPO>
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move.w (a0),d0 ; <1/9/91, JPO>
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bftst d0{26:3} ;if mode is zero, dest is Dn
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bne.b dest_mem
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*
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* Destination is Dn. Get register number from d0. Data is on
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* the stack at (a7). D1 has size: 1=byte,2=word,4=long/single
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*
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andi.l #7,d0 ;isolate register number
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cmpi.l #4,d1
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beq.b op_long ;the most frequent case
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cmpi.l #2,d1
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bne.b op_con
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or.l #8,d0
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bra.b op_con
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op_long:
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or.l #$10,d0
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op_con:
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move.l d0,d1 ;format size:reg for reg_dest
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bra reg_dest ;call to reg_dest returns to caller
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* ;of operr_store
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*
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* Destination is memory. Get <ea> from integer exception frame
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* and call mem_write.
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*
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dest_mem:
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lea.l L_SCR1(a6),a0 ;put ptr to write data in a0
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move.l EXC_EA(a6),a1 ;put user destination address in a1
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move.l d1,d0 ;put size in d0
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bsr mem_write
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rts
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*
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* Check the exponent for $c000 and the upper 32 bits of the
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* mantissa for $ffffffff. If both are true, return d0 clr
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* and store the lower n bits of the least lword of FPTEMP
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* to d0 for write out. If not, it is a real operr, and set d0.
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*
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check_upper:
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cmpi.l #$ffffffff,FPTEMP_HI(a6) ;check if first byte is all 1's
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bne.b true_operr ;if not all 1's then was true operr
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cmpi.w #$c000,FPTEMP_EX(a6) ;check if incorrectly signalled
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beq.b not_true_operr ;branch if not true operr
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cmpi.w #$bfff,FPTEMP_EX(a6) ;check if incorrectly signalled
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beq.b not_true_operr ;branch if not true operr
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true_operr:
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move.l #1,d0 ;signal real operr
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rts
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not_true_operr:
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clr.l d0 ;signal no real operr
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rts
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*
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* End_operr tests for operr enabled. If not, it cleans up the stack
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* and does an rte. If enabled, it cleans up the stack and branches
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* to the kernel operr handler with only the integer exception
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* frame on the stack and the fpu in the original exceptional state
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* with correct data written to the destination.
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*
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end_operr:
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btst.b #operr_bit,FPCR_ENABLE(a6)
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beq.b not_enabled
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;enabled: ; label deleted <1/9/91, JPO>
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movem.l USER_DA(a6),d0-d1/a0-a1
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fmovem.x USER_FP0(a6),fp0-fp3
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fmovem.l USER_FPCR(a6),fpcr/fpsr/fpiar
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frestore (a7)+
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unlk a6
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; bra.l real_operr ; deleted <1/9/91, JPO>
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move.l (FPOPERR_VEC040).W,-(sp) ; push vector to user handler <1/9/91, JPO>
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rts ; execute user handler <1/9/91, JPO>
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not_enabled:
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*
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* It is possible to have either inex2 or inex1 exceptions with the
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* operr. If the inex enable bit is set in the FPCR, and either
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* inex2 or inex1 occured, we must clean up and branch to the
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* real inex handler.
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*
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;ck_inex: ; label DELETED <1/9/91, JPO>
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move.b FPCR_ENABLE(a6),d0
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and.b FPSR_EXCEPT(a6),d0
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andi.b #$3,d0
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beq.b operr_exit
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*
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* Inexact enabled and reported, and we must take an inexact exception.
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*
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;take_inex: ; label deleted <1/9/91, JPO>
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move.b #INEX_VEC,EXC_VEC+1(a6)
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move.l USER_FPSR(a6),FPSR_SHADOW(a6)
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or.l #sx_mask,E_BYTE(a6)
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movem.l USER_DA(a6),d0-d1/a0-a1
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fmovem.x USER_FP0(a6),fp0-fp3
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fmovem.l USER_FPCR(a6),fpcr/fpsr/fpiar
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frestore (a7)+
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unlk a6
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; bra.l real_inex ; deleted <1/9/91, JPO>
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move.l ($00C4).W,-(sp) ; push vector to user INEX handler <1/9/91, JPO>
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rts ; execute user handler <1/9/91, JPO>
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*
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* Since operr is only an E1 exception, there is no need to frestore
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* any state back to the fpu.
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*
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operr_exit:
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movem.l USER_DA(a6),d0-d1/a0-a1
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fmovem.x USER_FP0(a6),fp0-fp3
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fmovem.l USER_FPCR(a6),fpcr/fpsr/fpiar
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unlk a6
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; bra.l fpsp_done ; deleted <1/9/91, JPO>
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rte ; <1/9/91, JPO>
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