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522 lines
22 KiB
Plaintext
522 lines
22 KiB
Plaintext
;__________________________________________________________________________________________________
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;
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; File: StartErr.a
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;
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; Contains: System Error Handler & Debugger Interface
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; This file contains the error handling interface code for Macintosh.
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;
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; This code can be divided into three pieces:
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;
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; 1) _Debugger trap handler
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; 2) _SysError trap handler
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; 3) Exception/interrupt handler
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;
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; The key to the new interface is the MacJmp low-memory vector. If nil, it
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; implies that the current 'debugger' is the DeepShit error handler, otherwise
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; it points to the entry point for alternate debugger, be it Macsbug, MPS remote
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; or Joe Blow's turboProbe.
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;
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; The _Debugger trap interface is in the form of
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; Debugger (Arg1, Arg2, ... ArgN, SizeOfParams, CmdWord)
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;
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; SizeOfParams (INTEGER) is the number of bytes occupied by Arg1...ArgN
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; CmdWord (INTEGER) is the dispatch word (0...N) for the debugger
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;
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; The _SysError trap interface is the same, i.e. error value in D0.W
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;
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; The Exception/interrupt handler & _SysError both save registers in syserror space
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; ($7FC80), then they and the _Debugger trap handler attempt to dispatch either
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; to an installed debugger (MacJmp <> 0) or (if not _Debugger) to the DeepShit
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; handler.
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;
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; The MacJmp (or MacJmpFlag for 32 bit clean machine) vector has three high-byte flags
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;
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; | Debugger Running | Debugger Initialized | Debugger Installed | 5 unused bits |
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;
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; Debugger Running (bit set) => the debugger is currently executing
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; Debugger Initialized => Able to handle system errors
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; Debugger Installed => MacJmp vector pts to usable debugger
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;
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; Written by: Ken Krugler
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;
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; Copyright: © 1985-1993 by Apple Computer, Inc., all rights reserved.
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;
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; Change History (most recent first):
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;
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; <SM8> 11/9/93 KW added some eieioSTP macros. Only expands for CygnusX1 ROM
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; <SM7> 6/3/93 SAM Added some Supports24Bit around the DSHandler.
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; <SM6> 12/1/92 RB Under SuperMario ROMs, change the system error for No patch to
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; the system error that saiz this is an older system. When someone
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; boots a SM ROM with a system less than 7.1 they should get that
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; error and not a 'can't find patch' system error.
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; <SM5> 11/24/92 HY Change Parity NMI check. Wrong branch sense (changed bne to beq)
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; <SM4> 11/3/92 rab Roll in Horror changes. <H5> 5/4/92 JC Change Parity NMI patch
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; to check specifically for PGC bit in Hardware External features
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; flags on RBV type machines instead of checking for V8 flag.
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; <SM3> 8/19/92 CSS Update from Reality:
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; <13> 8/18/92 DTY Change the name of BootGlobs to StartGlobals to avoid confusion
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; with BootGlobals, which is used by the boot code in Boot[1-3].a.
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; <SM2> 5/16/92 kc Roll in Horror. Comments follow:
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; <H7> 5/29/91 CCH Backed out revision 6.
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; <H6> 5/29/91 WM Changed MOVE to SR into OR to SR
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; <H5> 5/10/91 HJR Backed out of last revisions changes since a much cleaner
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; implementation was done in PowerMgr.a.
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; <H4> 4/29/91 HJR Added NMIExcpPatch to NMIExcp in order allow NMI on portables
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; with power-cycling.
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; <H3> 12/11/90 JJ Mac LC: Change reference to VISAChipBit to be V8ChipBit.
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; <H3> 12/11/90 JJ Mac LC: Changes references to VISAChipBit to V8ChipBit.
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; <H2> 10/25/90 CCH Added support for ReAnimator when forRomulator equate is set.
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; <12> 1/15/92 KC Fix "If last BRA.S to import is to next instruction, BAD CODE
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; will be generated" assembler error.
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; <11> 10/1/91 JSM Don’t use eclipseDebug.
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; <10> 9/30/91 JSM Don’t use is32BitClean conditional, all future ROMs will be.
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; <9> 9/16/91 JSM Cleanup header.
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; <8> 6/12/91 LN removed #include 'HardwareEqu.a'
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; <7> 10/22/90 JJ Rex V8: Change VISAChipBit to V8ChipBit.
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; <6> 7/2/90 CCH Removed a fatally redundant MOVEC xxx,VBR.
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; <5> 6/27/90 CCH Added code to be nice to the ReAnimator nub so that it's
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; exception vectors don't get initialized over. Also moved the
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; initialization of VBR (Cpu ≥ 020) to AFTER we actually have
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; useful vectors in the exception vector table.
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; <4> 4/14/90 JJ Add runtime check to avoid seeing parity error NMI on Elsie.
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; <3> 1/11/90 CCH Added include of “HardwarePrivateEqu.a”.
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; <2> 12/26/89 GMR RPU parity is now disabled after the error, just as the IIci was
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; handled.
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; <2.1> 12/7/89 GMR COMMENT:NEEDED FOR ZONE5: Updated NMI handler for Zone-5 parity
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; interrupts.
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; <2.0> 8/22/89 SES Removed references to nFiles.
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; <1.9> 7/17/89 GMR fixed bug when blasting warm start on MMU machines: call
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; _SwapMMUMode before looking at bootglobs and after.
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; <1.8> 5/26/89 rwh fixed changed names of BootGlobals fields
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; <1.7> 5/19/89 GMR Use equate for parity error code (dsParityErr)
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; <1.5> 5/16/89 GMR Added parity code in NMI handler, to set error code to 101 if
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; parity caused NMI on RBV based machines.
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; <1.6> 5/16/89 rwh (for gmr) cleared warmstart flag after parity error, so ram gets
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; re-initialized.
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; <1.4> 5/11/89 SWC Changed conditionals from machine- to feature-based for
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; universal ROM.
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; <1.3> 2/24/89 SES Added setup of VBR for '020 machines and greater.
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; <1.2> 2/17/89 CSL Added MacJmpFlag to make MacJmp a clean 32 bit vector.
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; <1.1> 11/10/88 CCH Fixed Header.
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; <1.0> 11/9/88 CCH Adding to EASE.
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; <•1.1> 9/23/88 CCH Got rid of inc.sum.d and empty nFiles
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; <1.0> 2/10/88 BBM Adding file for the first time into EASE…
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; <C914> 10/29/87 rwh Port to Modern Victorian (onMvMac)
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; <C882> 9/3/87 RDC Fix code for new MacsBug - make NMI handler set error code(reg
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; D0) = 13 on entry to SysError - have Syserror check only for
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; D0=13 for NMI exceptions - provide alternate entry point into
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; SysError for BadTrap routine
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; <C875> 9/2/87 MSH Port to HcMac (Laguna)
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; <C447> 11/20/86 DAH Clear NMIFlag in SysErrInit.
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; <A375> 11/8/86 CSL fixed launching into Microbug.
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; <C206> 10/9/86 bbm Modified to mpw aincludes.
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; <C152> 9/18/86 WRL Turned this into a separately compiled PROC.
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; <C84> 7/29/86 WRL Removed nub debugger installation.
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; <C28> 6/3/86 CSL Added changes for Aladddin (onMacPP).
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; <C1> 4/14/86 RDC Added changes for 68020 Reno project (NuMac)
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; - Changed variable for NMI debounce
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; - Removed init of Nubdebugger for now
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; 11/4/85 JTC Save 8 bytes of address/bus error info in SExxx space for new
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; debuggers.
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; 11/2/85 JTC Fix handling of exception frame. Pass whole business to
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; debugger, saving up for a grand RTE finale. Must dummy a
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; format-0 frame for 010 and 020.
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; 7/23/85 RDC added changes for MidMac
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; - code to setup and handle true NMI exception
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; - debounce of NMI int
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; 7/13/85 JTC Modified SysErr interface for 010/020 stack handling.
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; 5/2/85 KWK new MacJmp flags, NMI signals init call
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; 5/1/85 KWK Significant re-structure for flexible debugger call
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; 4/30/85 KWK new today
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;__________________________________________________________________________________________________
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BLANKS ON
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STRING ASIS
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IF CPU >= 20 THEN ; <1.3>
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MACHINE MC68020 ; <1.3>
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ENDIF ; <1.3>
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PRINT OFF ; <C152>
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LOAD 'StandardEqu.d'
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INCLUDE 'HardwarePrivateEqu.a'
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INCLUDE 'UniversalEqu.a' ; <1.5>
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INCLUDE 'MMUEqu.a' ; <C152>
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INCLUDE 'BootEqu.a' ; <C152>
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PRINT ON ; <C152>
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;----------------------------------------------------------------------
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; Routine SysErrInit
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; Arguments A3.L (input) Ram overlay offset value
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; A6.L (input) Return address
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; Function Set up exception vectors, nub memory, etc.
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; Uses A2
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;----------------------------------------------------------------------
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SysErrInit PROC EXPORT ; <C152>
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IMPORT GenExcps ; <C152>
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IMPORT IRQException ; <C152>
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IMPORT NMIExcp ; <C152>
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SUB.L A0,A0 ; point A0 at start of RAM
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IF NOT forRomulator THEN ; <T2>
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MOVE.L A0,D0 ; setup the VBR for '020s and greater <1.3>
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MOVEC D0,VBR ; <1.3>
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ENDIF
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ADDQ.W #BusErrVct,A0 ; start stuffing at the bus error vector <1.4>
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LEA GenExcps,A1
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MOVEQ #10-1,D0 ; setup exception handlers for <1.4>
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@0 MOVE.L A1,(A0)+ ; bus error thru line 1111 emulator vectors
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ADDQ.W #2,A1 ; <1.4>
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DBRA D0,@0
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MOVEQ #13-1,D0 ; point unassigned (vector 12) thru spurious <1.4>
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@1 MOVE.L A1,(A0)+ ; interrupt vectors to the "undefined" handler
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DBRA D0,@1 ; (System Error #11)
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LEA IRQException,A2 ; point to the IRQ exception handler
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MOVEQ #6-1,D0 ; stuff the IRQ pointer into first 6 autovectors<1.4>
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@2 MOVE.L A2,(A0)+
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DBRA D0,@2
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LEA NMIExcp,A2 ; level 7 (NMI) has a special routine to de-bounce the
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MOVE.L A2,(A0)+ ; programmer's switch on some machines (else don't care)
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MOVEQ #32-1,D0 ; point TRAP #0 vector thru unassigned (63) <1.4>
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@3 MOVE.L A1,(A0)+ ; to the "undefined" handler (System Error #11)
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DBRA D0,@3 ; since they aren't user-definable
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IF forRomulator THEN ; <T2>
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SUB.L A0,A0 ; point A0 at start of RAM
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TestInRam a1 ; only allow vector-nuking if running in RAM <bg>
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beq.s @dontNukeMe ; skip vector restoration if running from ROM <bg>
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movec vbr,a1 ; get OUR VBR
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; ... and put them in the standard vector tbl
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move.l BusErrVct(a1),BusErrVct(a0) ; then copy in our vectors
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move.l AddrVector(a1),AddrVector(a0)
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move.l IlglVector(a1),IlglVector(a0)
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move.l ZeroVector(a1),ZeroVector(a0)
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move.l CheckVector(a1),CheckVector(a0)
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move.l TrapVVector(a1),TrapVVector(a0)
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move.l PrivlgVector(a1),PrivlgVector(a0)
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move.l TraceVector(a1),TraceVector(a0)
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move.l DebugVector(a1),DebugVector(a0)
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move.l FmtErrVect(a1),FmtErrVect(a0)
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move.l BadIntVector(a1),BadIntVector(a0)
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move.l BkptVector(a1),BkptVector(a0)
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@dontNukeMe ; <bg>
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MOVE.L A0,D0 ; setup the VBR for '020s and greater
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MOVEC D0,VBR ;
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ENDIF ;
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; now clear out the SysErr data space. Starts at $7FC80 and continues for 128 bytes. Used to save off
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; registers and maintain other nub state information (nub data ptr, etc).
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CLR.B NMIFlag ; clear debouncing flag <C447>
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LEA SEVars,A0 ; pt to start of nub memory
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MOVEQ #(SEVSize/4)-1,D0 ; data size
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@4 CLR.L (A0)+ ; clear it
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DBRA D0,@4 ; loop
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; set up the default debugger (serial interface to MPS debugger)
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CLR.L MacJmp ; init debugger flag for no debugger <C1/14Apr86>
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CLR.B MacJmpFlag ; init debugger flag for 32 bit clean machine <v1.2>
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RTS6
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ENDP ; <C152>
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;----------------------------------------------------------------------
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; Routine Debugger (Arg1, Arg2...ArgN, ParamSize, CmdWord)
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; Arguments Highly variable
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; Function Dispatch debugger call to current installed debugger,
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; else ignore. (_Debugger trap)
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;----------------------------------------------------------------------
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Debugger PROC EXPORT ; <C152>
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EXPORT DebugProlog ; <C152>
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MOVEM.L A0-A7/D0-D7,SEVars ; save all regs
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BSET #7,MacJmpFlag ; in the debugger <v1.2>
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LINK A6,#0 ; no locals
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LEA 8(A6),A0 ; pt A0 at args
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MOVE.W (A0)+,D0 ; get command word
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MOVE.W (A0)+,SECmdSize ; stash size of param list
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BSR.S DebugProlog ; set up call for debuggers, set CC=existence
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BLE.S DebugErr ; V true, so either Z or (NOT N) means no inited debugger
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; Now we know there's a debugger, so call it.
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; A0 = ptr to last command parameter, A1 = ptr to debugger entry pt.
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BSET #15,D0 ; set high bit of word to flag trap call
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JSR (A1) ; call debugger!!!!
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DebugAdios UNLK A6 ; restore A6
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MOVEM.L SEVars,A0-A7/D0-D7 ; restore all regs
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MOVE.L (SP)+,A0 ; get return address
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ADD.W SECmdSize,SP ; pop params
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ADDQ.L #4,SP ; pop command word & size word
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BCLR #7,MacJmpFlag ; out of the debugger <v1.2>
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JMP (A0) ; and return
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DebugErr MOVEQ #SENoDB,D0 ; return "no debugger" error
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BRA.S DebugAdios
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; Utility for setting CC's for existance of debugger, pointing A1 to debugger code entry.
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; Must preserve D0.
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DebugProlog
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MOVE.L MacJmp,A1 ; get ptr in A1 <v1.2>
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MOVE.B MacJmpFlag,D3 ; get flags <v1.2>
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ADD.B D3,D3 ; init flag now high bit, set CC's
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RTS ; and return
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ENDP ; <C152>
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;----------------------------------------------------------------------
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; Routine ToDeepShit
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; Arguments (SP) (input) Return address to exception receiver
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; xxxx(SP) CPU and exception type stack frame <13Jul85>
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; Function Receives all the hardware exceptions. It derives the
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; deepShit ID from the return address on the stack and then
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; invokes the deepShit manager.
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; Modified to call yoghurt manager with stack cleansed of all frame <13Jul85>
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; information. Idea is to save Reg/Stack info then RTE to DS manager, <13Jul85>
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; using the RTE to clear whatever frame info is there. <13Jul85>
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; Nowadays, pass entire frame (sans PC and SR) to debugger, for later RTE <02Nov85> JTC
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;----------------------------------------------------------------------
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ToDeepShit PROC EXPORT ; <C152>
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IMPORT GenExcps ; <C152>
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IMPORT SysErr2 ; <C152>
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MOVE.W #$2700,SR ; turn off interrupts
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TST.B MacJmpFlag ; are the debuggers in control here?
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BMI.S @0 ; yes, don't bother saving regs
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MOVEM.L A0-A7/D0-D7,SEVars ; save all regs for debug
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; Compute small integer exception index 1,2,... into D0, based on address atop the stack. <13Jul85>
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@0 LEA GenExcps,A0 ; get address of receiver table
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MOVE.L (SP)+,D0 ; get return address
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SUB.L A0,D0 ; compute delta
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LSR #1,D0 ; divide by 2
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; Now clear stack of exception info, saving SR and PC unless re-entered. A special case <13Jul85>
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; is class 0 exception on the 68000, which has 4 words of info on top of the usual SR/PC. <13Jul85>
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TST.B CPUFlag ; 0-000, 1-010, 2-020, etc. <13Jul85>
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BNE.S @1 ; <13Jul85>
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CMPI.W #2,D0 ; 1 or 2 means nasty bus error frame <13Jul85>
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BGT.S @1 ; <13Jul85>
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MOVE.L (SP)+,SE000BE ; save fcn code, access address, and instruction word <04Nov85> JTC
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MOVE.L (SP)+,SE000BE+4 ; ...the other 4 bytes of the eight <04Nov85> JTC
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@1
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TST.B MacJmpFlag ; minus means we're re-entering <13Jul85>
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BMI.S @3 ; <13Jul85>
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MOVE (SP)+,SESR ; SR on top for all CPUs <13Jul85>
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MOVE.L (SP)+,SEPC ; next is the saved PC <13Jul85>
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BRA.S SysErr2 ; bypass nonsaving pop <13Jul85><1.4>
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@3 ADDQ.W #6,SP ; kill SR and PC <13Jul85><1.4>
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BRA.S SysErr2
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NOP ; appease the assembler gods <12> kc
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ENDP ; <C152>
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; This is the receiver table for all exceptions (except 1010). Look at ToDeepShit
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; code to understand BSR.S stuff
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GenExcps PROC EXPORT ; <C152>
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IMPORT ToDeepShit ; <C152>
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EXPORT IRQException ; <C152>
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EXPORT NMIExcp ; <C152>
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BSR.S ToDeepShit ; (1) bus error
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BSR.S ToDeepShit ; (2) address error
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BSR.S ToDeepShit ; (3) illegal instruction
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BSR.S ToDeepShit ; (4) zero divide
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BSR.S ToDeepShit ; (5) check instruction
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BSR.S ToDeepShit ; (6) trapv instruction
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BSR.S ToDeepShit ; (7) privilege violation
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BSR.S ToDeepShit ; (8) trace
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BSR.S ToDeepShit ; (9) line 1010 (temporarily)
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BSR.S ToDeepShit ; (10) line 1111
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BSR.S ToDeepShit ; (11) other exceptions (TRAP calls, spurious int, etc)
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BSR.S ToDeepShit ; (12) Place holder for no trap number exception
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IRQException
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BSR.S ToDeepShit ; (13) interrupt exceptions
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NMIExcp BSET #7,NMIFlag ; use high bit of NMI flag as indicator <C1/14Apr86>
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BEQ.S IRQException ; process first interrupt <23Jul85><1.4>
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RTE ; else just ignore <23Jul85>
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ENDP ; <C152>
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;----------------------------------------------------------------------
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; Routine SystemError
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; Arguments D0.W (input) System error number
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; Function Handle system errors. Allows consistant interface to
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; debuggers.
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; Stack is cleansed of all trap parameters, so that return with RTE <13Jul85>
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; depends on information restored from SEPC and SESR. <13Jul85>
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; Nowadays, debugger is called with exception parameters on stack. <02Nov85> JTC
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; So must dummy up a format-0 frame when SystemError is called. <02Nov85> JTC
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;----------------------------------------------------------------------
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SystemError PROC EXPORT ; <C152>
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EXPORT SysErr1 ; <C882>
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EXPORT SysErr2 ; <C152>
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IMPORT DebugProlog ; <C152>
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IMPORT DSErrorHandler ; <C152>
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MOVEM.L D0-D7/A0-A7,SEVars ; save regs up high in nub space
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; entry point from BadTrap routine <C882>
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SysErr1 MOVE.W SR,SESR ; save SR <13Jul85>
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MOVE.L (SP)+,SEPC ; clean PC for fall-through to SysErr2 <13Jul85>
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TST.B CPUFlag ; zero for 68000 <02Nov85> JTC
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BEQ.S SysErr2 ; no need for dummy frame on old cpu <02Nov85> JTC
|
||
CLR.W -(SP) ; <02Nov85> JTC
|
||
|
||
; entry point for standard system exceptions (address error, etc)
|
||
|
||
SysErr2
|
||
TST.B MacJmpFlag ; re-entrancy? (presumed PLus for SystemError) <v1.2>
|
||
BMI.S @0 ; yes, skip reg saving
|
||
MOVE.L SP,SEA7 ; save true PC
|
||
@0 ; deleted obsolete stack-cleansing instructions <13Jul85>
|
||
BSET #7,MacJmpFlag ; prevent re-entrancy, vote Republican <v1.2>
|
||
|
||
cmpi.w #13,d0 ; was it an NMI? <1.5>
|
||
bne.w @continue ; no, proceed <1.5>
|
||
|
||
TestFor RBVExists ; <1.5>
|
||
beq.s @noRBV ; <1.5>
|
||
|
||
btst.b #ProductInfo.PGCInstalled,UnivRomFlags+3 ; see if we have a PGC chip <9><4><H5><SM4>
|
||
beq.s @continue ; no, handle normal NMI-- there is no parity <4><SM5>
|
||
|
||
move.l VIA,A0 ; get VIA1 base <1.5>
|
||
eieioSTP
|
||
btst #vPGCEnb,VBufB(a0) ; is parity enabled? <1.5>
|
||
eieioSTP
|
||
bne.s @continue ; no, proceed <1.5>
|
||
eieioSTP
|
||
bclr #vPGCErr,vDirB(a0) ; make parity error bit an input <1.5>
|
||
eieioSTP
|
||
move.b VBufB(a0),d1 ; read parity error flag <2.1>
|
||
eieioSTP
|
||
bset #vPGCErr,vDirB(a0) ; back to an output <1.5>
|
||
eieioSTP
|
||
btst #vPGCErr,d1 ; was NMI caused by parity error? <1.5>
|
||
bne.s @continue ; no, restore ddr and proceed <1.5>
|
||
eieioSTP
|
||
bset #vPGCEnb,VBufB(a0) ; yes, disable parity (so we won't get int again<1.5>
|
||
eieioSTP
|
||
bra.s @parityErr ; and blast the warm start flag
|
||
@noRBV
|
||
|
||
WITH DecoderInfo
|
||
TestFor RPUExists ; do we have RPU parity?
|
||
beq.s @continue ; no, skip...
|
||
|
||
movea.l OSS,a0 ; get OSS address
|
||
eieioSTP
|
||
move.w OSSIntStat(a0),d1
|
||
eieioSTP
|
||
btst #OSSIntRPU,d1 ; did the RPU cause the interrupt?
|
||
beq.s @continue ; no, handle normal NMI
|
||
eieioSTP
|
||
clr.b OSSMskRPU(a0) ; disable RPU parity interrupts <2>
|
||
eieioSTP
|
||
movea.l UnivInfoPtr,a0
|
||
adda.l ProductInfo.DecoderInfoPtr(a0),a0
|
||
movea.l RPUAddr(a0),a0 ; get RPU base
|
||
st.b rpuReset(a0) ; reset serial ptr
|
||
move.l (a0),d1
|
||
bset.l #16,d1 ; clear the parity error
|
||
move.l d1,(a0)
|
||
@parityErr
|
||
IF Supports24Bit THEN ; <SM7>
|
||
moveq #true32B,d0 ; 32 bit mode to look at BootGlobs <1.9>
|
||
_SwapMMUMode ; switch to 32 bit mode <1.9>
|
||
move.l BootGlobPtr,a1 ; get ptr to boot globals (near top of RAM) <1.6><1.8>
|
||
clr.l StartGlobals.sgWarmStart(a1) ; <SM3> CSS clear boot-globs warm start flag
|
||
_SwapMMUMode ; switch back to previous mode (in d0) <1.9>
|
||
ELSE
|
||
move.l BootGlobPtr,a1 ; get ptr to boot globals (near top of RAM) <1.6><1.8>
|
||
clr.l StartGlobals.sgWarmStart(a1) ; <SM3> CSS clear boot-globs warm start flag
|
||
ENDIF
|
||
clr.l WarmStart ; clear low memory global warm start flag <1.6>
|
||
moveq #dsParityErr,d0 ; yes, set parity error code <1.5><1.7>
|
||
@continue ; <1.5>
|
||
cmpi.w #dsNoPatch,d0 ; is this Error can't find patch ? <SM6> rb
|
||
beq.s @PreCubeE ; change the error message then <SM6> rb
|
||
cmpi.w #dsBadPatch,d0 ; is this a can't load patch message ? <SM6> rb
|
||
bne.s @SaveErr ; if not, don't touch it <SM6> rb
|
||
@PreCubeE ; SM ROMs don't have patches, user booted 7.0 <SM6> rb
|
||
moveq #dsOldSystem,d0 ; set error (system on disk is too old) <SM6> rb
|
||
@SaveErr ; <SM6> rb
|
||
|
||
MOVE.W D0,DSErrCode ; Save the possibly modified ErrCode <SM7>
|
||
|
||
; now we've set up all regs, etc. Time to decide whether to call the debuggers
|
||
; or just call the Deepshit code
|
||
|
||
BSR DebugProlog ; any debuggers?
|
||
BPL.S Call2DS ; yes, but not initialized (init bit not set)
|
||
BNE.S CallDB ; yes, initialized, call 'em
|
||
|
||
; We got a system error w/un-initialized debuggers, if NMI then assume that user wants to try
|
||
; to get the debugger up and running.
|
||
|
||
Call2DS CMP.W #13,D0 ; Exception?
|
||
BNE.S CallDS ; no, call the deepshit handler
|
||
|
||
MOVEQ #0,D0 ; set special system error (0) for initialization
|
||
BRA.S CallDB ; and call the debugger
|
||
|
||
CallDS LEA DSErrorHandler,A1 ; point at system alert handler
|
||
CallDB Move.L A1,D1 ; check if A1 is nil <A375>
|
||
BEQ.S CallDS ; if nil, go to DSErrorHandler <A375>
|
||
JSR (A1) ; call the debugger/system error handler
|
||
TST.W D0 ; any error?
|
||
BNE.S CallDS ; yes, call deepshit
|
||
|
||
SysErrExit
|
||
BCLR #7,MacJmpFlag ; NOT in debugger any longer <v1.2>
|
||
MOVEM.L SEVars,D0-D7/A0-A7 ; restore regs
|
||
|
||
; In order to return with RTE, must set up vanilla 000 or 4-word 010/020 frame. <13Jul85>
|
||
|
||
MOVE.L SEPC,-(SP) ; push user's PC
|
||
MOVE.W SESR,-(SP) ; restore status reg
|
||
RTE ; and return to caller
|
||
|
||
ENDP ; <C152>
|
||
|
||
END
|
||
|