7800 lines
368 KiB
Plaintext
7800 lines
368 KiB
Plaintext
;__________________________________________________________________________________________________
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;
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; File: UniversalTables.a
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;
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; Contains: Product decoder and info tables
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;
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; Written by: Horrorists, SuperMarioists, and Universalists everywhere
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;
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; Copyright: © 1991-1994 by Apple Computer, Inc. All rights reserved.
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;
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; Change History (most recent first):
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;
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; <SM107> 1/14/94 LB The product info table for TNTProto1 now uses the Fridgidaire
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; floppy drive and media icons.
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; <SM106> 12/13/93 PN Roll in KAOs and Horror changes to support Malcom and AJ
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; machines.
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; <SM105> 11/19/93 chp Add hasEnhancedLtalk ProductInfo flag to Cyclone/Tempest
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; products. Support for both internal and external SCSI96 buses on
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; TNT.
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; <SM104> 11/17/93 KW added a 40 MHz wombat to the STP product tables.
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; <SM103> 11/10/93 fau Added the TNT Product Info Tables.
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; <SM102> 11/10/93 KW added STPs own productinfo tables. Thanks to rich.
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; <SM101> 11/9/93 KW hacked in some changes for STP machines. Because of the hacks,
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; old quadras, wombats probably will not boot. I will fix that
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; and make less of a hack after our SCM build
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; <SM100> 11/8/93 JRH boxDBLite16 is now boxPowerBookDuo250. boxDBLite20 is now
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; boxPenLite.
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; <SM99> 10/21/93 SAM Roll in <MC7> from cm900ftjesus.
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; <MC7> 10/21/93 SAM Added SoundStereoMixing and SoundPlayAndRecord to PDM,
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; ColdFusion, and CarlSagan's Universal tables.
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; <SM98> 10/21/93 GMR Roll in <MC6> from mc900ftjesus.
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; <MC6> 10/20/93 GMR Fixed the BartExists valid flag for CF so it properly does the
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; optional check for it (as in PDM).
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; <SM97> 10/10/93 SAM Roll in <MC4> and <MC5> from mc900ftjesus.
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; <MC5> 10/10/93 SAM For PDM: Added hasEnhancedLTalk to PDM/ColdFusion/CarlSagan, cuz
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; they do.
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; <MC4> 10/10/93 SAM For PDM: Changed the PDM labels (since the evt support has been
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; dropped). Removed hasSoftVBL from PDM/CF/CS. Added hasNewMemMgr
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; to all three. Pointed Carl Sagan's decoder table ptr at PDM's
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; instead of Cold Fusion's (which has a different internal SCSI
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; address...)
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; <SM96> 10/6/93 RC Take Out PDM EVT1 support
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; <SM95> 10/1/93 JDR Updated the snd primitives routine names according to
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; SndPrimitives.a.
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; <SM94> 9/25/93 SAM Backed out the last change. The productInfo tables should be
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; keyed off of a decoder type.
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; <SM93> 9/15/93 PN Add hasAMIC into ProductInfo table for PDM to fix the Universal
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; build
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; <SM92> 8/20/93 chp The name of the Cyclone interrupt primitives table changed in
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; InterruptHandlers.a. Reflect that change in ProductInfo.
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; <SM91> 8/17/93 SAM Put forSmurf conds around all the smurf junk.
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; <SM90> 08-16-93 jmp Changed the PDM VideoInfo record to reflect the fact that PDM
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; uses Slot $9’s sPRAM as is reserved in the NuBusInfo record for
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; PDM. This fixes the problem where PDMs sPRAM kept getting blown
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; away.
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; <SM89> 8/13/93 KW adding two more smurf wombats
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; <SM88> 8/12/93 BG Removed the ProductInfo for WLCD_C1 as it will never exist.
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; Added ProductInfo (and associated pointers) for Carl Sagan.
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; <SM87> 8/11/93 RC Enabled extra slots on PDM and Cold Fusion for Second Wave Nubus
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; Expansion box
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; <SM86> 8/11/93 KW added some productinfo tables for a few new smurf machines
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; <SM85> 8/4/93 GMR Added separate NuBusInfo table for ColdFusion, and fixed the one
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; for PDM.
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; <SM84> 08-03-93 jmp Update the videoinfo records in this file to contain the new
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; field from the HORROR sources.
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; <SM83> 7/27/93 GMR Added Bart flags and base addresses to PDM/ColdFusion tables.
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; <SM82> 7/14/93 PN Add hasHardPowerOff to MacLC external feature
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; <SM81> 6/28/93 SAM Updated the ColdFusion family table to know about the second
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; SCSI bus (ie the SCSI mgr can now handle it!)
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; <SM80> 6/24/93 SAM Added one table for all the ColdFusions (w/o SCSI2exists for
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; now)
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; <SM79> 6/17/93 joe Added the SoundInLineLevel bit to the PDMInfo records so that
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; Telecaster will turn on its mic preamp.
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; <SM78> 6/14/93 kc Roll in Ludwig.
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; <SM78> 6/10/93 SAM Add hasHardPowerOff to PDM info.
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; <LW14> 4/29/93 fau Bug#: 1081636: Added the SoundLineLevelInput to Cyclone and
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; Tempest. Changed all Sound8BitMono to SoundHasSoundIn. Added
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; SoundStereoIn where appropriate. All these are to reflect
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; changes in Reality.
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; <LW13> 4/19/93 chp Fix some documentation.
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; <LW12> 4/14/93 fau Added the required changes for moving CivicExists and
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; SebastianExists to Cyclone/Tempest info tables. Added hasPRAM
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; to slots A/B for Cyclone/Tempest.
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; <SM77> 6/3/93 SAM Updated PDMs boxflags to correspond with the changes made in
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; InternalOnlyEqu.a
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; <SM76> 6/2/93 GMR Changed PDM's Interrupt table to point to it's own, unique table
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; (for disabling level 3 ints).
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; <SM75> 5/25/93 joe Now the PDM info tables use SndCntlPDM instead of
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; SndCntlCyclone.
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; <SM74> 5/19/93 GMR Moved Sonydriver icon tables over to this file, so we don't have
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; to change the floppy driver for each new machine.
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; <SM73> 5/6/93 SAM Turned SoftVBLs back on for both kinds of PDMs. Put the VIA1
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; initialization back the way it should be (not the cyclone way) -
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; for PDM.
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; <SM72> 5/3/93 RC Turned on SerialDMA driver for AMIC 2 PDM and made sure that it
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; was not turned on for PDM (EVT1)
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; <SM71> 4/22/93 SAM Changed some offsets in the PDMAMIC2Info table that were added
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; in the previous change.
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; <SM70> 4/21/93 SAM Added an entry for the Evt2 PDMs which have a different CPU id.
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; <SM69> 4/15/93 RC Turned off Serial DMA for PDM
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; <SM68> 4/11/93 chp Add SerialDMA and HAL binding to ProductInfo of Cyclone,
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; Tempest, and PDM. Fix usage of has68kEmulator for dc.l instead
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; of BitVector32 because the latter doesn't accept encoded values.
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; <SM67> 4/6/93 fau Removed the 'slotDisabled' from PDM's NuBus info table so that
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; we can support the Ventana Board.
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; <SM66> 4/5/93 jb Changed "SingerExists" to "AwacsExists" in hasHMC & infoPDM.
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; <SM65> 3/31/93 chp Synchronize SuperMario with Ludwig changes.
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; <LW9> 3/24/93 mal Removed hasinterrupt flag from slot 9 for Cyclone & Tempest.
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; <LW8> 3/22/93 fau Added a new VideoInfoTempest to support a different board id for
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; Tempest. Note that Cyclone33 and Cyclone40 share the same one,
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; as do Tempest25 and Tempest33 -- this should probably change if
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; these other machines ship.
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; <LW7> 3/21/93 fau Changed the DefaultRSRC for Cyclone40/33 to 4 (maybe NonFPU)
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; from 3 (FPU only). These should really be equates.
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; <SM64> 3/5/93 CCH Added MaceExists to PDMInfo and Mace address to HMCDecoderInfo.
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; <LW6> 2/26/93 fau Updated the ID for Cyclone40 (HW requested an $F --I don't like
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; it but tough). Removed all support for Cyclone EVT3.
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; <LW5> 2/24/93 chp Cyclone VIA1 port A initialization updated to take advantage of
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; the new wait/request multiplexer in the rev. 04 PSC.
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; <LW4> 2/15/93 FU Moved the InfoCycloneEVT3 record to be after the other 4 cyclone
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; ones, so that we always compare first against a YMCA-based
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; machine. Fixed the offset of a couple of tables in
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; InfoCyclone40 that were using InfoCyclone33 as their base!
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; <LW3> 2/12/93 GS Updated the InfoCyclone40 record to conatin the new CPUID for
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; the 40MHz Cyclone.
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; <SM63> 2/11/93 CSS Update Vail tables to indicate Egret8 and VDACAddr (SONORA) is
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; valid. So that Vail CPU will boot again with SuperMario.
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; <SM62> 2/8/93 CSS Update from Horror: Add OrwellExists to Quadra based machines.
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; This to get the test TestFor OrwellExists to work in the SCSI
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; manager to determine whether to run the SCSI96 SCSI manager or
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; the SCSI96BIOS SCSI manager. This test may not be the best test
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; for this, but this is the way it was in Horror.
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; <SM61> 2/5/93 SAM Touched up the last touchup. Sorry about that.
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; <SM60> 2/5/93 SAM Touched up the last checkin.
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; <SM59> 2/5/93 RC Added has68kEmulator to Smurf on Wombat
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; <SM57> 2/5/93 SAM Hey, PDM supports 256 mb of RAM now. How much does yours?
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; <SM56> 2/2/93 GMR Added SWIM3Exists flag to PDM tables.
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; <SM55> 1/27/93 RC Added the AMICExists flag to PDM
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; <LW2> 1/22/93 fau Expanded the RamInfoTempest table to include all 8 possible
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; banks.
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; <SM54> 1/15/93 RC Took out the auto RAM Disk on Doot of PDM and reset the RAM size
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; to 11 Meg
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; <SM53> 1/14/93 PN Add MacIIsiIntTbl and SndCntlMacIIsi tables for Macsi to make
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; SuperMario boot on si again.
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; <SM52> 01-13-93 jmp Pointed VideoInfo Pratt at the CSC super sResource directory.
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; <SM51> 01-11-93 jmp Updated various BoxFlag names.
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; <SM50> 1/10/93 RC SWIM support worked on for Smurf on Wombat
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; <SM49> 1/10/93 RC added IWM and SoftPower flags to PDM
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; <SM48> 12/23/92 RC Added Support for Smurf on Wombat
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; <SM47> 12/21/92 SWC Removed the InfoPrattUnknown ProductInfo table since Pratt has a
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; CPU ID register and thus has no need of an "unknown" table.
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; <SM46> 12/17/92 RB Removed some of the LC930 conditionals. Added back other hasXXXX
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; conditionals to make it easier to build 1 off 1 Meg ROMs.
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; Rescued the IIsi from the grave. Added hasYMCA for Cyclone
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; machines and hasHMC for PDM.
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; <SM45> 12/9/92 SAM Changed the CPU ID for PDM . Added 3 additional CPU IDs for the
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; other PDM "boxes."
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; <SM44> 12/9/92 jmp Changed PDM’s VideoInfo record so that the physical framebuffer
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; base is now at 0 and not 1M. Also, reflected this changed in
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; the logical base, as well.
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; <SM43> 12/5/92 jmp Temporarily pointed BlackBird’s VideoInfo tables to the
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; “unknown” directory since CSC won’t be ready for initial
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; bring-up (we’ll be using the VSC MMU-based DeclData instead).
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; <SM42> 12/5/92 SWC Added special sound table for DJMEMC machines so their sound
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; hardware initialization can also whack built-in video.
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; <SM41> 12/4/92 fau Added StereoPlayandRecord and StereoMixing external features
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; flags to Cyclone-type machines.
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; <SM40> 12/4/92 fau Added tables for Tempest33 and Cyclone40 and update to use new
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; boxflag names for Cyclone-type machines. Backed out <SM36>.
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; <SM39> 12/1/92 EH Adding Tables for Blackbird.
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; <SM38> 12/1/92 SWC Added IntHandlerPtr, a pointer to the interrupt handler setup
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; table, to the ProductInfo tables. Removed all the Mac II family
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; tables.
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; <SM37> 11/30/92 dwc Added AMIC address to HMCDecoderTable for PDM.
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; <SM36> 11/23/92 mal Moved CIVIC baseaddr to new location in DecoderInfo Table since
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; DAFBAddr split with CIVICAddr.
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; <SM35> 11/23/92 SWC Added an IMPORT of CudaADBTable and pointed all the Cuda-based
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; machines to it.
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; <SM34> 11/20/92 fau Modified the BasesValid2 for Tempest to not have any flags so
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; that GetExtHardwareInfo will uses the YMCA decoder default bases
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; to look and see if a MUNI exists. Added MUNIExists to Cyclone,
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; CycloneEVT4 and to MMC/YMCADecoder.
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; <SM33> 11/19/92 SWC Added PowerManagerPtr, a pointer to the Power Manager primitives
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; table, to the ProductInfo tables. Put build conditionals back
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; in. Obsoleted old tables and grouped them at the end of the file
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; for later permenant deletion.
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; <SM32> 11/11/92 fau Add ROM external feature bit and set on for Tempest to indicate
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; that machine has Hard Power off.
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; <SM31> 11/10/92 RB Moved four export labels that are undefined under an LC930
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; build.
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; <SM30> 11/7/92 jmp Eliminated the obsolete DAFB and LC VideoInfo records.
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; <SM29> 11/7/92 rab Roll in Horror changes. Comments follow:
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; <H64> 10/17/92 BG Added information for a possible WLCD33.
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; <H63> 10/16/92 JC Add ROM external feature bit and set on for Vail and WLCD to
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; indicate that machine has Hard Power off so it can be used by a
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; disk based gestalt patch so that we do not need to add
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; additional items to the table in the disk patch.
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; <H62> 9/10/92 NJV Changed Vail table to no longer support simultaneous play and
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; record and pointed sound primitives to new Vail sound primitives
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; table.
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; <H61> 8/25/92 BG Modified CPUIDProductLookup table to add a '-*' to the Wombat40F
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; table entry. Oops.
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; <H54> 6/30/92 HJR Cleaned up the NubusInfoDartanian and modified VideoInfoDart to
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; use second wrap of the GSC to prevent QuickDraw bug.
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; <H53> 6/26/92 BG Modified InfoWombat20, Wombat25 to have the correct combo
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; resource byte for having an optional FPU (040LC or 040).
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; <H52> 6/26/92 BG Added Wombat20,40 and WLCDc1 to the table so that they'll be
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; looked for.
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; <H51> 6/22/92 BG Added WLCDc1, Wombat20 and Wombat40L universal table entries, as
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; Prod. Marketing seems to think they will become products
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; sometime in the near future.
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; <H50> 6/16/92 BG Changed the WLCD productInfo tables to point at the WLCD NuBus
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; info. Also changed WLCD default resource combo to 4.
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; <H49> 6/10/92 BG Changed the separator in the RamInfoWombat table from 'SamB' to
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; its hex equivalent. For some reason, Asm was interpreting that
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; as a PASCAL string (??) and adding a length byte to the start of
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; it.
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; <H48> 6/9/92 BG Fixed VIA1InitWombat to correctly set PA6 as an INPUT.
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; <H47> 6/4/92 NJV Changed InfoVail tables since we can now play and record
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; simultaneously.
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; <H46> 6/3/92 BG When I updated the InfoWombat33F ProductInfo entry, I forgot to
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; change the VIA1 ID bits. Fixed.
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; <H45> 6/3/92 BG Rearranged the RamInfoWombat table to have the table-separator
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; marker after banks 6&7 to make the djMEMCMerge code in
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; SizeMemPatch.a a little easier to deal with.
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; <SM28> 11/3/92 SWC Changed SlotEqu.a->Slots.a.
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; <SM27> 10/30/92 HY Added SupportsROMDisk feature flag in InfoMacLC product info table.
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; <SM26> 10/27/92 fau Added Tempest support. Removed ASCExists from Cyclone's
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; universal info and added DSPExists and MACEExists to it.
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; <SM25> 10/25/92 HY Changed boxflag for InfoMacLC product info table to boxMacLCII.
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; <SM24> 10/22/92 fau Updated NubusInfoCyclone to reenable the slots that have been
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; disabled way back in Pandora days.
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; <SM23> 10/22/92 fau Deleted MMCExists and YMCAExists from all Cyclone related info.
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; Added DSPExists and MACEExists to those structures.
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; <SM22> 10/20/92 CCH Added InfoPDM to list of CPUID machines.
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; <SM21> 10/18/92 CCH Added support for the PDM CPU.
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; <SM20> 10/12/92 RB For the 1 Meg LC930 ROM, exclude all tables not related to the
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; LC hardware.
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; <SM19> 9/30/92 fau Added support for Cyclone EVT4. This included a new memory
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; decoder YMCA added to the DecoderKind record, a new
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; CycloneInfoEVT4 record and a new RamInfo record for EVT4. Also,
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; used bit 21 that was unused in the universal bits for the YMCA.
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; It should eventually be moved to the bit that the MMC uses right
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; now.
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; <SM18> 9/25/92 RB Added a ROM base address for dbLite & Cyclone when booting from
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; RAM that is set to 4 Meg. Made the LC table work with LC II
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; again. This will prevent the normal LC from booting, but at this
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; point we need LC II to boot and not LC.
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; <SM17> 9/9/92 RB Make the Mac LC boot on SuperMario by moving up the ProductInfo
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; for the LC. Changed the DecoderInfo record for VISA (MacLC) to
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; match the real LC ROM (Somehow it got screwed up) and added a
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; sound control vector address for LC.
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; <SM16> 9/8/92 chp For Cyclone, program the VIA1 port A W/Req bit as an output.
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; This makes it a flip-flop which is initialized to “1,” disabling
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; LocalTalk from polling serial characters on SCC port A.
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; <SM15> 8/26/92 PN Set ASCBase globals to a safe location on Cyclone so that
|
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; application that writes to ASCBase will safely write to ROM
|
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; <SM14> 8/24/92 PN Take out CycloneboxEVT1 stuff
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; <SM13> 8/20/92 CCH Changed Orwell address to $50F0xxxx space instead of $5000xxxx
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; space.
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; <SM12> 8/17/92 CCH Extended universal support to 96-bit, added versions for
|
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; ProductInfo and DecoderInfo records, created DecoderAddr field
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; in DecoderInfo for memory controller addresses, moved OrwellAddr
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; field to DecoderAddr field, and started using BitVector32 macro.
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; <SM10> 7/27/92 CSS Disable NewAge for EVT1.
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; <SM9> 7/13/92 CCH Added conditionalized support for Cub Card on Quadra 700.
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||
; <SM8> 6/21/92 RB Added a table for Cyclone EVT2, renamed the old Cyclone tables
|
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; CycloneEVT1. The EVT1 support will be deleted later, after all
|
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; systems have been upgraded to EVT2.
|
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; <SM7> 6/18/92 RB Added a compile time conditional to temporarily support EVT1
|
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; Cyclone. Look for 'forEVT1'
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; <SM6> 6/4/92 KW (HJR,H44) Added dockingSlot to Dartanian slot E and enabled
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; Slots C & D for Monet.
|
||
; (BG,H43) Modify some of the Wombat/WLCD universal table entries
|
||
; for optional FPU info, as well as an updated VIA1 CPU ID
|
||
; selection scheme.
|
||
; (NJV,H42) Adding SoundPlayAndRecord bit to ProductInfo Tables of
|
||
; machines that can play and record simultaneously.
|
||
; (BG,H41) Added Wombat(20,25,33,40) and WLCD (20,25) Universal
|
||
; information.
|
||
; (SWC,H40) Updated RamInfoDBLite for expandability up to 40MB.
|
||
; (jmp,H39) Changed the “sRsrcZydecoDir” name to the more generic
|
||
; “sRsrcBFBasedDir” (BF=BoxFlag) name.
|
||
; (AL,H38) Updated the Sonora info for the IHT entry point
|
||
; (changed from $58000000 to $50fc0000).
|
||
; The following H24..H21 came from Universal.a in Horror
|
||
; (NJV,H24) Added SoundPlayAndRecord bit to ProductInfo Tables of
|
||
; machines that can play and record simultaneously.
|
||
; (jmp,H23) Fixed a problem in the VideoInfo MacLC record that I
|
||
; caused in <H21>.
|
||
; (jmp,H22) Changed the “sRsrcZydecoDir” name to the more generic
|
||
; “sRsrcBFBasedDir” (BF=BoxFlag) name.
|
||
; (jmp,H21) Pruned the array of V8 VideoInfo records ’cuz we no
|
||
; longer need ’em.
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||
; <SM5> 5/28/92 KW Some Horror Stuff. Moved VisaDecoderTable entry in
|
||
; DecoderLookup in front of Niagra. Changed VisaDecoderTable.
|
||
; Added PatchRomAddr to OrwellDecoderTable. Added
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||
; (1<<PatchROMExists) to InfoQuadra900,InfoQuadra700.
|
||
; VideoInfoDAFB changed to F900000. Added H20 to nubusInfoMacLC
|
||
; <SM4> 5/26/92 CSS Cyclone roll in.
|
||
; <SM3> 5/25/92 RB Second pass of Cyclone changes...Removing Carnation and 4Square
|
||
; tables.
|
||
; <SM2> 5/22/92 RB Cyclone changes, added tables for Cyclone, and CUDA.
|
||
; <SM1> 5/2/92 kc Roll in Horror. Comments follow:
|
||
; <H34> 4/21/92 JC Add SonoraExistsBit to ExtValid flags for Sonora based machines.
|
||
; <H33> 4/20/92 NJV Adding changes needed to support Patch ROMs
|
||
; <H32> 4/19/92 JC Update Vail and Carnation Nubus Info tables. Move onboard video
|
||
; PRAM to slot B.
|
||
; <H31> 4/6/92 SWC Fixed DBLite's diagnostic ROM base address.
|
||
; <H30> 4/3/92 SWC Added ADB/DebugUtil primitives vector table to ProductInfo for
|
||
; each machine.
|
||
; <H29> 3/17/92 SWC Renamed InfoDBLite->InfoDBLite25 and InfoDBLiteLC->InfoDBLite33
|
||
; to reflect reality. Added InfoDBLite16 and InfoDBLite20 in case
|
||
; we decide to use them.
|
||
; <H28> 2/25/92 SWC Added SoundStereoMixing to the external features for the
|
||
; Carnation and Dartanian boxes.
|
||
; <H27> 2/21/92 HJR Enabled VDAC on NiagraInfo.
|
||
; <H26> 2/20/92 JC Update Carnation product info tables to enable Sonic when second
|
||
; rev Sonoras are available.
|
||
; <H25> 2/19/92 JC Update CPUID Register values for Carnation when not using 1st
|
||
; rev Sonora.
|
||
; <H24> 02/18/92 jmp Conditionalized (with “hasSonora1”) the video base addresses for
|
||
; the Sonora-based machines for the upcoming turn of the Sonora
|
||
; hardware.
|
||
; <H23> 2/18/92 JC Changed boxCarnation to boxCarnation33 and boxVail to boxVail25
|
||
; and added support for other Sonora based CPUs when hasSonora1 is
|
||
; false.
|
||
; <H22> 2/14/92 JC Remove alternate ROM Physical address for Sonora based machines.
|
||
; <H21> 2/13/92 HJR Added NiagraExistsBit to Niagra's ProductInfo external features,
|
||
; since Niagra is just a minor variant of Jaws.
|
||
; <H20> 1/30/92 SWC DBLite NuBus: marked slot 9 disabled since we'll be using its
|
||
; PRAM for Power Manager stuff, and enabled slots C and D so that
|
||
; NuBus cards installed in Gemini (docking station) will be
|
||
; recognized.
|
||
; <H19> 1/20/92 JC Use alternate ROM physical Address on Sonora based machines to
|
||
; be able to support Double Exposure on Vail and Enable FPUs on
|
||
; Carnation.
|
||
; <H18> 01/11/92 jmp Fixed some types in the InfoCarnation tables.
|
||
; <H17> 01/11/92 jmp Added in the two new fields for each of the VideoInfo records in
|
||
; this file.
|
||
; <H16> 1/9/92 SWC Marked slot E in DB-Lite's NubusInfo table as a docking slot so
|
||
; we can figure out which it is without hard-coding it someplace
|
||
; else.
|
||
; <H15> 12/20/91 JC Add Carnation 3 slot 16/25/33 Mhz and Vail 16/25 Mhz
|
||
; <H14> 12/16/91 HJR Add Tables for Niagra and Dartanian.
|
||
; <H13> 12/5/91 SAM Removed Vail's RAMInfo table cuz it is now indentical to
|
||
; Carnation's table.
|
||
; <H12> 12/4/91 SWC Added 3 new RAM banks to DB-Lite's RAM info table.
|
||
; <H11> 12/4/91 SWC Updated DB-Lite's CPU ID value for final hardware, and added a
|
||
; ProductInfo table for DB-Lite LC. Moved the CPU ID register
|
||
; description and the comment list containing the supported
|
||
; machines here so it'll be next to the CPUID ProductInfo table.
|
||
; <H10> 12/4/91 CCH Changed DBLite, Carnation, Vail to use ProductInfo-based CPUID
|
||
; register scheme. Also reorganized file to be info-type based.
|
||
; <H9> 11/26/91 jmp Added a “VDAC” for DBLite and updated the framebuffer base
|
||
; address for the DBLite and Sonora tables.
|
||
; <H8> 11/25/91 SAM Added Vail/Carnation RAMInfo tables.
|
||
; <H7> 11/25/91 CCH Modified Carnation/Vail's NuBus info table to not nuke
|
||
; SecondWave. Also used standard VIA equates.
|
||
; <H6> 10/30/91 SWC Added IWM base address to MSC/DB-Lite tables since we now have
|
||
; dynamic support for it in the Sony driver.
|
||
; <H5> 10/22/91 SWC Removed references to MSCAddr and MSCExists and added
|
||
; MSCChipBit, since MSC is just a variant of the RBV.
|
||
; <H4> 10/15/91 SWC Added clock/PRAM primitives vector table to ProductInfo for each
|
||
; machine.
|
||
; <H3> 8/28/91 rww More header cleanup.
|
||
; <H2> 8/28/91 rww Header cleanup.
|
||
; <H1> 8/28/91 rww First checked in.
|
||
;__________________________________________________________________________________________________
|
||
|
||
; From now on, new product and decoder tables should go here. Since we can't patch these
|
||
; tables anyway, from now on they'll be located just underneath the dispatch table at link
|
||
; time, so the file can grow to fill the remaining free space. This should make
|
||
; it much easier to add new CPUs.
|
||
|
||
; The DB-Lite and unknown decoder and info tables were moved from Universal.a in order to
|
||
; free up some space there (about 350 bytes).
|
||
|
||
Print Off
|
||
Load 'StandardEqu.d'
|
||
Include 'HardwarePrivateEqu.a'
|
||
Include 'UniversalEqu.a'
|
||
Include 'Slots.a'
|
||
Include 'DepVideoEqu.a'
|
||
include 'ROMEqu.a'
|
||
Print On
|
||
Machine MC68030
|
||
|
||
UnivTables Proc
|
||
|
||
With DecoderKinds,DecoderInfo,ProductInfo,NuBusInfo
|
||
IMPORT SNDCNTLSPIKE ; <SM17>
|
||
|
||
|
||
IF hasVIAClock THEN
|
||
IMPORT RTCClockPRAM ; <H4>
|
||
ENDIF
|
||
IF ViaADB THEN
|
||
IMPORT ViaADBTable ; <H30>
|
||
ENDIF
|
||
IF hasPwrMgrClock THEN
|
||
IMPORT PMGRClockPRAM ; <H4>
|
||
ENDIF
|
||
IF PwrMgrADB THEN
|
||
IMPORT PMgrADBTable ; <H30>
|
||
ENDIF
|
||
IF hasEgret THEN
|
||
IMPORT EgretClockPRAM ; <H4>
|
||
IMPORT EgretADBTable ; <H30>
|
||
IMPORT CudaClockPRAM ; <SM2>
|
||
IMPORT CudaADBTable ; <SM35>
|
||
ENDIF
|
||
IF hasOrwell THEN
|
||
IMPORT QuadraADBTable ; <H30>
|
||
ENDIF
|
||
IF hasProtectedPRAM THEN
|
||
IMPORT NoPRAMClockPRAM ; <H4>
|
||
ENDIF
|
||
IF IopADB THEN
|
||
IMPORT IOPADBTable ; <H30>
|
||
ENDIF
|
||
|
||
|
||
;———————————————————————————————————————————————————————————————————————————————————————————————
|
||
;
|
||
; CPUID Product Lookup Tables
|
||
;
|
||
; All CPUs listed in this table support the CPU ID register scheme.
|
||
;
|
||
; For truly hip, way new machines, a new CPU ID is defined (which hopefully will allow
|
||
; us to define new computers to our hearts' content without worrying about running out
|
||
; of IDs. The new register resides at the top of I/O address space ($5FFFFFFC) and is
|
||
; 32-bits long. It looks like this:
|
||
;
|
||
; Bits: : 31 - 16 : 15 - 12 : 11 : 10 - 0 :
|
||
; +-------------------------+---------+-----+-----------------+
|
||
; | signature, always $A55A | 0 to 15 | 0/1 | id field |
|
||
; +-------------------------+---------+-----+-----------------+
|
||
;
|
||
; Bits 15 to 12 represent the design center:
|
||
; b15 b14 b13 b12 Design center
|
||
; 0 0 0 0 High volume
|
||
; 0 0 0 1 Portables
|
||
; 0 0 1 0 High performance CISC
|
||
; 0 0 1 1 High performance RISC
|
||
; Bit 11 is a 0 if the whole ID exists in this ID register, 1 otherwise
|
||
; Bits 10 to 0 are the actual ID, per design center
|
||
;
|
||
; So, the currently defined machines and their CPU IDs are:
|
||
;
|
||
; %1010010101011010 0000 0 00000000000 $A55A 0000 high volume, ID 0: Vail 16MHz
|
||
; %1010010101011010 0000 0 00000000001 $A55A 0001 high volume, ID 1: Vail 25MHz
|
||
; %1010010101011010 0010 0 00000000010 $A55A 0003 high volume, ID 3: Vail 33MHz
|
||
;
|
||
; %1010010101011010 0001 0 00000000000 $A55A 1000 portables, ID 0: Yeager
|
||
; %1010010101011010 0001 0 00000000001 $A55A 1001 portables, ID 1: reserved
|
||
; %1010010101011010 0001 0 00000000010 $A55A 1002 portables, ID 2: Escher (33MHz) <H65>
|
||
; %1010010101011010 0001 0 00000000011 $A55A 1003 portables, ID 3: reserved (was PenLite)
|
||
; %1010010101011010 0001 0 00000000100 $A55A 1004 portables, ID 4: Duo 210 (25MHz)
|
||
; %1010010101011010 0001 0 00000000101 $A55A 1005 portables, ID 5: Duo 230 (33MHz)
|
||
; %1010010101011010 0001 0 00000000110 $A55A 1006 portables, ID 6: DBLite (16MHz)
|
||
; %1010010101011010 0001 0 00000000111 $A55A 1007 portables, ID 7: reserved 16MHz system
|
||
; &1010010101011010 0001 1 00000001000 $A55A 1008 portables, ID 8: BlackBird
|
||
;
|
||
; %1010010101011010 0001 0 00000010000 $A55A 1010 portables, ID 10: was an MBT system (yeager) not used
|
||
;
|
||
; %1010010101011010 0010 0 00000000000 $A55A 2000 high perf CISC, ID 0: Carnation
|
||
;
|
||
; %1010010101011010 0001 0 00000000111 $A55A 1808 portables, ID 0: Blackbird <SM39>
|
||
; %1010010101011010 0001 0 00000000111 $A55A 1809 portables, ID 1: reserved
|
||
; %1010010101011010 0001 0 00000000111 $A55A 180a portables, ID 2: reserved
|
||
; %1010010101011010 0001 0 00000000111 $A55A 180b portables, ID 3: reserved
|
||
; %1010010101011010 0001 0 00000000111 $A55A 180c portables, ID 4: reserved
|
||
; %1010010101011010 0001 0 00000000111 $A55A 180d portables, ID 5: reserved
|
||
; %1010010101011010 0001 0 00000000111 $A55A 180e portables, ID 6: reserved
|
||
; %1010010101011010 0001 0 00000000111 $A55A 180f portables, ID 7: reserved
|
||
;
|
||
; %1010010101011010 0010 1 01110101101 $A55A 2BAD high perf CISC ID 3AD: Wombat 20 MHz
|
||
; %1010010101011010 0010 1 01110101101 $A55A 2BAD high perf CISC ID 3AD: Wombat 25 MHz
|
||
; %1010010101011010 0010 1 01110101101 $A55A 2BAD high perf CISC ID 3AD: Wombat 33 MHz
|
||
; %1010010101011010 0010 1 01110101101 $A55A 2BAD high perf CISC ID 3AD: Wombat 40 MHz
|
||
; %1010010101011010 0010 1 01110101101 $A55A 2BAD high perf CISC ID 3AD: WLCD 20 MHz
|
||
; %1010010101011010 0010 1 01110101101 $A55A 2BAD high perf CISC ID 3AD: WLCD 25 MHz
|
||
;
|
||
; %1010010101011010 0011 0 00000010000 $A55A 3010 high perf RISC, ID 10: PDM <SM45>
|
||
; %1010010101011010 0011 0 00000010001 $A55A 3011 high perf RISC, ID 11: PDM (PDM in QFC)
|
||
; %1010010101011010 0011 0 00000010010 $A55A 3012 high perf RISC, ID 12: PDM (Carl Sagan)
|
||
; %1010010101011010 0011 0 00000010011 $A55A 3013 high perf RISC, ID 13: PDM (Cold Fusion)
|
||
;
|
||
; %1010010101011010 0011 0 00000010000 $A55A 3020 high perf RISC, ID 20: TNT
|
||
;
|
||
; %1010010101011010 0010 1 01000110000 $A55A 2830 Hi End Mac, ID 0: Cyclone 25/33/40 Mhz <SM7><SM26>
|
||
; Supplemental Cyclone/Tempest info in YMCA regs: M17 M16 M15 M14 <SM3><SM7><SM26>
|
||
;
|
||
; Cyclone33 : 0 1 1 1 ID = $7
|
||
; Cyclone40 : 1 1 1 1 ID = $F
|
||
; Tempest25 : 1 0 1 1 ID = $B
|
||
; Tempest33 : 1 0 0 0 ID = $8
|
||
;———————————————————————————————————————————————————————————————————————————————————————————————
|
||
EXPORT ProductLookup,CPUIDProductLookup,DecoderLookup
|
||
|
||
ALIGN 4
|
||
|
||
CPUIDProductLookup
|
||
IF hasHMC THEN ; <SM46>
|
||
dc.l InfoPDM-* ; PDM
|
||
dc.l InfoPDMcoldFusion-* ; PDM (Cold Fusion) <SM70>
|
||
dc.l InfoPDMCarlSagan-* ; PDM (Carl Sagan) <SM88>
|
||
ENDIF ; <SM46>
|
||
IF hasPratt THEN
|
||
dc.l InfoBlackbird-* ; Blackbird <SM39>
|
||
ENDIF
|
||
IF hasMSC THEN
|
||
dc.l InfoYeager-* ; Yeager with real MBT chip
|
||
dc.l InfoPowerBookDuo210-* ; PowerBook Duo 210
|
||
dc.l InfoPowerBookDuo230-* ; PowerBook Duo 230
|
||
dc.l InfoPowerBookDuo235-* ; PowerBook Duo 235 (230+active matrix)
|
||
;dc.l InfoEscher-* ; Escher 33MHz <H65>
|
||
ENDIF
|
||
IF hasSonora THEN
|
||
dc.l InfoVail16-* ; Vail 16 Mhz
|
||
dc.l InfoLCIII-* ; Vail 25 Mhz
|
||
dc.l InfoVail33-* ; Vail 33 Mhz <SM29>
|
||
ENDIF
|
||
IF hasDJMEMC THEN
|
||
dc.l InfoWombat20-* ; Wombat @ 20 Mhz in Lego packaging <H52><SM29>
|
||
dc.l InfoCentris650-* ; Wombat @ 25 Mhz in Lego packaging <H41><SM29>
|
||
dc.l InfoQuadra650-* ; Wombat @ 33 Mhz in Lego packaging <H41><SM29>
|
||
dc.l InfoQuadra800-* ; Wombat @ 33 Mhz in Frigidaire packaging <H41><H45><SM29>
|
||
dc.l InfoWombat40-* ; Wombat @ 40 Mhz in Lego packaging <H41><SM29>
|
||
dc.l InfoWombat40F-* ; Wombat @ 40 Mhz in Frigidaire packaging <H52><H61><SM29>
|
||
dc.l InfoCentris610-* ; WLCD @ 20 Mhz <H41><SM29>
|
||
dc.l InfoQuadra610-* ; WLCD @ 25 Mhz <H41><SM29>
|
||
dc.l InfoWLCD33-* ; WLCD @ 33 Mhz <H64><SM29>
|
||
IF forSmurf THEN
|
||
dc.l InfoRiscQuadra800-* ; Quadra800 w/Smurf card <SM86>
|
||
dc.l InfoRiscCentris650-* ; Centris650 w/Smurf card <SM86>
|
||
dc.l InfoRiscCentris610-* ; Centris610 w/Smurf card <SM89>
|
||
dc.l InfoRiscQuadra610-* ; Quadra610 w/Smurf card <SM89>
|
||
dc.l InfoRiscQuadra650-* ; Quadra650 w/Smurf card <SM89>
|
||
ENDIF
|
||
IF forSTP601 THEN
|
||
dc.l InfoSTPCentris650-* ; Centris650 w/STP card <SM86>
|
||
dc.l InfoSTPQuadra650-* ; Quadra650 w/STP card <SM86>
|
||
dc.l InfoSTPQuadra40F-* ; 40mhz wombat w/STP card <SM89>
|
||
dc.l InfoSTPQuadra800-* ; Quadra800 w/STP card <SM89>
|
||
dc.l InfoSTPCentris610-* ; Centris610 w/STP card <SM89>
|
||
dc.l InfoSTPQuadra610-* ; Quadra610 w/STP card <SM89>
|
||
ENDIF
|
||
ENDIF
|
||
IF hasYMCA AND hasPSC THEN ; <SM46>
|
||
dc.l InfoCyclone33-* ; Cyclone 33 Mhz <SM19> fau
|
||
dc.l InfoQuadra840AV-* ; Cyclone 40 Mhz <SM40> fau
|
||
dc.l InfoCentris660AV-* ; Tempest 25 Mhz <SM26> fau
|
||
dc.l InfoTempest33-* ; Tempest 33 Mhz <SM40> fau
|
||
ENDIF ; <SM46>
|
||
IF hasOrwell AND forSmurf THEN
|
||
dc.l InfoRiscQuadra700-* ; Quadra 700 w/Risc Card <SM86>
|
||
dc.l InfoRiscQuadra900-* ; Quadra 900 w/Risc Card <SM86>
|
||
dc.l InfoRiscQuadra950-* ; Quadra 950 w/Risc Card <SM86>
|
||
ENDIF
|
||
IF hasGrandCentral THEN
|
||
dc.l InfoTNTProto1-*
|
||
ENDIF
|
||
dc.l InfoUnknownUnknown-* ; totally lost
|
||
dc.l 0 ; end of list
|
||
|
||
|
||
;———————————————————————————————————————————————————————————————————————————————————————————————
|
||
;
|
||
; Decoder Lookup Table
|
||
;
|
||
;———————————————————————————————————————————————————————————————————————————————————————————————
|
||
|
||
ProductLookup
|
||
IF hasVISADecoder THEN ; <SM46>
|
||
dc.l InfoMacLC-* ; Macintosh LC <12><SM17>
|
||
ENDIF ; <SM46>
|
||
IF forSTP601 THEN
|
||
dc.l InfoSTPQuadra700-* ; Quadra 700 w/STP Card <SM86>
|
||
dc.l InfoSTPQuadra900-* ; Quadra 900 w/STP Card <SM86>
|
||
dc.l InfoSTPQuadra950-* ; Quadra 950 w/STP Card <SM86>
|
||
ENDIF
|
||
IF hasOrwell THEN
|
||
dc.l InfoQuadra700-* ; Quadra 700, 1 direct slot, 2 NuBus slots <T7>
|
||
dc.l InfoQuadra900-* ; Quadra 900, 1 direct slot, 5 NuBus slots <13>
|
||
dc.l InfoQuadra950-* ; Quadra 950, 1 direct slot, 5 NuBus slots <5>
|
||
ENDIF
|
||
IF hasJaws THEN
|
||
dc.l InfoPowerBook170-* ; PowerBook 140 and 170 <8>
|
||
ENDIF
|
||
IF hasNiagra THEN
|
||
dc.l InfoPowerBook180-* ; PowerBook 180 <H9>
|
||
ENDIF
|
||
IF hasVISADecoder THEN
|
||
dc.l InfoVISAUnknown-* ; unknown VISA decoder based machine <12>
|
||
ENDIF
|
||
IF hasJaws THEN
|
||
dc.l InfoJAWSUnknown-* ; unknown JAWS based machine <25>
|
||
ENDIF
|
||
IF hasMDU THEN ; <SM46>
|
||
dc.l InfoMacIIsi-* ; Macintosh IIsi <3><SM46>
|
||
ENDIF ; <SM46>
|
||
dc.l InfoUnknownUnknown-* ; totally lost
|
||
dc.l 0 ; end if list, no match, check decoder again
|
||
|
||
|
||
;———————————————————————————————————————————————————————————————————————————————————————————————
|
||
;
|
||
; Decoder Lookup Table
|
||
;
|
||
;———————————————————————————————————————————————————————————————————————————————————————————————
|
||
|
||
DecoderLookup
|
||
IF hasVISADecoder THEN ; <SM46>
|
||
dc.l VISADecoderTable-* ; check for VISA decoder <SM5>
|
||
ENDIF ; <SM46>
|
||
IF hasNiagra THEN
|
||
dc.l Niagratable-* ; check for Niagra decoder
|
||
ENDIF
|
||
IF hasJaws THEN
|
||
dc.l JAWStable-* ; check for JAWS decoder <25><61>
|
||
ENDIF
|
||
IF hasOrwell THEN
|
||
dc.l OrwellDecoderTable-* ; check for Orwell memory controller <13><19>
|
||
ENDIF
|
||
IF hasMDU THEN
|
||
dc.l MDUtable-* ; check for MDU decoder <SM46>
|
||
ENDIF
|
||
dc.l UnknownDecoderTable-* ; always find something
|
||
|
||
|
||
;———————————————————————————————————————————————————————————————————————————————————————————————
|
||
;
|
||
; Product Info Tables
|
||
;
|
||
;———————————————————————————————————————————————————————————————————————————————————————————————
|
||
|
||
|
||
IF hasPratt THEN ; <SM39>
|
||
IMPORT SndCntlBlackbird, PrattIntTbl
|
||
IMPORT PrattPMgrPrims,ImmgBabyRock
|
||
|
||
; PowerBook Blackbird product table
|
||
|
||
ALIGN 4
|
||
InfoBlackbird
|
||
dc.l PrattTable-InfoBlackbird ; offset to decoder info
|
||
dc.l RamInfoPratt-InfoBlackbird ; offset to ram bank info
|
||
dc.l VideoInfoPratt-InfoBlackbird ; offset to video info
|
||
dc.l NuBusInfoPratt-InfoBlackbird ; offset to NuBus info
|
||
dc.w 0|\ ; hwCfgFlags
|
||
(1<<hwCbSCSI)|\ ; SCSI port present
|
||
(1<<hwCbClock)|\ ; New clock chip present
|
||
(1<<hwCbFPU)|\ ; FPU chip present (option)
|
||
(1<<hwCbMMU)|\ ; Some kind of MMU present (see MMUType for what kind).
|
||
(1<<hwCbADB)|\ ; Apple Desktop Bus present.
|
||
(1<<hwCbPwrMgr) ; Power Manager present
|
||
dc.b boxBlackbird ; product kind
|
||
dc.b PrattDecoder ; decoder kind
|
||
dc.w $3FFF ; ROM85, New ROMs, Power Off ability.
|
||
dc.b 4 ; default ROM Resource configuration
|
||
dc.b ProductInfoVersion ; ProductInfo version
|
||
BitVector32 \ ; Flags for valid base addresses 0-31
|
||
ROMExists,\ ; ROMAddr is valid
|
||
DiagROMExists,\ ; DiagROMAddr is valid
|
||
VIA1Exists,\ ; VIA1Addr is valid
|
||
SCCRdExists,\ ; SCCRdAddr is valid
|
||
SCCWrExists,\ ; SCCWrAddr is valid
|
||
IWMExists,\ ; IWMAddr is valid
|
||
SCSIExists,\ ; SCSIAddr is valid
|
||
SCSIDackExists,\ ; SCSIDackAddr is valid
|
||
SCSIHskExists,\ ; SCSIHskAddr is valid
|
||
VIA2Exists,\ ; VIA2Addr is valid
|
||
ASCExists,\ ; ASCAddr is valid
|
||
VDACExists,\ ; VDAC (CSC) is valid
|
||
SONICExists ; SONIC is valid
|
||
BitVector32 \ ; Flags for valid base addresses 32-63
|
||
SingerExists,\ ; PrattAddr is valid
|
||
PrattExists ; SingerAddr is valid
|
||
BitVector32 ; Flags for valid base addresses 64-95
|
||
dc.l \ ; Flags for valid ext feature flags 0-31
|
||
(ADBPwrMgr)|\ ; PMGR ADB
|
||
(ClockPwrMgr)|\ ; PMGR clock/pram
|
||
(SoundHasSoundIn)|\ ; Has 8-bit mono sound input <LW7>
|
||
(Sound16Bit)|\ ; has 16-bit hardware
|
||
(SoundStereoIn)|\ ; has stereo sound input
|
||
(SoundStereoOut)|\ ; has stereo sound output
|
||
(SoundPlayAndRecord)|\ ; can Play and Record simultaneously
|
||
(1<<SoundLineLevel)|\ ; requires line level on sound input port
|
||
(1<<PMgrNewIntf)|\ ; serial PMgr interface and new protocol
|
||
(1<<SupportsIdle)|\ ; supports idle mode
|
||
(1<<hasNewMemMgr)|\ ; supports idle mode
|
||
(1<<SoftVBL) ; SoftVBL is valid
|
||
dc.l 0 ; Flags for valid ext feature flags 32-63
|
||
dc.l 0 ; Flags for valid ext feature flags 64-95
|
||
dc.b $56,$00,$00,$00 ; Check VIA1 PA6, PA4, PA2, PA1
|
||
dc.b $12,$00,$00,$00 ; VIA1 PA6 = 0, PA4 = 1, PA2 = 0, PA1 = 1
|
||
dc.l VIA1InitPratt-InfoBlackbird ; VIA1 init info
|
||
dc.l VIA2InitPratt-InfoBlackbird ; VIA2 needs init
|
||
dc.l SndCntlBlackBird-InfoBlackbird ; sound control vector table
|
||
dc.l PMGRClockPRAM-InfoBlackbird ; clock/PRAM vector table
|
||
dc.l PMGRADBTable-InfoBlackbird ; ADB/DebugUtil vector table
|
||
dc.l PrattPMgrPrims-InfoBlackbird ; Power Manager primitives
|
||
dc.l PrattIntTbl-InfoBlackbird ; interrupt handlers table <SM38>
|
||
dc.l ImmgBabyRock-InfoBlackbird ; use BabyRock Internal Modem Manager
|
||
dc.w cpuIDPortable|\ ; CPU ID: portable design center
|
||
cpuIDinBoard|\ ; CPU ID: supplemental ID in Mother/Daughter board ID registers
|
||
8 ; CPU ID: Blackbird ID is 8
|
||
dc.w 0 ; spare <SM74>
|
||
dc.l IconInfoTIM-InfoBlackbird ; offset to ICON info <SM74>
|
||
|
||
ENDIF ; {hasPratt}
|
||
|
||
|
||
|
||
IF hasMSC THEN
|
||
IMPORT SndCntlPBDuo210, MSCPmgrPrims, MSCIntTbl,MBTPmgrPrims
|
||
|
||
ALIGN 4
|
||
InfoPowerBookDuo210
|
||
dc.l MSCTable-InfoPowerBookDuo210 ; offset to decoder info
|
||
dc.l RAMInfoMSC-InfoPowerBookDuo210 ; offset to ram bank info
|
||
dc.l VideoInfoMSC-InfoPowerBookDuo210 ; offset to video info
|
||
dc.l NuBusInfoMSC-InfoPowerBookDuo210 ; offset to NuBus info
|
||
dc.w 0|\ ; hwCfgFlags
|
||
(1<<hwCbSCSI)|\ ; SCSI port present
|
||
(1<<hwCbClock)|\ ; New clock chip present
|
||
(1<<hwCbFPU)|\ ; FPU chip present (option)
|
||
(1<<hwCbMMU)|\ ; Some kind of MMU present (see MMUType for what kind).
|
||
(1<<hwCbADB)|\ ; Apple Desktop Bus present.
|
||
(1<<hwCbPwrMgr) ; Power Manager present
|
||
dc.b boxPowerBookDuo210 ; product kind <H29>
|
||
dc.b MSCDecoder ; decoder kind
|
||
dc.w $3FFF ; ROM85, New ROMs, Power Off ability
|
||
dc.b 4 ; default ROM Resource configuration
|
||
dc.b ProductInfoVersion ; ProductInfo version
|
||
BitVector32 \ ; Flags for valid base addresses 0-31
|
||
ROMExists,\ ; ROMAddr is valid
|
||
DiagROMExists,\ ; DiagROMAddr is valid
|
||
VIA1Exists,\ ; VIA1Addr is valid
|
||
SCCRdExists,\ ; SCCRdAddr is valid
|
||
SCCWrExists,\ ; SCCWrAddr is valid
|
||
IWMExists,\ ; IWMAddr is valid <H6>
|
||
SCSIExists,\ ; SCSIAddr is valid
|
||
SCSIDackExists,\ ; SCSIDackAddr is valid
|
||
SCSIHskExists,\ ; SCSIHskAddr is valid
|
||
ASCExists,\ ; ASCAddr is valid
|
||
RBVExists,\ ; RBVAddr is valid
|
||
VDACExists ; VDACAddr (GSC) is valid <H9>
|
||
BitVector32 ; Flags for valid base addresses 32-63
|
||
BitVector32 ; Flags for valid base addresses 64-95
|
||
dc.l \ ; Flags for valid ext feature flags 0-31
|
||
(ADBPwrMgr)|\ ; PMGR ADB
|
||
(ClockPwrMgr)|\ ; PMGR clock/pram
|
||
(SoundHasSoundIn)|\ ; Has 8-bit mono sound input <LW7>
|
||
(1<<SupportsIdle)|\ ; supports idle mode
|
||
(1<<PMgrNewIntf)|\ ; serial PMgr interface and new protocol
|
||
(1<<MSCChipBit) ; MSC variant of the RBV <H5>
|
||
dc.l 0 ; Flags for valid ext feature flags 32-63
|
||
dc.l 0 ; Flags for valid ext feature flags 64-95
|
||
dc.b $56,$00,$00,$00 ; Check VIA1 PA6, PA4, PA2, PA1
|
||
dc.b $00,$00,$00,$00 ; VIA1 PA6 = 0, PA4 = 0, PA2 = 0, PA1 = 0
|
||
dc.l VIA1InitMSC-InfoPowerBookDuo210 ; VIA1 init info
|
||
dc.l 0 ; no VIA2 to init
|
||
dc.l SndCntlPBDuo210-InfoPowerBookDuo210 ; sound control vector table
|
||
dc.l PMGRClockPRAM-InfoPowerBookDuo210 ; clock/PRAM vector table <H4>
|
||
dc.l PMGRADBTable-InfoPowerBookDuo210 ; ADB/DebugUtil vector table <H30>
|
||
dc.l MSCPmgrPrims-InfoPowerBookDuo210 ; Power Manager primitives <SM33>
|
||
dc.l MSCIntTbl-InfoPowerBookDuo210 ; interrupt handlers table <SM38>
|
||
dc.l 0 ; internal modem manager
|
||
dc.w cpuIDPortable|\ ; CPU ID: portable design center
|
||
cpuIDinReg|\ ; CPU ID: register contains complete ID
|
||
4 ; CPU ID: PowerBook Duo 210 is 4
|
||
dc.w 0 ; spare <SM74>
|
||
dc.l IconInfoDBLite-InfoPowerBookDuo210 ; offset to ICON info <SM74>
|
||
|
||
|
||
ALIGN 4
|
||
InfoPowerBookDuo230
|
||
dc.l MSCTable-InfoPowerBookDuo230 ; offset to decoder info
|
||
dc.l RAMInfoMSC-InfoPowerBookDuo230 ; offset to ram bank info
|
||
dc.l VideoInfoMSC-InfoPowerBookDuo230 ; offset to video info
|
||
dc.l NuBusInfoMSC-InfoPowerBookDuo230 ; offset to NuBus info
|
||
dc.w 0|\ ; hwCfgFlags
|
||
(1<<hwCbSCSI)|\ ; SCSI port present
|
||
(1<<hwCbClock)|\ ; New clock chip present
|
||
(1<<hwCbFPU)|\ ; FPU chip present (option)
|
||
(1<<hwCbMMU)|\ ; Some kind of MMU present (see MMUType for what kind).
|
||
(1<<hwCbADB)|\ ; Apple Desktop Bus present.
|
||
(1<<hwCbPwrMgr) ; Power Manager present
|
||
dc.b boxPowerBookDuo230 ; product kind <H29>
|
||
dc.b MSCDecoder ; decoder kind
|
||
dc.w $3FFF ; ROM85, New ROMs, Power Off ability
|
||
dc.b 4 ; default ROM Resource configuration
|
||
dc.b ProductInfoVersion ; ProductInfo version
|
||
BitVector32 \ ; Flags for valid base addresses 0-31
|
||
ROMExists,\ ; ROMAddr is valid
|
||
DiagROMExists,\ ; DiagROMAddr is valid
|
||
VIA1Exists,\ ; VIA1Addr is valid
|
||
SCCRdExists,\ ; SCCRdAddr is valid
|
||
SCCWrExists,\ ; SCCWrAddr is valid
|
||
IWMExists,\ ; IWMAddr is valid <H6>
|
||
SCSIExists,\ ; SCSIAddr is valid
|
||
SCSIDackExists,\ ; SCSIDackAddr is valid
|
||
SCSIHskExists,\ ; SCSIHskAddr is valid
|
||
ASCExists,\ ; ASCAddr is valid
|
||
RBVExists,\ ; RBVAddr is valid
|
||
VDACExists ; VDACAddr (GSC) is valid <H9>
|
||
BitVector32 ; Flags for valid base addresses 32-63
|
||
BitVector32 ; Flags for valid base addresses 64-95
|
||
dc.l \ ; Flags for valid ext feature flags 0-31
|
||
(ADBPwrMgr)|\ ; PMGR ADB
|
||
(ClockPwrMgr)|\ ; PMGR clock/pram
|
||
(SoundHasSoundIn)|\ ; Has 8-bit mono sound input <LW7>
|
||
(1<<SupportsIdle)|\ ; supports idle mode
|
||
(1<<PMgrNewIntf)|\ ; serial PMgr interface and new protocol
|
||
(1<<MSCChipBit) ; MSC variant of the RBV <H5>
|
||
dc.l 0 ; Flags for valid ext feature flags 32-63
|
||
dc.l 0 ; Flags for valid ext feature flags 64-95
|
||
dc.b $56,$00,$00,$00 ; Check VIA1 PA6, PA4, PA2, PA1
|
||
dc.b $00,$00,$00,$00 ; VIA1 PA6 = 0, PA4 = 0, PA2 = 0, PA1 = 0
|
||
dc.l VIA1InitMSC-InfoPowerBookDuo230 ; VIA1 init info
|
||
dc.l 0 ; no VIA2 to init
|
||
dc.l SndCntlPBDuo210-InfoPowerBookDuo230 ; sound control vector table
|
||
dc.l PMGRClockPRAM-InfoPowerBookDuo230 ; clock/PRAM vector table <H4>
|
||
dc.l PMGRADBTable-InfoPowerBookDuo230 ; ADB/DebugUtil vector table <H30>
|
||
dc.l MSCPmgrPrims-InfoPowerBookDuo230 ; Power Manager primitives <SM33>
|
||
dc.l MSCIntTbl-InfoPowerBookDuo230 ; interrupt handlers table <SM38>
|
||
dc.l 0 ; internal modem manager
|
||
dc.w cpuIDPortable|\ ; CPU ID: portable design center
|
||
cpuIDinReg|\ ; CPU ID: register contains complete ID
|
||
5 ; CPU ID: PowerBook Duo 230 is 5
|
||
dc.w 0 ; spare <SM74>
|
||
dc.l IconInfoDBLite-InfoPowerBookDuo230 ; offset to ICON info <SM74>
|
||
|
||
|
||
ALIGN 4
|
||
InfoPowerBookDuo235
|
||
dc.l MSCTable-InfoPowerBookDuo235 ; offset to decoder info
|
||
dc.l RAMInfoMSC-InfoPowerBookDuo235 ; offset to ram bank info
|
||
dc.l VideoInfoMSC-InfoPowerBookDuo235 ; offset to video info
|
||
dc.l NuBusInfoMSC-InfoPowerBookDuo235 ; offset to NuBus info
|
||
dc.w 0|\ ; hwCfgFlags
|
||
(1<<hwCbSCSI)|\ ; SCSI port present
|
||
(1<<hwCbClock)|\ ; New clock chip present
|
||
(1<<hwCbFPU)|\ ; FPU chip present (option)
|
||
(1<<hwCbMMU)|\ ; Some kind of MMU present (see MMUType for what kind).
|
||
(1<<hwCbADB)|\ ; Apple Desktop Bus present.
|
||
(1<<hwCbPwrMgr) ; Power Manager present
|
||
dc.b boxPowerBookDuo250 ; product kind <SM100>
|
||
dc.b MSCDecoder ; decoder kind
|
||
dc.w $3FFF ; ROM85, New ROMs, Power Off ability
|
||
dc.b 4 ; default ROM Resource configuration
|
||
dc.b ProductInfoVersion ; ProductInfo version
|
||
BitVector32 \ ; Flags for valid base addresses 0-31
|
||
ROMExists,\ ; ROMAddr is valid
|
||
DiagROMExists,\ ; DiagROMAddr is valid
|
||
VIA1Exists,\ ; VIA1Addr is valid
|
||
SCCRdExists,\ ; SCCRdAddr is valid
|
||
SCCWrExists,\ ; SCCWrAddr is valid
|
||
IWMExists,\ ; IWMAddr is valid <H6>
|
||
SCSIExists,\ ; SCSIAddr is valid
|
||
SCSIDackExists,\ ; SCSIDackAddr is valid
|
||
SCSIHskExists,\ ; SCSIHskAddr is valid
|
||
ASCExists,\ ; ASCAddr is valid
|
||
RBVExists,\ ; RBVAddr is valid
|
||
VDACExists ; VDACAddr (GSC) is valid <H9>
|
||
BitVector32 ; Flags for valid base addresses 32-63
|
||
BitVector32 ; Flags for valid base addresses 64-95
|
||
dc.l \ ; Flags for valid ext feature flags 0-31
|
||
(ADBPwrMgr)|\ ; PMGR ADB
|
||
(ClockPwrMgr)|\ ; PMGR clock/pram
|
||
(SoundHasSoundIn)|\ ; Has 8-bit mono sound input <LW7>
|
||
(1<<SupportsIdle)|\ ; supports idle mode
|
||
(1<<PMgrNewIntf)|\ ; serial PMgr interface and new protocol
|
||
(1<<MSCChipBit) ; MSC variant of the RBV <H5>
|
||
dc.l 0 ; Flags for valid ext feature flags 32-63
|
||
dc.l 0 ; Flags for valid ext feature flags 64-95
|
||
dc.b $56,$00,$00,$00 ; Check VIA1 PA6, PA4, PA2, PA1
|
||
dc.b $00,$00,$00,$00 ; VIA1 PA6 = 0, PA4 = 0, PA2 = 0, PA1 = 0
|
||
dc.l VIA1InitMSC-InfoPowerBookDuo235 ; VIA1 init info
|
||
dc.l 0 ; no VIA2 to init
|
||
dc.l SndCntlPBDuo210-InfoPowerBookDuo235 ; sound control vector table
|
||
dc.l PMGRClockPRAM-InfoPowerBookDuo235 ; clock/PRAM vector table <H4>
|
||
dc.l PMGRADBTable-InfoPowerBookDuo235 ; ADB/DebugUtil vector table <H30>
|
||
dc.l MSCPmgrPrims-InfoPowerBookDuo235 ; Power Manager primitives <SM33>
|
||
dc.l MSCIntTbl-InfoPowerBookDuo235 ; interrupt handlers table <SM38>
|
||
dc.l 0 ; internal modem manager
|
||
dc.w cpuIDPortable|\ ; CPU ID: portable design center
|
||
cpuIDinReg|\ ; CPU ID: register contains complete ID
|
||
6 ; CPU ID: PowerBook Duo 235 is 6
|
||
dc.w 0 ; spare <SM74>
|
||
dc.l IconInfoDBLite-InfoPowerBookDuo235 ; offset to ICON info <SM74>
|
||
|
||
|
||
ALIGN 4
|
||
InfoYeager
|
||
dc.l MSCTable-InfoYeager ; offset to decoder info
|
||
dc.l RAMInfoMSC-InfoYeager ; offset to ram bank info
|
||
dc.l VideoInfoMSC-InfoYeager ; offset to video info
|
||
dc.l NuBusInfoMSC-InfoYeager ; offset to NuBus info
|
||
dc.w 0|\ ; hwCfgFlags
|
||
(1<<hwCbSCSI)|\ ; SCSI port present
|
||
(1<<hwCbClock)|\ ; New clock chip present
|
||
(1<<hwCbFPU)|\ ; FPU chip present (option)
|
||
(1<<hwCbMMU)|\ ; Some kind of MMU present (see MMUType for what kind).
|
||
(1<<hwCbADB)|\ ; Apple Desktop Bus present.
|
||
(1<<hwCbPwrMgr) ; Power Manager present
|
||
dc.b boxYeagerC ; product kind <H29>
|
||
dc.b MSCDecoder ; decoder kind
|
||
dc.w $3FFF ; ROM85, New ROMs, Power Off ability
|
||
dc.b 4 ; default ROM Resource configuration
|
||
dc.b ProductInfoVersion ; ProductInfo version
|
||
BitVector32 \ ; Flags for valid base addresses 0-31
|
||
ROMExists,\ ; ROMAddr is valid
|
||
DiagROMExists,\ ; DiagROMAddr is valid
|
||
VIA1Exists,\ ; VIA1Addr is valid
|
||
SCCRdExists,\ ; SCCRdAddr is valid
|
||
SCCWrExists,\ ; SCCWrAddr is valid
|
||
IWMExists,\ ; IWMAddr is valid <H6>
|
||
SCSIExists,\ ; SCSIAddr is valid
|
||
SCSIDackExists,\ ; SCSIDackAddr is valid
|
||
SCSIHskExists,\ ; SCSIHskAddr is valid
|
||
ASCExists,\ ; ASCAddr is valid
|
||
RBVExists,\ ; RBVAddr is valid
|
||
VDACExists ; VDACAddr (GSC) is valid <H9>
|
||
BitVector32 ; Flags for valid base addresses 32-63
|
||
BitVector32 ; Flags for valid base addresses 64-95
|
||
dc.l \ ; Flags for valid ext feature flags 0-31
|
||
(ADBPwrMgr)|\ ; PMGR ADB
|
||
(ClockPwrMgr)|\ ; PMGR clock/pram
|
||
(SoundHasSoundIn)|\ ; Has 8-bit mono sound input <LW7>
|
||
(1<<SupportsIdle)|\ ; supports idle mode
|
||
(1<<PMgrNewIntf)|\ ; serial PMgr interface and new protocol
|
||
(1<<MSCChipBit) ; MSC variant of the RBV <H5>
|
||
dc.l 0 ; Flags for valid ext feature flags 32-63
|
||
dc.l 0 ; Flags for valid ext feature flags 64-95
|
||
dc.b $56,$00,$00,$00 ; Check VIA1 PA6, PA4, PA2, PA1
|
||
dc.b $00,$00,$00,$00 ; VIA1 PA6 = 0, PA4 = 0, PA2 = 0, PA1 = 0
|
||
dc.l VIA1InitMSC-InfoYeager ; VIA1 init info
|
||
dc.l 0 ; no VIA2 to init
|
||
dc.l SndCntlPBDuo210-InfoYeager ; sound control vector table
|
||
dc.l PMGRClockPRAM-InfoYeager ; clock/PRAM vector table <H4>
|
||
dc.l PMGRADBTable-InfoYeager ; ADB/DebugUtil vector table <H30>
|
||
dc.l MBTPmgrPrims-InfoYeager ; Power Manager primitives <SM33>
|
||
dc.l MSCIntTbl-InfoYeager ; interrupt handlers table <SM38>
|
||
dc.l 0 ; internal modem manager
|
||
dc.w cpuIDPortable|\ ; CPU ID: portable design center
|
||
cpuIDinReg|\ ; CPU ID: register contains complete ID
|
||
0 ; CPU ID: Yeager is 16
|
||
dc.w 0 ; spare <SM74>
|
||
dc.l IconInfoDBLite-InfoYeager ; offset to ICON info <SM74>
|
||
|
||
|
||
ENDIF ; {hasMSC}
|
||
|
||
|
||
IF hasNiagra THEN
|
||
IMPORT SndCntlPB180, NiagraPMgrPrims, NiagraIntTbl
|
||
|
||
; PowerBook 180 product table
|
||
|
||
ALIGN 4
|
||
InfoPowerBook180
|
||
dc.l NiagraTable-InfoPowerBook180 ; offset to decoder info
|
||
dc.l RamInfoNiagra-InfoPowerBook180 ; offset to ram bank info
|
||
dc.l VideoInfoNiagra-InfoPowerBook180 ; offset to video info
|
||
dc.l NuBusInfoNiagra-InfoPowerBook180 ; offset to NuBus info
|
||
dc.w 0|\ ; hwCfgFlags
|
||
(1<<hwCbSCSI)|\ ; SCSI port present
|
||
(1<<hwCbClock)|\ ; New clock chip present
|
||
(1<<hwCbFPU)|\ ; FPU chip present.
|
||
(1<<hwCbMMU)|\ ; Some kind of MMU present (see MMUType for what kind).
|
||
(1<<hwCbADB)|\ ; Apple Desktop Bus present.
|
||
(1<<hwCbPwrMgr) ; Power Manager present
|
||
dc.b boxPowerBook180 ; product kind
|
||
dc.b NiagraDecoder ; decoder kind
|
||
dc.w $3FFF ; ROM85, New ROMs, Power Off ability.
|
||
dc.b 4 ; default ROM Resource configuration
|
||
dc.b ProductInfoVersion ; ProductInfo version
|
||
BitVector32 \ ; Flags for valid base addresses 0-31
|
||
ROMExists,\ ; ROMAddr is valid
|
||
DiagROMExists,\ ; DiagROMAddr is valid
|
||
VIA1Exists,\ ; VIA1Addr is valid
|
||
SCCRdExists,\ ; SCCRdAddr is valid
|
||
SCCWrExists,\ ; SCCWrAddr is valid
|
||
IWMExists,\ ; IWMAddr is valid
|
||
SCSIExists,\ ; SCSIAddr is valid
|
||
SCSIDackExists,\ ; SCSIDackAddr is valid
|
||
SCSIHskExists,\ ; SCSIHskAddr is valid
|
||
VIA2Exists,\ ; VIA2Addr is valid
|
||
ASCExists,\ ; ASCAddr is valid
|
||
VDACExists,\ ; VDACAddr (GSC) is valid <H9>
|
||
JAWSExists ; JAWSAddr is valid
|
||
BitVector32 ; Flags for valid base addresses 32-63
|
||
BitVector32 ; Flags for valid base addresses 64-95
|
||
dc.l \ ; Flags for valid ext feature flags 0-31
|
||
(ClockRTC)|\ ; Has RTC clock/PRAM
|
||
(ADBPwrMgr)|\ ; PowerManager ADB
|
||
(SoundHasSoundIn)|\ ; Has 8-bit mono sound input <LW7>
|
||
(SoundStereoOut)|\ ; has stereo sound output
|
||
(SoundStereoMixing)|\ ; has stereo mixing <H28>
|
||
(SoundPlayAndRecord)|\ ; can Play and Record simultaneously <H42>
|
||
(1<<SupportsIdle)|\ ; and has idle
|
||
(1<<NiagraExistsBit) ; Niagra a variant of Jaws
|
||
dc.l 0 ; Flags for valid ext feature flags 32-63
|
||
dc.l 0 ; Flags for valid ext feature flags 64-95
|
||
dc.b $56,$00,$00,$00 ; Check VIA1 PA6, PA4, PA2, PA1
|
||
dc.b $12,$00,$00,$00 ; VIA1 PA6 = 0, PA4 = 1, PA2 = 0, PA1 = 1
|
||
dc.l VIA1InitNiagra-InfoPowerBook180 ; VIA1 init info
|
||
dc.l VIA2InitNiagra-InfoPowerBook180 ; VIA2 init info
|
||
dc.l SndCntlPB180-InfoPowerBook180 ; sound control vector table
|
||
dc.l RTCClockPRAM-InfoPowerBook180 ; clock/PRAM vector table
|
||
dc.l PMGRADBTable-InfoPowerBook180 ; ADB/DebugUtil vector table <H30>
|
||
dc.l NiagraPMgrPrims-InfoPowerBook180 ; Power Manager primitives <SM33>
|
||
dc.l NiagraIntTbl-InfoPowerBook180 ; interrupt handlers table <SM38>
|
||
dc.w 0 ; no CPU ID register
|
||
dc.w 0 ; spare <SM74>
|
||
dc.l IconInfoTIM-InfoPowerBook180 ; offset to ICON info <SM74>
|
||
|
||
|
||
ALIGN 4
|
||
InfoNiagraUnknown
|
||
dc.l NiagraTable-InfoNiagraUnknown ; offset to decoder info
|
||
dc.l RamInfoNiagra-InfoNiagraUnknown ; offset to ram bank info
|
||
dc.l VideoInfoNiagra-InfoNiagraUnknown ; offset to video info
|
||
dc.l NuBusInfoNiagra-InfoNiagraUnknown ; offset to NuBus info
|
||
dc.w 0|\ ; hwCfgFlags
|
||
(1<<hwCbSCSI)|\ ; SCSI port present
|
||
(1<<hwCbClock)|\ ; New clock chip present
|
||
(1<<hwCbFPU)|\ ; FPU chip present.
|
||
(1<<hwCbMMU)|\ ; Some kind of MMU present (see MMUType for what kind).
|
||
(1<<hwCbADB)|\ ; Apple Desktop Bus present.
|
||
(1<<hwCbPwrMgr) ; Power Manager present
|
||
dc.b BoxUnknown ; product kind
|
||
dc.b NiagraDecoder ; decoder kind
|
||
dc.w $3FFF ; ROM85, New ROMs, Power Off ability.
|
||
dc.b 2 ; default ROM Resource configuration
|
||
dc.b ProductInfoVersion ; ProductInfo version
|
||
BitVector32 ; use default bases for this decoder
|
||
BitVector32 ; Flags for valid base addresses 32-63
|
||
BitVector32 ; Flags for valid base addresses 64-95
|
||
dc.l \ ; Flags for valid ext feature flags 0-31
|
||
(ClockRTC)|\ ; Has RTC clock/PRAM
|
||
(ADBPwrMgr)|\ ; PowerManager ADB <SM29>
|
||
(SoundPlayAndRecord)|\ ; can Play and Record simultaneously <H42><SM29>
|
||
(1<<SupportsIdle)|\ ; and has idle <SM29>
|
||
(1<<NiagraExistsBit) ; Niagra a variant of Jaws <SM29>
|
||
dc.l 0 ; Flags for valid ext feature flags 32-63
|
||
dc.l 0 ; Flags for valid ext feature flags 64-95
|
||
dc.b $00,$00,$00,$00 ; don't check any VIA bits
|
||
dc.b $00,$00,$00,$00 ; anything with this decoder matches
|
||
dc.l VIA1InitNiagra-InfoNiagraUnknown ; VIA1 init info
|
||
dc.l VIA2InitNiagra-InfoNiagraUnknown ; VIA2 init info
|
||
dc.l 0 ; no sound control vector table
|
||
dc.l RTCClockPRAM-InfoNiagraUnknown ; clock/PRAM vector table
|
||
dc.l PMGRADBTable-InfoNiagraUnknown ; ADB/DebugUtil vector table <H30>
|
||
dc.l NiagraPMgrPrims-InfoNiagraUnknown ; Power Manager primitives <SM33>
|
||
dc.l NiagraIntTbl-InfoNiagraUnknown ; interrupt handlers table <SM38>
|
||
dc.l 0 ; internal modem manager
|
||
dc.w 0 ; no CPU ID register
|
||
dc.w 0 ; spare <SM74>
|
||
dc.l IconInfoTIM-InfoNiagraUnknown ; offset to ICON info <SM74>
|
||
|
||
ENDIF ; {hasNiagra}
|
||
|
||
|
||
IF hasSonora THEN
|
||
IMPORT SndCntlLCIII, SonoraIntTbl
|
||
|
||
; Vail 16 MHZ product table
|
||
|
||
ALIGN 4
|
||
InfoVail16
|
||
dc.l SonoraTable-InfoVail16 ; offset to decoder info
|
||
dc.l RamInfoVail-InfoVail16 ; offset to ram bank info
|
||
dc.l VideoInfoVail-InfoVail16 ; offset to video info
|
||
dc.l NuBusInfoVail-InfoVail16 ; offset to NuBus info
|
||
dc.w 0|\ ; hwCfgFlags
|
||
(1<<hwCbSCSI)|\ ; SCSI port present
|
||
(1<<hwCbClock)|\ ; New clock chip present
|
||
(1<<hwCbFPU)|\ ; FPU chip present (option)
|
||
(1<<hwCbMMU)|\ ; Some kind of MMU present (see MMUType for what kind).
|
||
(1<<hwCbADB) ; Apple Desktop Bus present.
|
||
dc.b boxVail16 ; product kind <H23>
|
||
dc.b SonoraDecoder ; decoder kind
|
||
dc.w $3FFF ; ROM85, New ROMs, Power Off ability
|
||
dc.b 4 ; default ROM Resource configuration (non-FPU for now)
|
||
dc.b ProductInfoVersion ; ProductInfo version
|
||
BitVector32 \ ; Flags for valid base addresses 0-31
|
||
ROMExists,\ ; ROMAddr is valid
|
||
DiagROMExists,\ ; DiagROMAddr is valid
|
||
VIA1Exists,\ ; VIA1Addr is valid
|
||
SCCRdExists,\ ; SCCRdAddr is valid
|
||
SCCWrExists,\ ; SCCWrAddr is valid
|
||
IWMExists,\ ; IWMAddr is valid
|
||
SCSIExists,\ ; SCSIAddr is valid
|
||
SCSIDackExists,\ ; SCSIDackAddr is valid
|
||
SCSIHskExists,\ ; SCSIHskAddr is valid
|
||
ASCExists,\ ; ASCAddr is valid
|
||
RBVExists,\ ; RBV is valid
|
||
VDACExists,\ ; VDACAddr (SONORA) is valid <H56> <SM63> CSS
|
||
PatchRomExists ; PatchRomAddr is valid
|
||
BitVector32 ; Flags for valid base addresses 32-63
|
||
BitVector32 ; Flags for valid base addresses 64-95
|
||
dc.l (ClockEgret)|\ ; Has Egret clock/pram
|
||
(ADBEgret)|\ ; Egret ADB
|
||
(Egret8)|\ ; Egret Eight firmware <SM63> CSS
|
||
(SoundHasSoundIn)|\ ; Has 8-bit mono sound input <LW7>
|
||
(SoundPlayAndRecord)|\ ; can Play and Record simultaneously <H47><H42><SM29>
|
||
(1<<SonoraExistsBit)|\ ; SonoraExistsBit is valid <H34>
|
||
(1<<hasHardPowerOff) ; hasHardPowerOff is valid <H63><SM29>
|
||
dc.l 0 ; Flags for valid ext feature flags 32-63
|
||
dc.l 0 ; Flags for valid ext feature flags 64-95
|
||
dc.b $00,$00,$00,$00 ; don't check any VIA bits
|
||
dc.b $00,$00,$00,$00 ; anything with this decoder matches
|
||
dc.l VIA1InitVail-InfoVail16 ; VIA1 init info
|
||
dc.l 0 ; no VIA2 init info
|
||
dc.l SndCntlLCIII-InfoVail16 ; sound control vector table <H10><H62><SM29>
|
||
dc.l EgretClockPRAM-InfoVail16 ; clock/PRAM vector table <H4>
|
||
dc.l EgretADBTable-InfoVail16 ; ADB/DebugUtil vector table <H30>
|
||
dc.l 0 ; no Power Manager primitives <SM33>
|
||
dc.l SonoraIntTbl-InfoVail16 ; interrupt handlers table <SM38>
|
||
dc.l 0 ; internal modem manager
|
||
dc.w cpuIDHiVol|\ ; CPU ID: hi volume design center <H10>
|
||
cpuIDinReg|\ ; CPU ID: register contains complete ID
|
||
0 ; CPU ID: Vail 16 Mhz
|
||
dc.w 0 ; spare <SM74>
|
||
dc.l IconInfoMacLC-InfoVail16 ; offset to ICON info <SM74>
|
||
|
||
|
||
; Vail 25 MHZ product table
|
||
|
||
ALIGN 4
|
||
InfoLCIII
|
||
dc.l SonoraTable-InfoLCIII ; offset to decoder info
|
||
dc.l RamInfoVail-InfoLCIII ; offset to ram bank info
|
||
dc.l VideoInfoVail-InfoLCIII ; offset to video info
|
||
dc.l NuBusInfoVail-InfoLCIII ; offset to NuBus info
|
||
dc.w 0|\ ; hwCfgFlags
|
||
(1<<hwCbSCSI)|\ ; SCSI port present
|
||
(1<<hwCbClock)|\ ; New clock chip present
|
||
(1<<hwCbFPU)|\ ; FPU chip present (option)
|
||
(1<<hwCbMMU)|\ ; Some kind of MMU present (see MMUType for what kind).
|
||
(1<<hwCbADB) ; Apple Desktop Bus present.
|
||
dc.b boxLCIII ; product kind
|
||
dc.b SonoraDecoder ; decoder kind
|
||
dc.w $3FFF ; ROM85, New ROMs, Power Off ability
|
||
dc.b 4 ; default ROM Resource configuration (non-FPU for now)
|
||
dc.b ProductInfoVersion ; ProductInfo version
|
||
BitVector32 \ ; Flags for valid base addresses 0-31
|
||
ROMExists,\ ; ROMAddr is valid
|
||
DiagROMExists,\ ; DiagROMAddr is valid
|
||
VIA1Exists,\ ; VIA1Addr is valid
|
||
SCCRdExists,\ ; SCCRdAddr is valid
|
||
SCCWrExists,\ ; SCCWrAddr is valid
|
||
IWMExists,\ ; IWMAddr is valid
|
||
SCSIExists,\ ; SCSIAddr is valid
|
||
SCSIDackExists,\ ; SCSIDackAddr is valid
|
||
SCSIHskExists,\ ; SCSIHskAddr is valid
|
||
ASCExists,\ ; ASCAddr is valid
|
||
RBVExists,\ ; RBV is valid
|
||
VDACExists,\ ; VDACAddr (SONORA) is valid <SM29>
|
||
PatchRomExists ; PatchRomAddr is valid
|
||
BitVector32 ; Flags for valid base addresses 32-63
|
||
BitVector32 ; Flags for valid base addresses 64-95
|
||
dc.l (ClockEgret)|\ ; Has Egret clock/pram
|
||
(ADBEgret)|\ ; Egret ADB
|
||
(Egret8)|\ ; Egret Eight firmware <SM63> CSS
|
||
(SoundHasSoundIn)|\ ; Has 8-bit mono sound input <LW7>
|
||
(1<<SonoraExistsBit)|\ ; SonoraExistsBit is valid <H34>
|
||
(1<<hasHardPowerOff) ; hasHardPowerOff is valid <H63><SM29>
|
||
dc.l 0 ; Flags for valid ext feature flags 32-63
|
||
dc.l 0 ; Flags for valid ext feature flags 64-95
|
||
dc.b $00,$00,$00,$00 ; don't check any VIA bits
|
||
dc.b $00,$00,$00,$00 ; anything with this decoder matches
|
||
dc.l VIA1InitVail-InfoLCIII ; VIA1 init info
|
||
dc.l 0 ; no VIA2 init info
|
||
dc.l SndCntlLCIII-InfoLCIII ; sound control vector table <H10><H62><SM29>
|
||
dc.l EgretClockPRAM-InfoLCIII ; clock/PRAM vector table <H4>
|
||
dc.l EgretADBTable-InfoLCIII ; ADB/DebugUtil vector table <H30>
|
||
dc.l 0 ; no Power Manager primitives <SM33>
|
||
dc.l SonoraIntTbl-InfoLCIII ; interrupt handlers table <SM38>
|
||
dc.w cpuIDHiVol|\ ; CPU ID: hi volume design center <H10>
|
||
cpuIDinReg|\ ; CPU ID: register contains complete ID
|
||
Vail25IDField ; CPU ID: Vail 25 Mhz <SM29>
|
||
dc.w 0 ; spare <SM74>
|
||
dc.l IconInfoMacLC-InfoLCIII ; offset to ICON info <SM74>
|
||
|
||
|
||
; Vail 33 MHZ product table
|
||
|
||
ALIGN 4
|
||
InfoVail33
|
||
dc.l SonoraTable-InfoVail33 ; offset to decoder info
|
||
dc.l RamInfoVail-InfoVail33 ; offset to ram bank info
|
||
dc.l VideoInfoVail-InfoVail33 ; offset to video info
|
||
dc.l NuBusInfoVail-InfoVail33 ; offset to NuBus info
|
||
dc.w 0|\ ; hwCfgFlags
|
||
(1<<hwCbSCSI)|\ ; SCSI port present
|
||
(1<<hwCbClock)|\ ; New clock chip present
|
||
(1<<hwCbFPU)|\ ; FPU chip present (option)
|
||
(1<<hwCbMMU)|\ ; Some kind of MMU present (see MMUType for what kind).
|
||
(1<<hwCbADB) ; Apple Desktop Bus present.
|
||
dc.b boxVail33 ; product kind
|
||
dc.b SonoraDecoder ; decoder kind
|
||
dc.w $3FFF ; ROM85, New ROMs, Power Off ability
|
||
dc.b 4 ; default ROM Resource configuration (non-FPU for now)
|
||
dc.b 0 ; unused
|
||
BitVector32 \ ; Flags for valid base addresses 0-31 <SM29>
|
||
ROMExists,\ ; ROMAddr is valid <SM29>
|
||
DiagROMExists,\ ; DiagROMAddr is valid <SM29>
|
||
VIA1Exists,\ ; VIA1Addr is valid <SM29>
|
||
SCCRdExists,\ ; SCCRdAddr is valid <SM29>
|
||
SCCWrExists,\ ; SCCWrAddr is valid <SM29>
|
||
IWMExists,\ ; IWMAddr is valid <SM29>
|
||
SCSIExists,\ ; SCSIAddr is valid <SM29>
|
||
SCSIDackExists,\ ; SCSIDackAddr is valid <SM29>
|
||
SCSIHskExists,\ ; SCSIHskAddr is valid <SM29>
|
||
ASCExists,\ ; ASCAddr is valid <SM29>
|
||
RBVExists,\ ; RBV is valid <SM29>
|
||
VDACExists,\ ; VDACAddr (SONORA) is valid <SM29>
|
||
SONICExists,\ ; SONIC is valid <SM29>
|
||
PatchRomExists ; PatchRomAddr is valid <SM29>
|
||
BitVector32 ; Flags for valid base addresses 32-63 <SM29>
|
||
BitVector32 ; Flags for valid base addresses 64-95 <SM29>
|
||
dc.l (ClockEgret)|\ ; Has Egret clock/pram
|
||
(ADBEgret)|\ ; Egret ADB
|
||
(Egret8)|\ ; Egret Eight firmware <SM63> CSS
|
||
(SoundHasSoundIn)|\ ; Has 8-bit mono sound input <LW7>
|
||
(1<<SonoraExistsBit)|\ ; SonoraExistsBit is valid <H34>
|
||
(1<<hasHardPowerOff) ; hasHardPowerOff is valid <H63>
|
||
dc.l 0 ; Flags for valid ext feature flags 32-63 <SM29>
|
||
dc.l 0 ; Flags for valid ext feature flags 64-95 <SM29>
|
||
dc.b $00,$00,$00,$00 ; don't check any VIA bits
|
||
dc.b $00,$00,$00,$00 ; anything with this decoder matches
|
||
dc.l VIA1InitVail-InfoVail33 ; VIA1 init info
|
||
dc.l 0 ; no VIA2 init info
|
||
dc.l SndCntlLCIII-InfoVail33 ; sound control vector table <H62>
|
||
dc.l EgretClockPRAM-InfoVail33 ; clock/PRAM vector table
|
||
dc.l EgretADBTable-InfoVail33 ; ADB/DebugUtil vector table
|
||
dc.l 0 ; no Power Manager primitives <SM33>
|
||
dc.l SonoraIntTbl-InfoVail33 ; interrupt handlers table <SM38>
|
||
dc.l 0 ; internal modem manager
|
||
dc.w cpuIDHiVol|\ ; CPU ID: hi volume design center
|
||
cpuIDinReg|\ ; CPU ID: register contains complete ID
|
||
Vail33IDField ; CPU ID: Vail 33 Mhz
|
||
dc.w 0 ; spare <SM74>
|
||
dc.l IconInfoMacLC-InfoVail33 ; offset to ICON info <SM74>
|
||
|
||
|
||
ENDIF ; {hasSonora}
|
||
|
||
|
||
IF hasDJMEMC THEN
|
||
IMPORT DJMEMCIntTbl, SndCntlQuadra800
|
||
|
||
; 20MHz Wombat product table (Lego plastics)
|
||
|
||
ALIGN 4
|
||
InfoWombat20
|
||
dc.l djMEMCTable-InfoWombat20 ; offset to decoder info
|
||
dc.l RamInfoDJMEMC-InfoWombat20 ; offset to ram bank info
|
||
dc.l VideoInfoDAFB-InfoWombat20 ; offset to video info
|
||
dc.l NuBusInfoWombat-InfoWombat20 ; offset to NuBus info
|
||
dc.w 0|\ ; hwCfgFlags
|
||
(1<<hwCbSCSI)|\ ; SCSI port present
|
||
(1<<hwCbClock)|\ ; New clock chip present
|
||
(1<<hwCbFPU)|\ ; FPU chip optional.
|
||
(1<<hwCbMMU)|\ ; Some kind of MMU present (see MMUType for what kind).
|
||
(1<<hwCbADB) ; Apple Desktop Bus present.
|
||
dc.b BoxWombat20 ; product kind
|
||
dc.b djMEMCDecoder ; decoder kind
|
||
dc.w $3FFF ; ROM85, New ROMs, Power Off ability.
|
||
dc.b 4 ; default ROM Resource configuration for FPU-based machine <H53><SM29>
|
||
dc.b ProductInfoVersion ; ProductInfo version
|
||
BitVector32 \ ; Flags for valid base addresses 0-31
|
||
ROMExists,\ ; ROMAddr is valid
|
||
DiagROMExists,\ ; DiagROMAddr is valid
|
||
VIA1Exists,\ ; VIA1Addr is valid
|
||
VIA2Exists,\ ; VIA2Addr is valid
|
||
SCCRdExists,\ ; SCCRdAddr is valid
|
||
SCCWrExists,\ ; SCCWrAddr is valid
|
||
ASCExists,\ ; ASCAddr is valid (means Batman in this case)
|
||
IWMExists,\ ; IWMAddr is valid
|
||
SCSI96_1Exists,\ ; 1st SCSI96 is valid
|
||
SONICExists,\ ; SONIC is valid
|
||
PatchROMExists,\ ; Patch ROM is valid
|
||
DAFBExists ; has DAFB video
|
||
BitVector32 ; Flags for valid base addresses 32-63
|
||
BitVector32 ; Flags for valid base addresses 64-95
|
||
dc.l \ ; Flags for valid ext feature flags 0-31
|
||
(ClockRTC)|\ ; Has RTC clock/PRAM
|
||
(SoundHasSoundIn)|\ ; Has 8-bit mono sound input <LW7>
|
||
(SoundStereoOut)|\ ; has stereo sound output
|
||
(SoundStereoMixing)|\ ; has stereo mixing
|
||
(SoundPlayAndRecord)|\ ; can Play and Record simultaneously <H42>
|
||
(1<<djMEMCChipBit)|\ ; Wombat-style memory controller
|
||
(ADBXcvr) ; Has transceiver ADB
|
||
dc.l 0 ; Flags for valid ext feature flags 32-63
|
||
dc.l 0 ; Flags for valid ext feature flags 64-95
|
||
dc.b $56,$00,$00,$00 ; Check VIA1: PA6 PA4, PA2, PA1 <H43>
|
||
dc.b $42,$00,$00,$00 ; VIA1: PA6 = 1, PA4 = 0, PA2 = 0, PA1 = 1 <H43>
|
||
dc.l VIA1InitWombat-InfoWombat20 ; VIA1 init info
|
||
dc.l VIA2InitWombat-InfoWombat20 ; VIA2 init info
|
||
dc.l SndCntlQuadra800-InfoWombat20 ; sound control vector table <SM42>
|
||
dc.l RTCClockPRAM-InfoWombat20 ; clock/PRAM vector table
|
||
dc.l ViaADBTable-InfoWombat20 ; ADB/DebugUtil vector table
|
||
dc.l 0 ; no Power Manager primitives <SM33>
|
||
dc.l DJMEMCIntTbl-InfoWombat20 ; interrupt handlers table <SM38>
|
||
dc.l 0 ; internal modem manager
|
||
dc.w (cpuIDHiEnd)|\ ; HiEnd design center
|
||
(cpuIDinVIA)|\ ; supplemental ID in VIA1
|
||
$3AD ; specific ID
|
||
dc.w 0 ; spare <SM74>
|
||
dc.l IconInfoLego-InfoWombat20 ; offset to ICON info <SM74>
|
||
|
||
|
||
; 25MHz Wombat product table (Lego plastics)
|
||
|
||
ALIGN 4
|
||
InfoCentris650
|
||
dc.l djMEMCTable-InfoCentris650 ; offset to decoder info
|
||
dc.l RamInfoDJMEMC-InfoCentris650 ; offset to ram bank info
|
||
dc.l VideoInfoDAFB-InfoCentris650 ; offset to video info
|
||
dc.l NuBusInfoWombat-InfoCentris650 ; offset to NuBus info
|
||
dc.w 0|\ ; hwCfgFlags
|
||
(1<<hwCbSCSI)|\ ; SCSI port present
|
||
(1<<hwCbClock)|\ ; New clock chip present
|
||
(1<<hwCbFPU)|\ ; FPU chip present.
|
||
(1<<hwCbMMU)|\ ; Some kind of MMU present (see MMUType for what kind).
|
||
(1<<hwCbADB) ; Apple Desktop Bus present.
|
||
dc.b BoxCentris650 ; product kind
|
||
dc.b djMEMCDecoder ; decoder kind
|
||
dc.w $3FFF ; ROM85, New ROMs, Power Off ability.
|
||
dc.b 4 ; default ROM Resource configuration for FPU-based machine <H53><SM29>
|
||
dc.b ProductInfoVersion ; ProductInfo version
|
||
BitVector32 \ ; Flags for valid base addresses 0-31
|
||
ROMExists,\ ; ROMAddr is valid
|
||
DiagROMExists,\ ; DiagROMAddr is valid
|
||
VIA1Exists,\ ; VIA1Addr is valid
|
||
VIA2Exists,\ ; VIA2Addr is valid
|
||
SCCRdExists,\ ; SCCRdAddr is valid
|
||
SCCWrExists,\ ; SCCWrAddr is valid
|
||
ASCExists,\ ; ASCAddr is valid (means Batman in this case)
|
||
IWMExists,\ ; IWMAddr is valid
|
||
SCSI96_1Exists,\ ; 1st SCSI96 is valid
|
||
SONICExists,\ ; SONIC is valid
|
||
PatchROMExists,\ ; Patch ROM is valid
|
||
DAFBExists ; has DAFB video
|
||
BitVector32 ; Flags for valid base addresses 32-63
|
||
BitVector32 ; Flags for valid base addresses 64-95
|
||
dc.l \ ; Flags for valid ext feature flags 0-31
|
||
(ClockRTC)|\ ; Has RTC clock/PRAM
|
||
(SoundHasSoundIn)|\ ; Has 8-bit mono sound input <LW7>
|
||
(SoundStereoOut)|\ ; has stereo sound output
|
||
(SoundStereoMixing)|\ ; has stereo mixing
|
||
(SoundPlayAndRecord)|\ ; can Play and Record simultaneously <H42>
|
||
(1<<hasNewMemMgr)|\ ; hasNewMemMgr support (ie Figment can be switched on)
|
||
(1<<djMEMCChipBit)|\ ; Wombat-style memory controller
|
||
(ADBXcvr) ; Has transceiver ADB
|
||
dc.l 0 ; Flags for valid ext feature flags 32-63
|
||
dc.l 0 ; Flags for valid ext feature flags 64-95
|
||
dc.b $56,$00,$00,$00 ; Check VIA1: PA6 PA4, PA2, PA1 <H43>
|
||
dc.b $46,$00,$00,$00 ; VIA1: PA6 = 1, PA4 = 0, PA2 = 1, PA1 = 1 <H43>
|
||
dc.l VIA1InitWombat-InfoCentris650 ; VIA1 init info
|
||
dc.l VIA2InitWombat-InfoCentris650 ; VIA2 init info
|
||
dc.l SndCntlQuadra800-InfoCentris650 ; sound control vector table <SM42>
|
||
dc.l RTCClockPRAM-InfoCentris650 ; clock/PRAM vector table
|
||
dc.l ViaADBTable-InfoCentris650 ; ADB/DebugUtil vector table
|
||
dc.l 0 ; no Power Manager primitives <SM33>
|
||
dc.l DJMEMCIntTbl-InfoCentris650 ; interrupt handlers table <SM38>
|
||
dc.l 0 ; internal modem manager
|
||
dc.w (cpuIDHiEnd)|\ ; HiEnd design center
|
||
(cpuIDinVIA)|\ ; supplemental ID in VIA1
|
||
$3AD ; specific ID
|
||
dc.w 0 ; spare <SM74>
|
||
dc.l IconInfoLego-InfoCentris650 ; offset to ICON info <SM74>
|
||
|
||
|
||
; 33MHz Wombat product table (Lego plastics)
|
||
|
||
ALIGN 4
|
||
InfoQuadra650
|
||
dc.l djMEMCTable-InfoQuadra650 ; offset to decoder info
|
||
dc.l RamInfoDJMEMC-InfoQuadra650 ; offset to ram bank info
|
||
dc.l VideoInfoDAFB-InfoQuadra650 ; offset to video info
|
||
dc.l NuBusInfoWombat-InfoQuadra650 ; offset to NuBus info
|
||
dc.w 0|\ ; hwCfgFlags
|
||
(1<<hwCbSCSI)|\ ; SCSI port present
|
||
(1<<hwCbClock)|\ ; New clock chip present
|
||
(1<<hwCbFPU)|\ ; FPU chip present.
|
||
(1<<hwCbMMU)|\ ; Some kind of MMU present (see MMUType for what kind).
|
||
(1<<hwCbADB) ; Apple Desktop Bus present.
|
||
dc.b BoxQuadra650 ; product kind
|
||
dc.b djMEMCDecoder ; decoder kind
|
||
dc.w $3FFF ; ROM85, New ROMs, Power Off ability.
|
||
dc.b 2 ; default ROM Resource configuration for FPU-based machine
|
||
dc.b ProductInfoVersion ; ProductInfo version
|
||
BitVector32 \ ; Flags for valid base addresses 0-31
|
||
ROMExists,\ ; ROMAddr is valid
|
||
DiagROMExists,\ ; DiagROMAddr is valid
|
||
VIA1Exists,\ ; VIA1Addr is valid
|
||
VIA2Exists,\ ; VIA2Addr is valid
|
||
SCCRdExists,\ ; SCCRdAddr is valid
|
||
SCCWrExists,\ ; SCCWrAddr is valid
|
||
ASCExists,\ ; ASCAddr is valid (means Batman in this case)
|
||
IWMExists,\ ; IWMAddr is valid
|
||
SCSI96_1Exists,\ ; 1st SCSI96 is valid
|
||
SONICExists,\ ; SONIC is valid
|
||
PatchROMExists,\ ; Patch ROM is valid
|
||
DAFBExists ; has DAFB video
|
||
BitVector32 ; Flags for valid base addresses 32-63
|
||
BitVector32 ; Flags for valid base addresses 64-95
|
||
dc.l \ ; Flags for valid ext feature flags 0-31
|
||
(ClockRTC)|\ ; Has RTC clock/PRAM
|
||
(SoundHasSoundIn)|\ ; Has 8-bit mono sound input <LW7>
|
||
(SoundStereoOut)|\ ; has stereo sound output
|
||
(SoundStereoMixing)|\ ; has stereo mixing
|
||
(SoundPlayAndRecord)|\ ; can Play and Record simultaneously <H42>
|
||
(1<<djMEMCChipBit)|\ ; Wombat-style memory controller
|
||
(1<<hasNewMemMgr)|\ ; hasNewMemMgr support (ie Figment can be switched on)
|
||
(ADBXcvr) ; Has transceiver ADB
|
||
dc.l 0 ; Flags for valid ext feature flags 32-63
|
||
dc.l 0 ; Flags for valid ext feature flags 64-95
|
||
dc.b $56,$00,$00,$00 ; Check VIA1: PA6 PA4, PA2, PA1 <H43>
|
||
dc.b $52,$00,$00,$00 ; VIA1: PA6 = 1, PA4 = 1, PA2 = 0, PA1 = 1 <H43>
|
||
dc.l VIA1InitWombat-InfoQuadra650 ; VIA1 init info
|
||
dc.l VIA2InitWombat-InfoQuadra650 ; VIA2 init info
|
||
dc.l SndCntlQuadra800-InfoQuadra650 ; sound control vector table <SM42>
|
||
dc.l RTCClockPRAM-InfoQuadra650 ; clock/PRAM vector table
|
||
dc.l ViaADBTable-InfoQuadra650 ; ADB/DebugUtil vector table
|
||
dc.l 0 ; no Power Manager primitives <SM33>
|
||
dc.l DJMEMCIntTbl-InfoQuadra650 ; interrupt handlers table <SM38>
|
||
dc.l 0 ; internal modem manager
|
||
dc.w (cpuIDHiEnd)|\ ; HiEnd design center
|
||
(cpuIDinVIA)|\ ; supplemental ID in VIA1
|
||
$3AD ; specific ID
|
||
dc.w 0 ; spare <SM74>
|
||
dc.l IconInfoLego-InfoQuadra650 ; offset to ICON info <SM74>
|
||
|
||
|
||
; 33MHz Wombat product table (Frigidaire plastics)
|
||
|
||
ALIGN 4
|
||
InfoQuadra800
|
||
dc.l djMEMCTable-InfoQuadra800 ; offset to decoder info
|
||
dc.l RamInfoDJMEMC-InfoQuadra800 ; offset to ram bank info
|
||
dc.l VideoInfoDAFB-InfoQuadra800 ; offset to video info
|
||
dc.l NuBusInfoWombat-InfoQuadra800 ; offset to NuBus info
|
||
dc.w 0|\ ; hwCfgFlags
|
||
(1<<hwCbSCSI)|\ ; SCSI port present
|
||
(1<<hwCbClock)|\ ; New clock chip present
|
||
(1<<hwCbFPU)|\ ; FPU chip optional.
|
||
(1<<hwCbMMU)|\ ; Some kind of MMU present (see MMUType for what kind).
|
||
(1<<hwCbADB) ; Apple Desktop Bus present.
|
||
dc.b BoxQuadra800 ; product kind
|
||
dc.b djMEMCDecoder ; decoder kind
|
||
dc.w $3FFF ; ROM85, New ROMs, Power Off ability.
|
||
dc.b 2 ; default ROM Resource configuration for FPU-based machine
|
||
dc.b ProductInfoVersion ; ProductInfo version <SM29>
|
||
BitVector32 \ ; Flags for valid base addresses 0-31 <SM29>
|
||
ROMExists,\ ; ROMAddr is valid <SM29>
|
||
DiagROMExists,\ ; DiagROMAddr is valid <SM29>
|
||
VIA1Exists,\ ; VIA1Addr is valid <SM29>
|
||
VIA2Exists,\ ; VIA2Addr is valid <SM29>
|
||
SCCRdExists,\ ; SCCRdAddr is valid <SM29>
|
||
SCCWrExists,\ ; SCCWrAddr is valid <SM29>
|
||
ASCExists,\ ; ASCAddr is valid (means Batman in this case) <SM29>
|
||
IWMExists,\ ; IWMAddr is valid <SM29>
|
||
SCSI96_1Exists,\ ; 1st SCSI96 is valid <SM29>
|
||
SONICExists,\ ; SONIC is valid <SM29>
|
||
PatchROMExists,\ ; Patch ROM is valid <SM29>
|
||
DAFBExists ; has DAFB video <SM29>
|
||
BitVector32 ; Flags for valid base addresses 32-63 <SM29>
|
||
BitVector32 ; Flags for valid base addresses 64-95 <SM29>
|
||
dc.l (ClockRTC)|\ ; Has RTC clock/PRAM
|
||
(SoundHasSoundIn)|\ ; Has 8-bit mono sound input <LW7>
|
||
(SoundStereoOut)|\ ; has stereo sound output
|
||
(SoundStereoMixing)|\ ; has stereo mixing
|
||
(SoundPlayAndRecord)|\ ; can Play and Record simultaneously <H42>
|
||
(1<<djMEMCChipBit)|\ ; Wombat-style memory controller
|
||
(1<<hasNewMemMgr)|\ ; hasNewMemMgr support (ie Figment can be switched on)
|
||
(ADBXcvr) ; Has transceiver ADB
|
||
dc.l 0 ; Flags for valid ext feature flags 32-63 <SM29>
|
||
dc.l 0 ; Flags for valid ext feature flags 64-95 <SM29>
|
||
dc.b $56,$00,$00,$00 ; Check VIA1: PA6 PA4, PA2, PA1 <H43>
|
||
dc.b $12,$00,$00,$00 ; VIA1: PA6 = 0, PA4 = 1, PA2 = 0, PA1 = 1 <H43><H46>
|
||
dc.l VIA1InitWombat-InfoQuadra800 ; VIA1 init info
|
||
dc.l VIA2InitWombat-InfoQuadra800 ; VIA2 init info
|
||
dc.l SndCntlQuadra800-InfoQuadra800 ; sound control vector table <SM42>
|
||
dc.l RTCClockPRAM-InfoQuadra800 ; clock/PRAM vector table
|
||
dc.l ViaADBTable-InfoQuadra800 ; ADB/DebugUtil vector table
|
||
dc.l 0 ; no Power Manager primitives <SM33>
|
||
dc.l DJMEMCIntTbl-InfoQuadra800 ; interrupt handlers table <SM38>
|
||
dc.l 0 ; internal modem manager
|
||
dc.w (cpuIDHiEnd)|\ ; HiEnd design center
|
||
(cpuIDinVIA)|\ ; supplemental ID in VIA1
|
||
$3AD ; specific ID
|
||
dc.w 0 ; spare <SM74>
|
||
dc.l IconInfoFrigidaire-InfoQuadra800 ; offset to ICON info <SM74>
|
||
|
||
|
||
; 40MHz Wombat product table (Lego plastics)
|
||
|
||
ALIGN 4
|
||
InfoWombat40
|
||
dc.l djMEMCTable-InfoWombat40 ; offset to decoder info
|
||
dc.l RamInfoDJMEMC-InfoWombat40 ; offset to ram bank info
|
||
dc.l VideoInfoDAFB-InfoWombat40 ; offset to video info
|
||
dc.l NuBusInfoWombat-InfoWombat40 ; offset to NuBus info
|
||
dc.w 0|\ ; hwCfgFlags
|
||
(1<<hwCbSCSI)|\ ; SCSI port present
|
||
(1<<hwCbClock)|\ ; New clock chip present
|
||
(1<<hwCbFPU)|\ ; FPU chip present.
|
||
(1<<hwCbMMU)|\ ; Some kind of MMU present (see MMUType for what kind).
|
||
(1<<hwCbADB) ; Apple Desktop Bus present.
|
||
dc.b BoxWombat40 ; product kind
|
||
dc.b djMEMCDecoder ; decoder kind
|
||
dc.w $3FFF ; ROM85, New ROMs, Power Off ability.
|
||
dc.b 2 ; default ROM Resource configuration for FPU-based machine
|
||
dc.b ProductInfoVersion ; ProductInfo version
|
||
BitVector32 \ ; Flags for valid base addresses 0-31
|
||
ROMExists,\ ; ROMAddr is valid
|
||
DiagROMExists,\ ; DiagROMAddr is valid
|
||
VIA1Exists,\ ; VIA1Addr is valid
|
||
VIA2Exists,\ ; VIA2Addr is valid
|
||
SCCRdExists,\ ; SCCRdAddr is valid
|
||
SCCWrExists,\ ; SCCWrAddr is valid
|
||
ASCExists,\ ; ASCAddr is valid (means Batman in this case)
|
||
IWMExists,\ ; IWMAddr is valid
|
||
SCSI96_1Exists,\ ; 1st SCSI96 is valid
|
||
SONICExists,\ ; SONIC is valid
|
||
PatchROMExists,\ ; Patch ROM is valid
|
||
DAFBExists ; has DAFB video
|
||
BitVector32 ; Flags for valid base addresses 32-63
|
||
BitVector32 ; Flags for valid base addresses 64-95
|
||
dc.l \ ; Flags for valid ext feature flags 0-31
|
||
(ClockRTC)|\ ; Has RTC clock/PRAM
|
||
(SoundHasSoundIn)|\ ; Has 8-bit mono sound input <LW7>
|
||
(SoundStereoOut)|\ ; has stereo sound output
|
||
(SoundStereoMixing)|\ ; has stereo mixing
|
||
(SoundPlayAndRecord)|\ ; can Play and Record simultaneously <H42>
|
||
(1<<djMEMCChipBit)|\ ; Wombat-style memory controller
|
||
(ADBXcvr) ; Has transceiver ADB
|
||
dc.l 0 ; Flags for valid ext feature flags 32-63
|
||
dc.l 0 ; Flags for valid ext feature flags 64-95
|
||
dc.b $56,$00,$00,$00 ; Check VIA1: PA6 PA4, PA2, PA1 <H43>
|
||
dc.b $56,$00,$00,$00 ; VIA1: PA6 = 1, PA4 = 1, PA2 = 1, PA1 = 1 <H43>
|
||
dc.l VIA1InitWombat-InfoWombat40 ; VIA1 init info
|
||
dc.l VIA2InitWombat-InfoWombat40 ; VIA2 init info
|
||
dc.l SndCntlQuadra800-InfoWombat40 ; sound control vector table <SM42>
|
||
dc.l RTCClockPRAM-InfoWombat40 ; clock/PRAM vector table
|
||
dc.l ViaADBTable-InfoWombat40 ; ADB/DebugUtil vector table
|
||
dc.l 0 ; no Power Manager primitives <SM33>
|
||
dc.l DJMEMCIntTbl-InfoWombat40 ; interrupt handlers table <SM38>
|
||
dc.l 0 ; internal modem manager
|
||
dc.w (cpuIDHiEnd)|\ ; HiEnd design center
|
||
(cpuIDinVIA)|\ ; supplemental ID in VIA1
|
||
$3AD ; specific ID
|
||
dc.w 0 ; spare <SM74>
|
||
dc.l IconInfoLego-InfoWombat40 ; offset to ICON info <SM74>
|
||
|
||
|
||
; 40MHz Wombat product table (Frigidaire package)
|
||
|
||
ALIGN 4
|
||
InfoWombat40F
|
||
dc.l djMEMCTable-InfoWombat40F ; offset to decoder info
|
||
dc.l RamInfoDJMEMC-InfoWombat40F ; offset to ram bank info
|
||
dc.l VideoInfoDAFB-InfoWombat40F ; offset to video info
|
||
dc.l NuBusInfoWombat-InfoWombat40F ; offset to NuBus info
|
||
dc.w 0|\ ; hwCfgFlags
|
||
(1<<hwCbSCSI)|\ ; SCSI port present
|
||
(1<<hwCbClock)|\ ; New clock chip present
|
||
(1<<hwCbFPU)|\ ; FPU chip present.
|
||
(1<<hwCbMMU)|\ ; Some kind of MMU present (see MMUType for what kind).
|
||
(1<<hwCbADB) ; Apple Desktop Bus present.
|
||
dc.b boxWombat40F ; product kind
|
||
dc.b djMEMCDecoder ; decoder kind
|
||
dc.w $3FFF ; ROM85, New ROMs, Power Off ability.
|
||
dc.b 2 ; default ROM Resource configuration for FPU-based machine
|
||
dc.b 0 ; unused
|
||
BitVector32 \ ; Flags for valid base addresses 0-31 <SM29>
|
||
ROMExists,\ ; ROMAddr is valid <SM29>
|
||
DiagROMExists,\ ; DiagROMAddr is valid <SM29>
|
||
VIA1Exists,\ ; VIA1Addr is valid <SM29>
|
||
VIA2Exists,\ ; VIA2Addr is valid <SM29>
|
||
SCCRdExists,\ ; SCCRdAddr is valid <SM29>
|
||
SCCWrExists,\ ; SCCWrAddr is valid <SM29>
|
||
ASCExists,\ ; ASCAddr is valid (means Batman in this case) <SM29>
|
||
IWMExists,\ ; IWMAddr is valid <SM29>
|
||
SCSI96_1Exists,\ ; 1st SCSI96 is valid <SM29>
|
||
SONICExists,\ ; SONIC is valid <SM29>
|
||
PatchROMExists,\ ; Patch ROM is valid <SM29>
|
||
DAFBExists ; has DAFB video <SM29>
|
||
BitVector32 ; Flags for valid base addresses 32-63 <SM29>
|
||
BitVector32 ; Flags for valid base addresses 64-95 <SM29>
|
||
dc.l (ClockRTC)|\ ; Has RTC clock/PRAM
|
||
(SoundHasSoundIn)|\ ; Has 8-bit mono sound input <LW7>
|
||
(SoundStereoOut)|\ ; has stereo sound output
|
||
(SoundStereoMixing)|\ ; has stereo mixing
|
||
(SoundPlayAndRecord)|\ ; can Play and Record simultaneously
|
||
(1<<djMEMCChipBit)|\ ; Wombat-style memory controller
|
||
(ADBXcvr) ; Has transceiver ADB
|
||
dc.l 0 ; Flags for valid ext feature flags 32-63 <SM29>
|
||
dc.l 0 ; Flags for valid ext feature flags 64-95 <SM29>
|
||
dc.b $56,$00,$00,$00 ; Check VIA1: PA6 PA4, PA2, PA1
|
||
dc.b $16,$00,$00,$00 ; VIA1: PA6 = 0, PA4 = 1, PA2 = 1, PA1 = 1
|
||
dc.l VIA1InitWombat-InfoWombat40F ; VIA1 init info
|
||
dc.l VIA2InitWombat-InfoWombat40F ; VIA2 init info
|
||
dc.l SndCntlQuadra800-InfoWombat40F ; sound control vector table <SM42>
|
||
dc.l RTCClockPRAM-InfoWombat40F ; clock/PRAM vector table
|
||
dc.l ViaADBTable-InfoWombat40F ; ADB/DebugUtil vector table
|
||
dc.l 0 ; no Power Manager primitives <SM33>
|
||
dc.l DJMEMCIntTbl-InfoWombat40F ; interrupt handlers table <SM38>
|
||
dc.l 0 ; internal modem manager
|
||
dc.w (cpuIDHiEnd)|\ ; HiEnd design center
|
||
(cpuIDinVIA)|\ ; supplemental ID in VIA1
|
||
$3AD ; specific ID
|
||
dc.w 0 ; spare <SM74>
|
||
dc.l IconInfoFrigidaire-InfoWombat40F ; offset to ICON info <SM74>
|
||
|
||
|
||
; 20MHz WLCD product table (QFC plastics)
|
||
|
||
ALIGN 4
|
||
InfoCentris610
|
||
dc.l djMEMCTable-InfoCentris610 ; offset to decoder info
|
||
dc.l RamInfoDJMEMC-InfoCentris610 ; offset to ram bank info
|
||
dc.l VideoInfoDAFB-InfoCentris610 ; offset to video info
|
||
dc.l NuBusInfoWLCD-InfoCentris610 ; offset to NuBus info <H50><SM29>
|
||
dc.w 0|\ ; hwCfgFlags
|
||
(1<<hwCbSCSI)|\ ; SCSI port present
|
||
(1<<hwCbClock)|\ ; New clock chip present
|
||
(1<<hwCbFPU)|\ ; No FPU chip present, but user could upgrade to 68RC040.
|
||
(1<<hwCbMMU)|\ ; Some kind of MMU present (see MMUType for what kind).
|
||
(1<<hwCbADB) ; Apple Desktop Bus present.
|
||
dc.b BoxCentris610 ; product kind
|
||
dc.b djMEMCDecoder ; decoder kind
|
||
dc.w $3FFF ; ROM85, New ROMs, Power Off ability.
|
||
dc.b 2 ; default ROM Resource configuration for FPU-based machine
|
||
dc.b ProductInfoVersion ; ProductInfo version
|
||
BitVector32 \ ; Flags for valid base addresses 0-31
|
||
ROMExists,\ ; ROMAddr is valid
|
||
DiagROMExists,\ ; DiagROMAddr is valid
|
||
VIA1Exists,\ ; VIA1Addr is valid
|
||
VIA2Exists,\ ; VIA2Addr is valid
|
||
SCCRdExists,\ ; SCCRdAddr is valid
|
||
SCCWrExists,\ ; SCCWrAddr is valid
|
||
ASCExists,\ ; ASCAddr is valid (means Batman in this case)
|
||
IWMExists,\ ; IWMAddr is valid
|
||
SCSI96_1Exists,\ ; 1st SCSI96 is valid
|
||
SONICExists,\ ; SONIC is valid
|
||
PatchROMExists,\ ; Patch ROM is valid
|
||
DAFBExists ; has DAFB video
|
||
BitVector32 ; Flags for valid base addresses 32-63
|
||
BitVector32 ; Flags for valid base addresses 64-95
|
||
dc.l \ ; Flags for valid ext feature flags 0-31
|
||
(ClockRTC)|\ ; Has RTC clock/PRAM
|
||
(SoundHasSoundIn)|\ ; Has 8-bit mono sound input <LW7>
|
||
(SoundStereoOut)|\ ; has stereo sound output
|
||
(SoundStereoMixing)|\ ; has stereo mixing
|
||
(SoundPlayAndRecord)|\ ; can Play and Record simultaneously <H42>
|
||
(1<<djMEMCChipBit)|\ ; Wombat-style memory controller
|
||
(1<<hasHardPowerOff)|\ ; hasHardPowerOff is valid <H63><SM29>
|
||
(1<<hasNewMemMgr)|\ ; hasNewMemMgr support (ie Figment can be switched on)
|
||
(ADBXcvr) ; Has transceiver ADB
|
||
dc.l 0 ; Flags for valid ext feature flags 32-63
|
||
dc.l 0 ; Flags for valid ext feature flags 64-95
|
||
dc.b $56,$00,$00,$00 ; Check VIA1: PA6 PA4, PA2, PA1 <H43>
|
||
dc.b $40,$00,$00,$00 ; VIA1: PA6 = 1, PA4 = 0, PA2 = 0, PA1 = 0 <H43>
|
||
dc.l VIA1InitWombat-InfoCentris610 ; VIA1 init info
|
||
dc.l VIA2InitWombat-InfoCentris610 ; VIA2 init info
|
||
dc.l SndCntlQuadra800-InfoCentris610 ; sound control vector table <SM42>
|
||
dc.l RTCClockPRAM-InfoCentris610 ; clock/PRAM vector table
|
||
dc.l ViaADBTable-InfoCentris610 ; ADB/DebugUtil vector table
|
||
dc.l 0 ; no Power Manager primitives <SM33>
|
||
dc.l DJMEMCIntTbl-InfoCentris610 ; interrupt handlers table <SM38>
|
||
dc.l 0 ; internal modem manager
|
||
dc.w (cpuIDHiEnd)|\ ; HiEnd design center
|
||
(cpuIDinVIA)|\ ; supplemental ID in VIA1
|
||
$3AD ; specific ID
|
||
dc.w 0 ; spare <SM74>
|
||
dc.l IconInfoQFC-InfoCentris610 ; offset to ICON info <SM74>
|
||
|
||
|
||
|
||
; 25MHz WLCD product table (QFC plastics)
|
||
|
||
ALIGN 4
|
||
InfoQuadra610
|
||
dc.l djMEMCTable-InfoQuadra610 ; offset to decoder info
|
||
dc.l RamInfoDJMEMC-InfoQuadra610 ; offset to ram bank info
|
||
dc.l VideoInfoDAFB-InfoQuadra610 ; offset to video info
|
||
dc.l NuBusInfoWLCD-InfoQuadra610 ; offset to NuBus info <H50><SM29>
|
||
dc.w 0|\ ; hwCfgFlags
|
||
(1<<hwCbSCSI)|\ ; SCSI port present
|
||
(1<<hwCbClock)|\ ; New clock chip present
|
||
(1<<hwCbFPU)|\ ; FPU chip present.
|
||
(1<<hwCbMMU)|\ ; Some kind of MMU present (see MMUType for what kind).
|
||
(1<<hwCbADB) ; Apple Desktop Bus present.
|
||
dc.b BoxQuadra610 ; product kind
|
||
dc.b djMEMCDecoder ; decoder kind
|
||
dc.w $3FFF ; ROM85, New ROMs, Power Off ability.
|
||
dc.b 2 ; default ROM Resource configuration for FPU-based machine
|
||
dc.b ProductInfoVersion ; ProductInfo version
|
||
BitVector32 \ ; Flags for valid base addresses 0-31
|
||
ROMExists,\ ; ROMAddr is valid
|
||
DiagROMExists,\ ; DiagROMAddr is valid
|
||
VIA1Exists,\ ; VIA1Addr is valid
|
||
VIA2Exists,\ ; VIA2Addr is valid
|
||
SCCRdExists,\ ; SCCRdAddr is valid
|
||
SCCWrExists,\ ; SCCWrAddr is valid
|
||
ASCExists,\ ; ASCAddr is valid (means Batman in this case)
|
||
IWMExists,\ ; IWMAddr is valid
|
||
SCSI96_1Exists,\ ; 1st SCSI96 is valid
|
||
SONICExists,\ ; SONIC is valid
|
||
PatchROMExists,\ ; Patch ROM is valid
|
||
DAFBExists ; has DAFB video
|
||
BitVector32 ; Flags for valid base addresses 32-63
|
||
BitVector32 ; Flags for valid base addresses 64-95
|
||
dc.l \ ; Flags for valid ext feature flags 0-31
|
||
(ClockRTC)|\ ; Has RTC clock/PRAM
|
||
(SoundHasSoundIn)|\ ; Has 8-bit mono sound input <LW7>
|
||
(SoundStereoOut)|\ ; has stereo sound output
|
||
(SoundStereoMixing)|\ ; has stereo mixing
|
||
(SoundPlayAndRecord)|\ ; can Play and Record simultaneously <H42>
|
||
(1<<djMEMCChipBit)|\ ; Wombat-style memory controller
|
||
(1<<hasHardPowerOff)|\ ; hasHardPowerOff is valid <H63><SM29>
|
||
(1<<hasNewMemMgr)|\ ; hasNewMemMgr support (ie Figment can be switched on)
|
||
(ADBXcvr) ; Has transceiver ADB
|
||
dc.l 0 ; Flags for valid ext feature flags 32-63
|
||
dc.l 0 ; Flags for valid ext feature flags 64-95
|
||
dc.b $56,$00,$00,$00 ; Check VIA1: PA6 PA4, PA2, PA1 <H43>
|
||
dc.b $44,$00,$00,$00 ; VIA1: PA6 = 1, PA4 = 0, PA2 = 1, PA1 = 0 <H43>
|
||
dc.l VIA1InitWombat-InfoQuadra610 ; VIA1 init info
|
||
dc.l VIA2InitWombat-InfoQuadra610 ; VIA2 init info
|
||
dc.l SndCntlQuadra800-InfoQuadra610 ; sound control vector table <SM42>
|
||
dc.l RTCClockPRAM-InfoQuadra610 ; clock/PRAM vector table
|
||
dc.l ViaADBTable-InfoQuadra610 ; ADB/DebugUtil vector table
|
||
dc.l 0 ; no Power Manager primitives <SM33>
|
||
dc.l DJMEMCIntTbl-InfoQuadra610 ; interrupt handlers table <SM38>
|
||
dc.l 0 ; internal modem manager
|
||
dc.w (cpuIDHiEnd)|\ ; HiEnd design center
|
||
(cpuIDinVIA)|\ ; supplemental ID in VIA1
|
||
$3AD ; specific ID
|
||
dc.w 0 ; spare <SM74>
|
||
dc.l IconInfoQFC-InfoQuadra610 ; offset to ICON info <SM74>
|
||
|
||
|
||
|
||
; 33MHz WLCD product table (QFC package)
|
||
|
||
ALIGN 4
|
||
InfoWLCD33
|
||
dc.l djMEMCTable-InfoWLCD33 ; offset to decoder info
|
||
dc.l RamInfoDJMEMC-InfoWLCD33 ; offset to ram bank info
|
||
dc.l VideoInfoDAFB-InfoWLCD33 ; offset to video info
|
||
dc.l NuBusInfoWLCD-InfoWLCD33 ; offset to NuBus info
|
||
dc.w 0|\ ; hwCfgFlags
|
||
(1<<hwCbSCSI)|\ ; SCSI port present
|
||
(1<<hwCbClock)|\ ; New clock chip present
|
||
(1<<hwCbFPU)|\ ; FPU chip present.
|
||
(1<<hwCbMMU)|\ ; Some kind of MMU present (see MMUType for what kind).
|
||
(1<<hwCbADB) ; Apple Desktop Bus present.
|
||
dc.b BoxWLCD33 ; product kind
|
||
dc.b djMEMCDecoder ; decoder kind
|
||
dc.w $3FFF ; ROM85, New ROMs, Power Off ability.
|
||
dc.b 4 ; ROM Resource configuration for optional FPU-based machine
|
||
dc.b ProductInfoVersion ; ProductInfo version <SM29>
|
||
BitVector32 \ ; Flags for valid base addresses 0-31 <SM29>
|
||
ROMExists,\ ; ROMAddr is valid <SM29>
|
||
DiagROMExists,\ ; DiagROMAddr is valid <SM29>
|
||
VIA1Exists,\ ; VIA1Addr is valid <SM29>
|
||
VIA2Exists,\ ; VIA2Addr is valid <SM29>
|
||
SCCRdExists,\ ; SCCRdAddr is valid <SM29>
|
||
SCCWrExists,\ ; SCCWrAddr is valid <SM29>
|
||
ASCExists,\ ; ASCAddr is valid (means Batman in this case) <SM29>
|
||
IWMExists,\ ; IWMAddr is valid <SM29>
|
||
SCSI96_1Exists,\ ; 1st SCSI96 is valid <SM29>
|
||
SONICExists,\ ; SONIC is valid <SM29>
|
||
PatchROMExists,\ ; Patch ROM is valid <SM29>
|
||
DAFBExists ; has DAFB video <SM29>
|
||
BitVector32 ; Flags for valid base addresses 32-63 <SM29>
|
||
BitVector32 ; Flags for valid base addresses 64-95 <SM29>
|
||
dc.l (ClockRTC)|\ ; Has RTC clock/PRAM
|
||
(SoundHasSoundIn)|\ ; Has 8-bit mono sound input <LW7>
|
||
(SoundStereoOut)|\ ; has stereo sound output
|
||
(SoundStereoMixing)|\ ; has stereo mixing
|
||
(SoundPlayAndRecord)|\ ; can Play and Record simultaneously
|
||
(1<<djMEMCChipBit)|\ ; Wombat-style memory controller
|
||
(1<<hasHardPowerOff)|\ ; hasHardPowerOff is valid
|
||
(ADBXcvr) ; Has transceiver ADB
|
||
dc.l 0 ; Flags for valid ext feature flags 32-63 <SM29>
|
||
dc.l 0 ; Flags for valid ext feature flags 64-95 <SM29>
|
||
dc.b $56,$00,$00,$00 ; Check VIA1: PA6 PA4, PA2, PA1
|
||
dc.b $50,$00,$00,$00 ; VIA1: PA6 = 1, PA4 = 1, PA2 = 0, PA1 = 0
|
||
dc.l VIA1InitWombat-InfoWLCD33 ; VIA1 init info
|
||
dc.l VIA2InitWombat-InfoWLCD33 ; VIA2 init info
|
||
dc.l SndCntlQuadra800-InfoWLCD33 ; sound control vector table <SM42>
|
||
dc.l RTCClockPRAM-InfoWLCD33 ; clock/PRAM vector table
|
||
dc.l ViaADBTable-InfoWLCD33 ; ADB/DebugUtil vector table
|
||
dc.l 0 ; no Power Manager primitives <SM33>
|
||
dc.l DJMEMCIntTbl-InfoWLCD33 ; interrupt handlers table <SM38>
|
||
dc.l 0 ; internal modem manager
|
||
dc.w (cpuIDHiEnd)|\ ; HiEnd design center
|
||
(cpuIDinVIA)|\ ; supplemental ID in VIA1
|
||
$3AD ; specific ID
|
||
dc.w 0 ; spare <SM74>
|
||
dc.l IconInfoQFC-InfoWLCD33 ; offset to ICON info <SM74>
|
||
|
||
|
||
IF forSmurf THEN
|
||
|
||
; Centris610 with a Smurf card
|
||
|
||
ALIGN 4
|
||
InfoRiscCentris610
|
||
dc.l djMEMCTable-InfoRiscCentris610 ; offset to decoder info
|
||
dc.l RamInfoRISCDJMEMC-InfoRiscCentris610; offset to ram bank info
|
||
dc.l VideoInfoDAFB-InfoRiscCentris610 ; offset to video info
|
||
dc.l NuBusInfoWLCD-InfoRiscCentris610 ; offset to NuBus info <H50><SM29>
|
||
dc.w 0|\ ; hwCfgFlags
|
||
(1<<hwCbSCSI)|\ ; SCSI port present
|
||
(1<<hwCbClock)|\ ; New clock chip present
|
||
(1<<hwCbFPU)|\ ; No FPU chip present, but user could upgrade to 68RC040.
|
||
(1<<hwCbMMU)|\ ; Some kind of MMU present (see MMUType for what kind).
|
||
(1<<hwCbADB) ; Apple Desktop Bus present.
|
||
dc.b boxRiscCentris650 ; product kind
|
||
dc.b djMEMCDecoder ; decoder kind
|
||
dc.w $3FFF ; ROM85, New ROMs, Power Off ability.
|
||
dc.b 2 ; default ROM Resource configuration for FPU-based machine
|
||
dc.b ProductInfoVersion ; ProductInfo version
|
||
BitVector32 \ ; Flags for valid base addresses 0-31
|
||
ROMExists,\ ; ROMAddr is valid
|
||
VIA1Exists,\ ; VIA1Addr is valid
|
||
VIA2Exists,\ ; VIA2Addr is valid
|
||
SCCRdExists,\ ; SCCRdAddr is valid
|
||
SCCWrExists,\ ; SCCWrAddr is valid
|
||
ASCExists,\ ; ASCAddr is valid (means Batman in this case)
|
||
IWMExists,\ ; IWMAddr is valid
|
||
SCSI96_1Exists,\ ; 1st SCSI96 is valid
|
||
SONICExists,\ ; SONIC is valid
|
||
PatchROMExists,\ ; Patch ROM is valid
|
||
DAFBExists ; has DAFB video
|
||
BitVector32 ; Flags for valid base addresses 32-63
|
||
BitVector32 ; Flags for valid base addresses 64-95
|
||
dc.l \ ; Flags for valid ext feature flags 0-31
|
||
(ClockRTC)|\ ; Has RTC clock/PRAM
|
||
(SoundHasSoundIn)|\ ; Has 8-bit mono sound input <LW7>
|
||
(SoundStereoOut)|\ ; has stereo sound output
|
||
(SoundStereoMixing)|\ ; has stereo mixing
|
||
(SoundPlayAndRecord)|\ ; can Play and Record simultaneously <H42>
|
||
(1<<djMEMCChipBit)|\ ; Wombat-style memory controller
|
||
(1<<hasHardPowerOff)|\ ; hasHardPowerOff is valid <H63><SM29>
|
||
(ADBXcvr) ; Has transceiver ADB
|
||
dc.l \ ; Flags for valid ext feature flags 32-63
|
||
(1<<has68kEmulator//32) ; This ROM starts up with a 68k emulator
|
||
dc.l 0 ; Flags for valid ext feature flags 64-95
|
||
dc.b $56,$00,$00,$00 ; Check VIA1: PA6 PA4, PA2, PA1 <H43>
|
||
dc.b $40,$00,$00,$00 ; VIA1: PA6 = 1, PA4 = 0, PA2 = 0, PA1 = 0 <H43>
|
||
dc.l VIA1InitWombat-InfoRiscCentris610 ; VIA1 init info
|
||
dc.l VIA2InitWombat-InfoRiscCentris610 ; VIA2 init info
|
||
dc.l SndCntlQuadra800-InfoRiscCentris610 ; sound control vector table <SM42>
|
||
dc.l RTCClockPRAM-InfoRiscCentris610 ; clock/PRAM vector table
|
||
dc.l ViaADBTable-InfoRiscCentris610 ; ADB/DebugUtil vector table
|
||
dc.l 0 ; no Power Manager primitives <SM33>
|
||
dc.l DJMEMCIntTbl-InfoRiscCentris610 ; interrupt handlers table <SM38>
|
||
dc.l 0 ; internal modem manager
|
||
dc.w (cpuIDRISC)|\ ; HiEnd design center
|
||
$1204 ; specific ID
|
||
dc.w 0 ; spare <SM74>
|
||
dc.l IconInfoQFC-InfoRiscCentris610 ; offset to ICON info <SM74>
|
||
|
||
|
||
; Wombat product table w/Smurf...a centris650 (Lego plastics)
|
||
|
||
ALIGN 4
|
||
InfoRiscCentris650 ; <SM48>
|
||
dc.l djMEMCTable-InfoRiscCentris650 ; offset to decoder info
|
||
dc.l RamInfoRISCDJMEMC-InfoRiscCentris650; offset to ram bank info
|
||
dc.l VideoInfoDAFB-InfoRiscCentris650 ; offset to video info
|
||
dc.l NuBusInfoWombat-InfoRiscCentris650 ; offset to NuBus info
|
||
dc.w 0|\ ; hwCfgFlags
|
||
(1<<hwCbSCSI)|\ ; SCSI port present
|
||
(1<<hwCbClock)|\ ; New clock chip present
|
||
(0<<hwCbFPU)|\ ; FPU chip present.
|
||
(1<<hwCbMMU)|\ ; Some kind of MMU present (see MMUType for what kind).
|
||
(1<<hwCbADB) ; Apple Desktop Bus present.
|
||
dc.b boxRiscCentris650 ; product kind
|
||
dc.b djMEMCDecoder ; decoder kind
|
||
dc.w $3FFF ; ROM85, New ROMs, Power Off ability.
|
||
dc.b 4 ; default ROM Resource configuration for FPU-based machine <H53><SM29>
|
||
dc.b ProductInfoVersion ; ProductInfo version
|
||
BitVector32 \ ; Flags for valid base addresses 0-31
|
||
ROMExists,\ ; ROMAddr is valid
|
||
VIA1Exists,\ ; VIA1Addr is valid
|
||
VIA2Exists,\ ; VIA2Addr is valid
|
||
SCCRdExists,\ ; SCCRdAddr is valid
|
||
SCCWrExists,\ ; SCCWrAddr is valid
|
||
ASCExists,\ ; ASCAddr is valid (means Batman in this case)
|
||
IWMExists,\ ; IWMAddr is valid
|
||
SCSI96_1Exists,\ ; 1st SCSI96 is valid
|
||
SONICExists,\ ; SONIC is valid
|
||
PatchROMExists,\ ; Patch ROM is valid
|
||
DAFBExists ; has DAFB video
|
||
BitVector32 ; Flags for valid base addresses 32-63
|
||
BitVector32 ; Flags for valid base addresses 64-95
|
||
dc.l \ ; Flags for valid ext feature flags 0-31
|
||
(ClockRTC)|\ ; Has RTC clock/PRAM
|
||
(SoundHasSoundIn)|\ ; Has 8-bit mono sound input <LW7>
|
||
(SoundStereoOut)|\ ; has stereo sound output
|
||
(SoundStereoMixing)|\ ; has stereo mixing
|
||
(SoundPlayAndRecord)|\ ; can Play and Record simultaneously <H42>
|
||
(1<<djMEMCChipBit)|\ ; Wombat-style memory controller
|
||
(ADBXcvr) ; Has transceiver ADB
|
||
dc.l \ ; Flags for valid ext feature flags 32-63
|
||
(1<<has68kEmulator//32) ; This ROM starts up with a 68k emulator
|
||
dc.l 0 ; Flags for valid ext feature flags 64-95
|
||
dc.b $56,$00,$00,$00 ; Check VIA1: PA6 PA4, PA2, PA1 <H43>
|
||
dc.b $46,$00,$00,$00 ; VIA1: PA6 = 1, PA4 = 0, PA2 = 1, PA1 = 1 <H43>
|
||
dc.l VIA1InitWombat-InfoRiscCentris650 ; VIA1 init info
|
||
dc.l VIA2InitWombat-InfoRiscCentris650 ; VIA2 init info
|
||
dc.l SndCntlQuadra800-InfoRiscCentris650 ; sound control vector table <SM42>
|
||
dc.l RTCClockPRAM-InfoRiscCentris650 ; clock/PRAM vector table
|
||
dc.l ViaADBTable-InfoRiscCentris650 ; ADB/DebugUtil vector table
|
||
dc.l 0 ; no Power Manager primitives <SM33>
|
||
dc.l DJMEMCIntTbl-InfoRiscCentris650 ; interrupt handlers table <SM38>
|
||
dc.l 0 ; internal modem manager
|
||
dc.w (cpuIDRISC)|\ ; CPU ID: RISC design center
|
||
$1200 ; specific ID
|
||
dc.w 0 ; spare <SM74>
|
||
dc.l IconInfoLego-InfoRiscCentris650 ; offset to ICON info <SM74>
|
||
|
||
; Quadra610 with a smurf card
|
||
|
||
ALIGN 4
|
||
InfoRiscQuadra610
|
||
dc.l djMEMCTable-InfoRiscQuadra610 ; offset to decoder info
|
||
dc.l RamInfoRISCDJMEMC-InfoRiscQuadra610 ; offset to ram bank info
|
||
dc.l VideoInfoDAFB-InfoRiscQuadra610 ; offset to video info
|
||
dc.l NuBusInfoWLCD-InfoRiscQuadra610 ; offset to NuBus info <H50><SM29>
|
||
dc.w 0|\ ; hwCfgFlags
|
||
(1<<hwCbSCSI)|\ ; SCSI port present
|
||
(1<<hwCbClock)|\ ; New clock chip present
|
||
(1<<hwCbFPU)|\ ; FPU chip present.
|
||
(1<<hwCbMMU)|\ ; Some kind of MMU present (see MMUType for what kind).
|
||
(1<<hwCbADB) ; Apple Desktop Bus present.
|
||
dc.b boxRiscCentris650 ; product kind
|
||
dc.b djMEMCDecoder ; decoder kind
|
||
dc.w $3FFF ; ROM85, New ROMs, Power Off ability.
|
||
dc.b 2 ; default ROM Resource configuration for FPU-based machine
|
||
dc.b ProductInfoVersion ; ProductInfo version
|
||
BitVector32 \ ; Flags for valid base addresses 0-31
|
||
ROMExists,\ ; ROMAddr is valid
|
||
VIA1Exists,\ ; VIA1Addr is valid
|
||
VIA2Exists,\ ; VIA2Addr is valid
|
||
SCCRdExists,\ ; SCCRdAddr is valid
|
||
SCCWrExists,\ ; SCCWrAddr is valid
|
||
ASCExists,\ ; ASCAddr is valid (means Batman in this case)
|
||
IWMExists,\ ; IWMAddr is valid
|
||
SCSI96_1Exists,\ ; 1st SCSI96 is valid
|
||
SONICExists,\ ; SONIC is valid
|
||
PatchROMExists,\ ; Patch ROM is valid
|
||
DAFBExists ; has DAFB video
|
||
BitVector32 ; Flags for valid base addresses 32-63
|
||
BitVector32 ; Flags for valid base addresses 64-95
|
||
dc.l \ ; Flags for valid ext feature flags 0-31
|
||
(ClockRTC)|\ ; Has RTC clock/PRAM
|
||
(SoundHasSoundIn)|\ ; Has 8-bit mono sound input <LW7>
|
||
(SoundStereoOut)|\ ; has stereo sound output
|
||
(SoundStereoMixing)|\ ; has stereo mixing
|
||
(SoundPlayAndRecord)|\ ; can Play and Record simultaneously <H42>
|
||
(1<<djMEMCChipBit)|\ ; Wombat-style memory controller
|
||
(1<<hasHardPowerOff)|\ ; hasHardPowerOff is valid <H63><SM29>
|
||
(ADBXcvr) ; Has transceiver ADB
|
||
dc.l \ ; Flags for valid ext feature flags 32-63
|
||
(1<<has68kEmulator//32) ; This ROM starts up with a 68k emulator
|
||
dc.l 0 ; Flags for valid ext feature flags 64-95
|
||
dc.b $56,$00,$00,$00 ; Check VIA1: PA6 PA4, PA2, PA1 <H43>
|
||
dc.b $44,$00,$00,$00 ; VIA1: PA6 = 1, PA4 = 0, PA2 = 1, PA1 = 0 <H43>
|
||
dc.l VIA1InitWombat-InfoRiscQuadra610 ; VIA1 init info
|
||
dc.l VIA2InitWombat-InfoRiscQuadra610 ; VIA2 init info
|
||
dc.l SndCntlQuadra800-InfoRiscQuadra610 ; sound control vector table <SM42>
|
||
dc.l RTCClockPRAM-InfoRiscQuadra610 ; clock/PRAM vector table
|
||
dc.l ViaADBTable-InfoRiscQuadra610 ; ADB/DebugUtil vector table
|
||
dc.l 0 ; no Power Manager primitives <SM33>
|
||
dc.l DJMEMCIntTbl-InfoRiscQuadra610 ; interrupt handlers table <SM38>
|
||
dc.l 0 ; internal modem manager
|
||
dc.w (cpuIDRISC)|\ ; HiEnd design center
|
||
$1202 ; specific ID
|
||
dc.w 0 ; spare <SM74>
|
||
dc.l IconInfoQFC-InfoRiscQuadra610 ; offset to ICON info <SM74>
|
||
|
||
; Quadra650 with a smurf card
|
||
|
||
ALIGN 4
|
||
InfoRiscQuadra650
|
||
dc.l djMEMCTable-InfoRiscQuadra650 ; offset to decoder info
|
||
dc.l RamInfoRISCDJMEMC-InfoRiscQuadra650 ; offset to ram bank info
|
||
dc.l VideoInfoDAFB-InfoRiscQuadra650 ; offset to video info
|
||
dc.l NuBusInfoWombat-InfoRiscQuadra650 ; offset to NuBus info
|
||
dc.w 0|\ ; hwCfgFlags
|
||
(1<<hwCbSCSI)|\ ; SCSI port present
|
||
(1<<hwCbClock)|\ ; New clock chip present
|
||
(1<<hwCbFPU)|\ ; FPU chip present.
|
||
(1<<hwCbMMU)|\ ; Some kind of MMU present (see MMUType for what kind).
|
||
(1<<hwCbADB) ; Apple Desktop Bus present.
|
||
dc.b boxRiscCentris650 ; product kind
|
||
dc.b djMEMCDecoder ; decoder kind
|
||
dc.w $3FFF ; ROM85, New ROMs, Power Off ability.
|
||
dc.b 2 ; default ROM Resource configuration for FPU-based machine
|
||
dc.b ProductInfoVersion ; ProductInfo version
|
||
BitVector32 \ ; Flags for valid base addresses 0-31
|
||
ROMExists,\ ; ROMAddr is valid
|
||
VIA1Exists,\ ; VIA1Addr is valid
|
||
VIA2Exists,\ ; VIA2Addr is valid
|
||
SCCRdExists,\ ; SCCRdAddr is valid
|
||
SCCWrExists,\ ; SCCWrAddr is valid
|
||
ASCExists,\ ; ASCAddr is valid (means Batman in this case)
|
||
IWMExists,\ ; IWMAddr is valid
|
||
SCSI96_1Exists,\ ; 1st SCSI96 is valid
|
||
SONICExists,\ ; SONIC is valid
|
||
PatchROMExists,\ ; Patch ROM is valid
|
||
DAFBExists ; has DAFB video
|
||
BitVector32 ; Flags for valid base addresses 32-63
|
||
BitVector32 ; Flags for valid base addresses 64-95
|
||
dc.l \ ; Flags for valid ext feature flags 0-31
|
||
(ClockRTC)|\ ; Has RTC clock/PRAM
|
||
(SoundHasSoundIn)|\ ; Has 8-bit mono sound input <LW7>
|
||
(SoundStereoOut)|\ ; has stereo sound output
|
||
(SoundStereoMixing)|\ ; has stereo mixing
|
||
(SoundPlayAndRecord)|\ ; can Play and Record simultaneously <H42>
|
||
(1<<djMEMCChipBit)|\ ; Wombat-style memory controller
|
||
(ADBXcvr) ; Has transceiver ADB
|
||
dc.l \ ; Flags for valid ext feature flags 32-63
|
||
(1<<has68kEmulator//32) ; This ROM starts up with a 68k emulator
|
||
dc.l 0 ; Flags for valid ext feature flags 64-95
|
||
dc.b $56,$00,$00,$00 ; Check VIA1: PA6 PA4, PA2, PA1 <H43>
|
||
dc.b $52,$00,$00,$00 ; VIA1: PA6 = 1, PA4 = 1, PA2 = 0, PA1 = 1 <H43>
|
||
dc.l VIA1InitWombat-InfoRiscQuadra650 ; VIA1 init info
|
||
dc.l VIA2InitWombat-InfoRiscQuadra650 ; VIA2 init info
|
||
dc.l SndCntlQuadra800-InfoRiscQuadra650 ; sound control vector table <SM42>
|
||
dc.l RTCClockPRAM-InfoRiscQuadra650 ; clock/PRAM vector table
|
||
dc.l ViaADBTable-InfoRiscQuadra650 ; ADB/DebugUtil vector table
|
||
dc.l 0 ; no Power Manager primitives <SM33>
|
||
dc.l DJMEMCIntTbl-InfoRiscQuadra650 ; interrupt handlers table <SM38>
|
||
dc.l 0 ; internal modem manager
|
||
dc.w (cpuIDRISC)|\ ; CPU ID: RISC design center
|
||
$1203 ; specific ID
|
||
dc.w 0 ; spare <SM74>
|
||
dc.l IconInfoLego-InfoRiscQuadra650 ; offset to ICON info <SM74>
|
||
|
||
|
||
; Quadra800 with a Risc card
|
||
|
||
ALIGN 4
|
||
InfoRiscQuadra800
|
||
dc.l djMEMCTable-InfoRiscQuadra800 ; offset to decoder info
|
||
dc.l RamInfoRISCDJMEMC-InfoRiscQuadra800 ; offset to ram bank info
|
||
dc.l VideoInfoDAFB-InfoRiscQuadra800 ; offset to video info
|
||
dc.l NuBusInfoWombat-InfoRiscQuadra800 ; offset to NuBus info
|
||
dc.w 0|\ ; hwCfgFlags
|
||
(1<<hwCbSCSI)|\ ; SCSI port present
|
||
(1<<hwCbClock)|\ ; New clock chip present
|
||
(1<<hwCbFPU)|\ ; FPU chip optional.
|
||
(1<<hwCbMMU)|\ ; Some kind of MMU present (see MMUType for what kind).
|
||
(1<<hwCbADB) ; Apple Desktop Bus present.
|
||
dc.b boxRiscCentris650 ; product kind
|
||
dc.b djMEMCDecoder ; decoder kind
|
||
dc.w $3FFF ; ROM85, New ROMs, Power Off ability.
|
||
dc.b 2 ; default ROM Resource configuration for FPU-based machine
|
||
dc.b ProductInfoVersion ; ProductInfo version <SM29>
|
||
BitVector32 \ ; Flags for valid base addresses 0-31 <SM29>
|
||
ROMExists,\ ; ROMAddr is valid <SM29>
|
||
VIA1Exists,\ ; VIA1Addr is valid <SM29>
|
||
VIA2Exists,\ ; VIA2Addr is valid <SM29>
|
||
SCCRdExists,\ ; SCCRdAddr is valid <SM29>
|
||
SCCWrExists,\ ; SCCWrAddr is valid <SM29>
|
||
ASCExists,\ ; ASCAddr is valid (means Batman in this case) <SM29>
|
||
IWMExists,\ ; IWMAddr is valid <SM29>
|
||
SCSI96_1Exists,\ ; 1st SCSI96 is valid <SM29>
|
||
SONICExists,\ ; SONIC is valid <SM29>
|
||
PatchROMExists,\ ; Patch ROM is valid <SM29>
|
||
DAFBExists ; has DAFB video <SM29>
|
||
BitVector32 ; Flags for valid base addresses 32-63 <SM29>
|
||
BitVector32 ; Flags for valid base addresses 64-95 <SM29>
|
||
dc.l (ClockRTC)|\ ; Has RTC clock/PRAM
|
||
(SoundHasSoundIn)|\ ; Has 8-bit mono sound input <LW7>
|
||
(SoundStereoOut)|\ ; has stereo sound output
|
||
(SoundStereoMixing)|\ ; has stereo mixing
|
||
(SoundPlayAndRecord)|\ ; can Play and Record simultaneously <H42>
|
||
(1<<djMEMCChipBit)|\ ; Wombat-style memory controller
|
||
(ADBXcvr) ; Has transceiver ADB
|
||
dc.l \ ; Flags for valid ext feature flags 32-63
|
||
(1<<has68kEmulator//32) ; This ROM starts up with a 68k emulator
|
||
dc.l 0 ; Flags for valid ext feature flags 64-95 <SM29>
|
||
dc.b $56,$00,$00,$00 ; Check VIA1: PA6 PA4, PA2, PA1 <H43>
|
||
dc.b $12,$00,$00,$00 ; VIA1: PA6 = 0, PA4 = 1, PA2 = 0, PA1 = 1 <H43><H46>
|
||
dc.l VIA1InitWombat-InfoRiscQuadra800 ; VIA1 init info
|
||
dc.l VIA2InitWombat-InfoRiscQuadra800 ; VIA2 init info
|
||
dc.l SndCntlQuadra800-InfoRiscQuadra800 ; sound control vector table <SM42>
|
||
dc.l RTCClockPRAM-InfoRiscQuadra800 ; clock/PRAM vector table
|
||
dc.l ViaADBTable-InfoRiscQuadra800 ; ADB/DebugUtil vector table
|
||
dc.l 0 ; no Power Manager primitives <SM33>
|
||
dc.l DJMEMCIntTbl-InfoRiscQuadra800 ; interrupt handlers table <SM38>
|
||
dc.l 0 ; internal modem manager
|
||
dc.w (cpuIDRISC)|\ ; HiEnd design center
|
||
$1201 ; specific ID
|
||
dc.w 0 ; spare <SM74>
|
||
dc.l IconInfoFrigidaire-InfoRiscQuadra800; offset to ICON info <SM74>
|
||
|
||
ENDIF ; {for smurf}
|
||
|
||
|
||
ENDIF ; {hasDJMEMC}
|
||
|
||
|
||
IF forSTP601 THEN
|
||
|
||
; 25MHz STP Wombat product table (Lego plastics)
|
||
|
||
ALIGN 4
|
||
InfoSTPCentris650
|
||
dc.l djMEMCTable-InfoSTPCentris650 ; offset to decoder info
|
||
dc.l RamInfoDJMEMC-InfoSTPCentris650 ; offset to ram bank info
|
||
dc.l VideoInfoDAFB-InfoSTPCentris650 ; offset to video info
|
||
dc.l NuBusInfoWombat-InfoSTPCentris650 ; offset to NuBus info
|
||
dc.w 0|\ ; hwCfgFlags
|
||
(1<<hwCbSCSI)|\ ; SCSI port present
|
||
(1<<hwCbClock)|\ ; New clock chip present
|
||
(0<<hwCbFPU)|\ ; FPU chip present.
|
||
(1<<hwCbMMU)|\ ; Some kind of MMU present (see MMUType for what kind).
|
||
(1<<hwCbADB) ; Apple Desktop Bus present.
|
||
dc.b boxSTPC650 ; product kind
|
||
dc.b djMEMCDecoder ; decoder kind
|
||
dc.w $3FFF ; ROM85, New ROMs, Power Off ability.
|
||
dc.b 4 ; default ROM Resource configuration for FPU-based machine <H53><SM29>
|
||
dc.b ProductInfoVersion ; ProductInfo version
|
||
BitVector32 \ ; Flags for valid base addresses 0-31
|
||
ROMExists,\ ; ROMAddr is valid
|
||
DiagROMExists,\ ; DiagROMAddr is valid
|
||
VIA1Exists,\ ; VIA1Addr is valid
|
||
VIA2Exists,\ ; VIA2Addr is valid
|
||
SCCRdExists,\ ; SCCRdAddr is valid
|
||
SCCWrExists,\ ; SCCWrAddr is valid
|
||
ASCExists,\ ; ASCAddr is valid (means Batman in this case)
|
||
IWMExists,\ ; IWMAddr is valid
|
||
SCSI96_1Exists,\ ; 1st SCSI96 is valid
|
||
SONICExists,\ ; SONIC is valid
|
||
PatchROMExists,\ ; Patch ROM is valid
|
||
DAFBExists ; has DAFB video
|
||
BitVector32 ; Flags for valid base addresses 32-63
|
||
BitVector32 ; Flags for valid base addresses 64-95
|
||
dc.l \ ; Flags for valid ext feature flags 0-31
|
||
(ClockRTC)|\ ; Has RTC clock/PRAM
|
||
(SoundHasSoundIn)|\ ; Has 8-bit mono sound input <LW7>
|
||
(SoundStereoOut)|\ ; has stereo sound output
|
||
(SoundStereoMixing)|\ ; has stereo mixing
|
||
(SoundPlayAndRecord)|\ ; can Play and Record simultaneously <H42>
|
||
(1<<hasNewMemMgr)|\ ; hasNewMemMgr support (ie Figment can be switched on)
|
||
(1<<djMEMCChipBit)|\ ; Wombat-style memory controller
|
||
(ADBXcvr) ; Has transceiver ADB
|
||
dc.l \ ; Flags for valid ext feature flags 32-63
|
||
(1<<has68kEmulator//32) ; This ROM starts up with a 68k emulator
|
||
dc.l 0 ; Flags for valid ext feature flags 64-95
|
||
dc.b $56,$00,$00,$00 ; Check VIA1: PA6 PA4, PA2, PA1 <H43>
|
||
dc.b $46,$00,$00,$00 ; VIA1: PA6 = 1, PA4 = 0, PA2 = 1, PA1 = 1 <H43>
|
||
dc.l VIA1InitWombat-InfoSTPCentris650 ; VIA1 init info
|
||
dc.l VIA2InitWombat-InfoSTPCentris650 ; VIA2 init info
|
||
dc.l SndCntlQuadra800-InfoSTPCentris650 ; sound control vector table <SM42>
|
||
dc.l RTCClockPRAM-InfoSTPCentris650 ; clock/PRAM vector table
|
||
dc.l ViaADBTable-InfoSTPCentris650 ; ADB/DebugUtil vector table
|
||
dc.l 0 ; no Power Manager primitives <SM33>
|
||
dc.l DJMEMCIntTbl-InfoSTPCentris650 ; interrupt handlers table <SM38>
|
||
dc.l 0 ; internal modem manager
|
||
dc.w ((cpuIDRISC))|\ ; RISC design center
|
||
(cpuIDinVIA)|\ ; supplemental ID in VIA1
|
||
$3AD ; specific ID
|
||
dc.w 0 ; spare <SM74>
|
||
dc.l IconInfoLego-InfoSTPCentris650 ; offset to ICON info <SM74>
|
||
|
||
|
||
; 33MHz STP Wombat product table (Lego plastics)
|
||
|
||
ALIGN 4
|
||
InfoSTPQuadra650
|
||
dc.l djMEMCTable-InfoSTPQuadra650 ; offset to decoder info
|
||
dc.l RamInfoDJMEMC-InfoSTPQuadra650 ; offset to ram bank info
|
||
dc.l VideoInfoDAFB-InfoSTPQuadra650 ; offset to video info
|
||
dc.l NuBusInfoWombat-InfoSTPQuadra650 ; offset to NuBus info
|
||
dc.w 0|\ ; hwCfgFlags
|
||
(1<<hwCbSCSI)|\ ; SCSI port present
|
||
(1<<hwCbClock)|\ ; New clock chip present
|
||
(0<<hwCbFPU)|\ ; FPU chip present.
|
||
(1<<hwCbMMU)|\ ; Some kind of MMU present (see MMUType for what kind).
|
||
(1<<hwCbADB) ; Apple Desktop Bus present.
|
||
dc.b boxSTPQ650 ; product kind
|
||
dc.b djMEMCDecoder ; decoder kind
|
||
dc.w $3FFF ; ROM85, New ROMs, Power Off ability.
|
||
dc.b 4 ; default ROM Resource configuration for FPU-based machine <T15><T19>
|
||
dc.b ProductInfoVersion ; ProductInfo version
|
||
BitVector32 \ ; Flags for valid base addresses 0-31
|
||
ROMExists,\ ; ROMAddr is valid
|
||
DiagROMExists,\ ; DiagROMAddr is valid
|
||
VIA1Exists,\ ; VIA1Addr is valid
|
||
VIA2Exists,\ ; VIA2Addr is valid
|
||
SCCRdExists,\ ; SCCRdAddr is valid
|
||
SCCWrExists,\ ; SCCWrAddr is valid
|
||
ASCExists,\ ; ASCAddr is valid (means Batman in this case)
|
||
IWMExists,\ ; IWMAddr is valid
|
||
SCSI96_1Exists,\ ; 1st SCSI96 is valid
|
||
SONICExists,\ ; SONIC is valid
|
||
PatchROMExists,\ ; Patch ROM is valid
|
||
DAFBExists ; has DAFB video
|
||
BitVector32 ; Flags for valid base addresses 32-63
|
||
BitVector32 ; Flags for valid base addresses 64-95
|
||
dc.l \ ; Flags for valid ext feature flags 0-31
|
||
(ClockRTC)|\ ; Has RTC clock/PRAM
|
||
(SoundHasSoundIn)|\ ; Has 8-bit mono sound input <LW7>
|
||
(SoundStereoOut)|\ ; has stereo sound output
|
||
(SoundStereoMixing)|\ ; has stereo mixing
|
||
(SoundPlayAndRecord)|\ ; can Play and Record simultaneously <H42>
|
||
(1<<djMEMCChipBit)|\ ; Wombat-style memory controller
|
||
(1<<hasNewMemMgr)|\ ; hasNewMemMgr support (ie Figment can be switched on)
|
||
(ADBXcvr) ; Has transceiver ADB
|
||
dc.l \ ; Flags for valid ext feature flags 32-63
|
||
(1<<has68kEmulator//32) ; This ROM starts up with a 68k emulator
|
||
dc.l 0 ; Flags for valid ext feature flags 64-95
|
||
dc.b $56,$00,$00,$00 ; Check VIA1: PA6 PA4, PA2, PA1 <H43>
|
||
dc.b $52,$00,$00,$00 ; VIA1: PA6 = 1, PA4 = 1, PA2 = 0, PA1 = 1 <H43>
|
||
dc.l VIA1InitWombat-InfoSTPQuadra650 ; VIA1 init info
|
||
dc.l VIA2InitWombat-InfoSTPQuadra650 ; VIA2 init info
|
||
dc.l SndCntlQuadra800-InfoSTPQuadra650 ; sound control vector table <SM42>
|
||
dc.l RTCClockPRAM-InfoSTPQuadra650 ; clock/PRAM vector table
|
||
dc.l ViaADBTable-InfoSTPQuadra650 ; ADB/DebugUtil vector table
|
||
dc.l 0 ; no Power Manager primitives <SM33>
|
||
dc.l DJMEMCIntTbl-InfoSTPQuadra650 ; interrupt handlers table <SM38>
|
||
dc.l 0 ; internal modem manager
|
||
dc.w (cpuIDRISC)|\ ; risc design center
|
||
(cpuIDinVIA)|\ ; supplemental ID in VIA1
|
||
$3AD ; specific ID
|
||
dc.w 0 ; spare <SM74>
|
||
dc.l IconInfoLego-InfoSTPQuadra650 ; offset to ICON info <SM74>
|
||
|
||
|
||
; 33MHz STP Wombat product table (Frigidaire plastics)
|
||
|
||
ALIGN 4
|
||
InfoSTPQuadra800
|
||
dc.l djMEMCTable-InfoSTPQuadra800 ; offset to decoder info
|
||
dc.l RamInfoDJMEMC-InfoSTPQuadra800 ; offset to ram bank info
|
||
dc.l VideoInfoDAFB-InfoSTPQuadra800 ; offset to video info
|
||
dc.l NuBusInfoWombat-InfoSTPQuadra800 ; offset to NuBus info
|
||
dc.w 0|\ ; hwCfgFlags
|
||
(1<<hwCbSCSI)|\ ; SCSI port present
|
||
(1<<hwCbClock)|\ ; New clock chip present
|
||
(0<<hwCbFPU)|\ ; FPU chip present.
|
||
(1<<hwCbMMU)|\ ; Some kind of MMU present (see MMUType for what kind).
|
||
(1<<hwCbADB) ; Apple Desktop Bus present.
|
||
dc.b boxSTPQ800 ; product kind
|
||
dc.b djMEMCDecoder ; decoder kind
|
||
dc.w $3FFF ; ROM85, New ROMs, Power Off ability.
|
||
dc.b 4 ; default ROM Resource configuration for FPU-based machine <T15><T19>
|
||
dc.b ProductInfoVersion ; ProductInfo version <SM29>
|
||
BitVector32 \ ; Flags for valid base addresses 0-31 <SM29>
|
||
ROMExists,\ ; ROMAddr is valid <SM29>
|
||
DiagROMExists,\ ; DiagROMAddr is valid <SM29>
|
||
VIA1Exists,\ ; VIA1Addr is valid <SM29>
|
||
VIA2Exists,\ ; VIA2Addr is valid <SM29>
|
||
SCCRdExists,\ ; SCCRdAddr is valid <SM29>
|
||
SCCWrExists,\ ; SCCWrAddr is valid <SM29>
|
||
ASCExists,\ ; ASCAddr is valid (means Batman in this case) <SM29>
|
||
IWMExists,\ ; IWMAddr is valid <SM29>
|
||
SCSI96_1Exists,\ ; 1st SCSI96 is valid <SM29>
|
||
SONICExists,\ ; SONIC is valid <SM29>
|
||
PatchROMExists,\ ; Patch ROM is valid <SM29>
|
||
DAFBExists ; has DAFB video <SM29>
|
||
BitVector32 ; Flags for valid base addresses 32-63 <SM29>
|
||
BitVector32 ; Flags for valid base addresses 64-95 <SM29>
|
||
dc.l (ClockRTC)|\ ; Has RTC clock/PRAM
|
||
(SoundHasSoundIn)|\ ; Has 8-bit mono sound input <LW7>
|
||
(SoundStereoOut)|\ ; has stereo sound output
|
||
(SoundStereoMixing)|\ ; has stereo mixing
|
||
(SoundPlayAndRecord)|\ ; can Play and Record simultaneously <H42>
|
||
(1<<djMEMCChipBit)|\ ; Wombat-style memory controller
|
||
(1<<hasNewMemMgr)|\ ; hasNewMemMgr support (ie Figment can be switched on)
|
||
(ADBXcvr) ; Has transceiver ADB
|
||
dc.l \ ; Flags for valid ext feature flags 32-63
|
||
(1<<has68kEmulator//32) ; This ROM starts up with a 68k emulator
|
||
dc.l 0 ; Flags for valid ext feature flags 64-95 <SM29>
|
||
dc.b $56,$00,$00,$00 ; Check VIA1: PA6 PA4, PA2, PA1 <H43>
|
||
dc.b $12,$00,$00,$00 ; VIA1: PA6 = 0, PA4 = 1, PA2 = 0, PA1 = 1 <H43><H46>
|
||
dc.l VIA1InitWombat-InfoSTPQuadra800 ; VIA1 init info
|
||
dc.l VIA2InitWombat-InfoSTPQuadra800 ; VIA2 init info
|
||
dc.l SndCntlQuadra800-InfoSTPQuadra800 ; sound control vector table <SM42>
|
||
dc.l RTCClockPRAM-InfoSTPQuadra800 ; clock/PRAM vector table
|
||
dc.l ViaADBTable-InfoSTPQuadra800 ; ADB/DebugUtil vector table
|
||
dc.l 0 ; no Power Manager primitives <SM33>
|
||
dc.l DJMEMCIntTbl-InfoSTPQuadra800 ; interrupt handlers table <SM38>
|
||
dc.l 0 ; internal modem manager
|
||
dc.w (cpuIDRISC)|\ ; risc design center
|
||
(cpuIDinVIA)|\ ; supplemental ID in VIA1
|
||
$3AD ; specific ID
|
||
dc.w 0 ; spare <SM74>
|
||
dc.l IconInfoFrigidaire-InfoSTPQuadra800 ; offset to ICON info <SM74>
|
||
|
||
|
||
; 40MHz STP Wombat product table (Frigidaire plastics)
|
||
|
||
ALIGN 4
|
||
InfoSTPQuadra40F
|
||
dc.l djMEMCTable-InfoSTPQuadra40F ; offset to decoder info
|
||
dc.l RamInfoDJMEMC-InfoSTPQuadra40F ; offset to ram bank info
|
||
dc.l VideoInfoDAFB-InfoSTPQuadra40F ; offset to video info
|
||
dc.l NuBusInfoWombat-InfoSTPQuadra40F ; offset to NuBus info
|
||
dc.w 0|\ ; hwCfgFlags
|
||
(1<<hwCbSCSI)|\ ; SCSI port present
|
||
(1<<hwCbClock)|\ ; New clock chip present
|
||
(0<<hwCbFPU)|\ ; FPU chip present.
|
||
(1<<hwCbMMU)|\ ; Some kind of MMU present (see MMUType for what kind).
|
||
(1<<hwCbADB) ; Apple Desktop Bus present.
|
||
dc.b boxSTPQ800 ; product kind
|
||
dc.b djMEMCDecoder ; decoder kind
|
||
dc.w $3FFF ; ROM85, New ROMs, Power Off ability.
|
||
dc.b 4 ; default ROM Resource configuration for FPU-based machine <T15><T19>
|
||
dc.b ProductInfoVersion ; ProductInfo version <SM29>
|
||
BitVector32 \ ; Flags for valid base addresses 0-31 <SM29>
|
||
ROMExists,\ ; ROMAddr is valid <SM29>
|
||
DiagROMExists,\ ; DiagROMAddr is valid <SM29>
|
||
VIA1Exists,\ ; VIA1Addr is valid <SM29>
|
||
VIA2Exists,\ ; VIA2Addr is valid <SM29>
|
||
SCCRdExists,\ ; SCCRdAddr is valid <SM29>
|
||
SCCWrExists,\ ; SCCWrAddr is valid <SM29>
|
||
ASCExists,\ ; ASCAddr is valid (means Batman in this case) <SM29>
|
||
IWMExists,\ ; IWMAddr is valid <SM29>
|
||
SCSI96_1Exists,\ ; 1st SCSI96 is valid <SM29>
|
||
SONICExists,\ ; SONIC is valid <SM29>
|
||
PatchROMExists,\ ; Patch ROM is valid <SM29>
|
||
DAFBExists ; has DAFB video <SM29>
|
||
BitVector32 ; Flags for valid base addresses 32-63 <SM29>
|
||
BitVector32 ; Flags for valid base addresses 64-95 <SM29>
|
||
dc.l (ClockRTC)|\ ; Has RTC clock/PRAM
|
||
(SoundHasSoundIn)|\ ; Has 8-bit mono sound input <LW7>
|
||
(SoundStereoOut)|\ ; has stereo sound output
|
||
(SoundStereoMixing)|\ ; has stereo mixing
|
||
(SoundPlayAndRecord)|\ ; can Play and Record simultaneously
|
||
(1<<djMEMCChipBit)|\ ; Wombat-style memory controller
|
||
(1<<hasNewMemMgr)|\ ; hasNewMemMgr support (ie Figment can be switched on)
|
||
(ADBXcvr) ; Has transceiver ADB
|
||
dc.l \ ; Flags for valid ext feature flags 32-63
|
||
(1<<has68kEmulator//32) ; This ROM starts up with a 68k emulator
|
||
dc.l 0 ; Flags for valid ext feature flags 64-95 <SM29>
|
||
dc.b $56,$00,$00,$00 ; Check VIA1: PA6 PA4, PA2, PA1
|
||
dc.b $16,$00,$00,$00 ; VIA1: PA6 = 0, PA4 = 1, PA2 = 1, PA1 = 1
|
||
dc.l VIA1InitWombat-InfoSTPQuadra40F ; VIA1 init info
|
||
dc.l VIA2InitWombat-InfoSTPQuadra40F ; VIA2 init info
|
||
dc.l SndCntlQuadra800-InfoSTPQuadra40F ; sound control vector table <SM42>
|
||
dc.l RTCClockPRAM-InfoSTPQuadra40F ; clock/PRAM vector table
|
||
dc.l ViaADBTable-InfoSTPQuadra40F ; ADB/DebugUtil vector table
|
||
dc.l 0 ; no Power Manager primitives <SM33>
|
||
dc.l DJMEMCIntTbl-InfoSTPQuadra40F ; interrupt handlers table <SM38>
|
||
dc.l 0 ; internal modem manager
|
||
dc.w (cpuIDRISC)|\ ; HiEnd design center
|
||
(cpuIDinVIA)|\ ; supplemental ID in VIA1
|
||
$3AD ; specific ID
|
||
dc.w 0 ; spare <SM74>
|
||
dc.l IconInfoFrigidaire-InfoSTPQuadra40F ; offset to ICON info <SM74>
|
||
|
||
|
||
; 20MHz STP WLCD product table (QFC plastics)
|
||
|
||
ALIGN 4
|
||
InfoSTPCentris610
|
||
dc.l djMEMCTable-InfoSTPCentris610 ; offset to decoder info
|
||
dc.l RamInfoDJMEMC-InfoSTPCentris610 ; offset to ram bank info
|
||
dc.l VideoInfoDAFB-InfoSTPCentris610 ; offset to video info
|
||
dc.l NuBusInfoWLCD-InfoSTPCentris610 ; offset to NuBus info <H50><SM29>
|
||
dc.w 0|\ ; hwCfgFlags
|
||
(1<<hwCbSCSI)|\ ; SCSI port present
|
||
(1<<hwCbClock)|\ ; New clock chip present
|
||
(0<<hwCbFPU)|\ ; FPU chip present.
|
||
(1<<hwCbMMU)|\ ; Some kind of MMU present (see MMUType for what kind).
|
||
(1<<hwCbADB) ; Apple Desktop Bus present.
|
||
dc.b boxSTPC610 ; product kind
|
||
dc.b djMEMCDecoder ; decoder kind
|
||
dc.w $3FFF ; ROM85, New ROMs, Power Off ability.
|
||
dc.b 4 ; default ROM Resource configuration for FPU-based machine <T15><T19>
|
||
dc.b ProductInfoVersion ; ProductInfo version
|
||
BitVector32 \ ; Flags for valid base addresses 0-31
|
||
ROMExists,\ ; ROMAddr is valid
|
||
DiagROMExists,\ ; DiagROMAddr is valid
|
||
VIA1Exists,\ ; VIA1Addr is valid
|
||
VIA2Exists,\ ; VIA2Addr is valid
|
||
SCCRdExists,\ ; SCCRdAddr is valid
|
||
SCCWrExists,\ ; SCCWrAddr is valid
|
||
ASCExists,\ ; ASCAddr is valid (means Batman in this case)
|
||
IWMExists,\ ; IWMAddr is valid
|
||
SCSI96_1Exists,\ ; 1st SCSI96 is valid
|
||
SONICExists,\ ; SONIC is valid
|
||
PatchROMExists,\ ; Patch ROM is valid
|
||
DAFBExists ; has DAFB video
|
||
BitVector32 ; Flags for valid base addresses 32-63
|
||
BitVector32 ; Flags for valid base addresses 64-95
|
||
dc.l \ ; Flags for valid ext feature flags 0-31
|
||
(ClockRTC)|\ ; Has RTC clock/PRAM
|
||
(SoundHasSoundIn)|\ ; Has 8-bit mono sound input <LW7>
|
||
(SoundStereoOut)|\ ; has stereo sound output
|
||
(SoundStereoMixing)|\ ; has stereo mixing
|
||
(SoundPlayAndRecord)|\ ; can Play and Record simultaneously <H42>
|
||
(1<<djMEMCChipBit)|\ ; Wombat-style memory controller
|
||
(1<<hasHardPowerOff)|\ ; hasHardPowerOff is valid <H63><SM29>
|
||
(1<<hasNewMemMgr)|\ ; hasNewMemMgr support (ie Figment can be switched on)
|
||
(ADBXcvr) ; Has transceiver ADB
|
||
dc.l \ ; Flags for valid ext feature flags 32-63
|
||
(1<<has68kEmulator//32) ; This ROM starts up with a 68k emulator
|
||
dc.l 0 ; Flags for valid ext feature flags 64-95
|
||
dc.b $56,$00,$00,$00 ; Check VIA1: PA6 PA4, PA2, PA1 <H43>
|
||
dc.b $40,$00,$00,$00 ; VIA1: PA6 = 1, PA4 = 0, PA2 = 0, PA1 = 0 <H43>
|
||
dc.l VIA1InitWombat-InfoSTPCentris610 ; VIA1 init info
|
||
dc.l VIA2InitWombat-InfoSTPCentris610 ; VIA2 init info
|
||
dc.l SndCntlQuadra800-InfoSTPCentris610 ; sound control vector table <SM42>
|
||
dc.l RTCClockPRAM-InfoSTPCentris610 ; clock/PRAM vector table
|
||
dc.l ViaADBTable-InfoSTPCentris610 ; ADB/DebugUtil vector table
|
||
dc.l 0 ; no Power Manager primitives <SM33>
|
||
dc.l DJMEMCIntTbl-InfoSTPCentris610 ; interrupt handlers table <SM38>
|
||
dc.l 0 ; internal modem manager
|
||
dc.w (cpuIDRISC)|\ ; risc design center
|
||
(cpuIDinVIA)|\ ; supplemental ID in VIA1
|
||
$3AD ; specific ID
|
||
dc.w 0 ; spare <SM74>
|
||
dc.l IconInfoQFC-InfoSTPCentris610 ; offset to ICON info <SM74>
|
||
|
||
|
||
; 25MHz STP WLCD product table (QFC plastics)
|
||
|
||
ALIGN 4
|
||
InfoSTPQuadra610
|
||
dc.l djMEMCTable-InfoSTPQuadra610 ; offset to decoder info
|
||
dc.l RamInfoDJMEMC-InfoSTPQuadra610 ; offset to ram bank info
|
||
dc.l VideoInfoDAFB-InfoSTPQuadra610 ; offset to video info
|
||
dc.l NuBusInfoWLCD-InfoSTPQuadra610 ; offset to NuBus info <H50><SM29>
|
||
dc.w 0|\ ; hwCfgFlags
|
||
(1<<hwCbSCSI)|\ ; SCSI port present
|
||
(1<<hwCbClock)|\ ; New clock chip present
|
||
(0<<hwCbFPU)|\ ; FPU chip present.
|
||
(1<<hwCbMMU)|\ ; Some kind of MMU present (see MMUType for what kind).
|
||
(1<<hwCbADB) ; Apple Desktop Bus present.
|
||
dc.b boxSTPQ610 ; product kind
|
||
dc.b djMEMCDecoder ; decoder kind
|
||
dc.w $3FFF ; ROM85, New ROMs, Power Off ability.
|
||
dc.b 4 ; default ROM Resource configuration for FPU-based machine <T15><T19>
|
||
dc.b ProductInfoVersion ; ProductInfo version
|
||
BitVector32 \ ; Flags for valid base addresses 0-31
|
||
ROMExists,\ ; ROMAddr is valid
|
||
DiagROMExists,\ ; DiagROMAddr is valid
|
||
VIA1Exists,\ ; VIA1Addr is valid
|
||
VIA2Exists,\ ; VIA2Addr is valid
|
||
SCCRdExists,\ ; SCCRdAddr is valid
|
||
SCCWrExists,\ ; SCCWrAddr is valid
|
||
ASCExists,\ ; ASCAddr is valid (means Batman in this case)
|
||
IWMExists,\ ; IWMAddr is valid
|
||
SCSI96_1Exists,\ ; 1st SCSI96 is valid
|
||
SONICExists,\ ; SONIC is valid
|
||
PatchROMExists,\ ; Patch ROM is valid
|
||
DAFBExists ; has DAFB video
|
||
BitVector32 ; Flags for valid base addresses 32-63
|
||
BitVector32 ; Flags for valid base addresses 64-95
|
||
dc.l \ ; Flags for valid ext feature flags 0-31
|
||
(ClockRTC)|\ ; Has RTC clock/PRAM
|
||
(SoundHasSoundIn)|\ ; Has 8-bit mono sound input <LW7>
|
||
(SoundStereoOut)|\ ; has stereo sound output
|
||
(SoundStereoMixing)|\ ; has stereo mixing
|
||
(SoundPlayAndRecord)|\ ; can Play and Record simultaneously <H42>
|
||
(1<<djMEMCChipBit)|\ ; Wombat-style memory controller
|
||
(1<<hasHardPowerOff)|\ ; hasHardPowerOff is valid <H63><SM29>
|
||
(1<<hasNewMemMgr)|\ ; hasNewMemMgr support (ie Figment can be switched on)
|
||
(ADBXcvr) ; Has transceiver ADB
|
||
dc.l \ ; Flags for valid ext feature flags 32-63
|
||
(1<<has68kEmulator//32) ; This ROM starts up with a 68k emulator
|
||
dc.l 0 ; Flags for valid ext feature flags 64-95
|
||
dc.b $56,$00,$00,$00 ; Check VIA1: PA6 PA4, PA2, PA1 <H43>
|
||
dc.b $44,$00,$00,$00 ; VIA1: PA6 = 1, PA4 = 0, PA2 = 1, PA1 = 0 <H43>
|
||
dc.l VIA1InitWombat-InfoSTPQuadra610 ; VIA1 init info
|
||
dc.l VIA2InitWombat-InfoSTPQuadra610 ; VIA2 init info
|
||
dc.l SndCntlQuadra800-InfoSTPQuadra610 ; sound control vector table <SM42>
|
||
dc.l RTCClockPRAM-InfoSTPQuadra610 ; clock/PRAM vector table
|
||
dc.l ViaADBTable-InfoSTPQuadra610 ; ADB/DebugUtil vector table
|
||
dc.l 0 ; no Power Manager primitives <SM33>
|
||
dc.l DJMEMCIntTbl-InfoSTPQuadra610 ; interrupt handlers table <SM38>
|
||
dc.l 0 ; internal modem manager
|
||
dc.w (cpuIDRISC)|\ ; risc design center
|
||
(cpuIDinVIA)|\ ; supplemental ID in VIA1
|
||
$3AD ; specific ID
|
||
dc.w 0 ; spare <SM74>
|
||
dc.l IconInfoQFC-InfoSTPQuadra610 ; offset to ICON info <SM74>
|
||
|
||
|
||
ENDIF ; {forSTP601}
|
||
|
||
|
||
IF hasYMCA AND hasPSC THEN ; used to be MMC <SM46>
|
||
|
||
IMPORT SndCntlCyclone, PSCIntTbl
|
||
|
||
; 33 MHz Cyclone product table
|
||
|
||
ALIGN 4
|
||
InfoCyclone33
|
||
dc.l CycloneDecoderTable-InfoCyclone33 ; offset to decoder info for EVT4 <SM19>
|
||
dc.l RamInfoCyclone-InfoCyclone33 ; offset to ram bank info <SM19>
|
||
dc.l VideoInfoCyclone-InfoCyclone33 ; offset to video info
|
||
dc.l NuBusInfoCyclone-InfoCyclone33 ; offset to NuBus info
|
||
dc.w 0|\ ; hwCfgFlags
|
||
(1<<hwCbSCSI)|\ ; SCSI port present
|
||
(1<<hwCbClock)|\ ; New clock chip present
|
||
(1<<hwCbFPU)|\ ; FPU chip present.
|
||
(1<<hwCbMMU)|\ ; Some kind of MMU present (see MMUType for what kind).
|
||
(1<<hwCbADB) ; Apple Desktop Bus present.
|
||
dc.b BoxCyclone33 ; product kind
|
||
dc.b YMCADecoder ; decoder kind
|
||
dc.w $3FFF ; ROM85, New ROMs, Power Off ability
|
||
dc.b 4 ; default ROM Resource configuration
|
||
dc.b ProductInfoVersion ; ProductInfo version
|
||
BitVector32 \ ; Flags for valid base addresses 0-31
|
||
ROMExists,\ ; ROMAddr is valid
|
||
DiagROMExists,\ ; DiagROMAddr is valid
|
||
VIA1Exists,\ ; VIA1Addr is valid
|
||
VIA2Exists,\ ; VIA2Addr is valid
|
||
SCCRdExists,\ ; SCCRdAddr is valid
|
||
SCCWrExists,\ ; SCCWrAddr is valid
|
||
NewAgeExists,\ ; NewAge is valid
|
||
SCSI96_1Exists,\ ; SCSI 96 is valid
|
||
PSCExists ; PSC DMA is valid
|
||
BitVector32 \ ; Flags for valid base addresses 32-63
|
||
DSPExists,\ ; DSP is valid
|
||
MaceExists, \ ; MACE is valid
|
||
MUNIExists, \ ; MUNI is valid <SM34>
|
||
CivicExists,\ ; Civic video is valid
|
||
SebastianExists ; Sebastian CLUT DAC is valid
|
||
BitVector32 ; Flags for valid base addresses 64-95
|
||
dc.l \ ; Flags for valid ext feature flags 0-31
|
||
(ClockEgret)|\ ; Has Egret clock/pram
|
||
(ADBEgret)|\ ; Egret ADB
|
||
(Cuda)|\ ; Cuda firmware
|
||
(SoundHasSoundIn)|\ ; Has Sound In <LW7>
|
||
(Sound16Bit)|\ ; Has 16-bit hardware <LW7>
|
||
(SoundStereoIn)|\ ; has stereo sound input <LW7>
|
||
(SoundStereoOut)|\ ; has stereo sound output
|
||
(SoundStereoMixing)|\ ; has stereo mixing
|
||
(SoundPlayAndRecord)|\ ; can Play and Record simultaneously <LW7>
|
||
(1 << SoundLineLevel) ; requires line level on sound input port <LW7>
|
||
dc.l \ ; Flags for valid ext feature flags 32-63
|
||
(1<<SerialDMA//32)|\ ; hardware requires SerialDMA driver
|
||
(SHALPSC)|\ ; using PSC HAL
|
||
(1<<hasEnhancedLTalk//32) ; has CURIO LocalTalk enhancements
|
||
dc.l 0 ; Flags for valid ext feature flags 64-95
|
||
dc.b $00,$00,$00,$00 ; don't check any VIA bits
|
||
dc.b $07 ; CPU ID. <SM19>
|
||
dc.b $00,$00,$00 ; Filler.
|
||
dc.l VIA1InitCyclone-InfoCyclone33 ; VIA1 init info
|
||
dc.l VIA2InitCyclone-InfoCyclone33 ; VIA2 init info
|
||
dc.l SndCntlCyclone-InfoCyclone33 ; sound control vector table
|
||
dc.l CudaClockPRAM-InfoCyclone33 ; clock/PRAM vector table
|
||
dc.l CudaADBTable-InfoCyclone33 ; ADB/DebugUtil vector table <SM35>
|
||
dc.l 0 ; no Power Manager primitives <SM33>
|
||
dc.l PSCIntTbl-InfoCyclone33 ; interrupt handlers table <SM38>
|
||
dc.l 0 ; internal modem manager
|
||
dc.w cpuIDHiEnd|\ ; CPU ID: hi end design center
|
||
cpuIDinMMC|\ ; CPU ID: Extended ID in MMC.
|
||
$30 ; CPU ID: Cyclone Family is ID $30
|
||
dc.w 0 ; spare <SM74>
|
||
dc.l FrigidaireIcon-InfoCyclone33 ; offset to ICON info •• fake for now •• <SM74>
|
||
|
||
|
||
; 40 MHz Cyclone product table
|
||
|
||
ALIGN 4
|
||
InfoQuadra840AV
|
||
dc.l CycloneDecoderTable-InfoQuadra840AV ; offset to decoder info for EVT4
|
||
dc.l RamInfoCyclone-InfoQuadra840AV ; offset to ram bank info
|
||
dc.l VideoInfoCyclone-InfoQuadra840AV ; offset to video info
|
||
dc.l NuBusInfoCyclone-InfoQuadra840AV ; offset to NuBus info
|
||
dc.w 0|\ ; hwCfgFlags
|
||
(1<<hwCbSCSI)|\ ; SCSI port present
|
||
(1<<hwCbClock)|\ ; New clock chip present
|
||
(1<<hwCbFPU)|\ ; FPU chip present.
|
||
(1<<hwCbMMU)|\ ; Some kind of MMU present (see MMUType for what kind).
|
||
(1<<hwCbADB) ; Apple Desktop Bus present.
|
||
dc.b BoxQuadra840AV ; product kind
|
||
dc.b YMCADecoder ; decoder kind
|
||
dc.w $3FFF ; ROM85, New ROMs, Power Off ability
|
||
dc.b 4 ; default ROM Resource configuration
|
||
dc.b ProductInfoVersion ; ProductInfo version
|
||
BitVector32 \ ; Flags for valid base addresses 0-31
|
||
ROMExists,\ ; ROMAddr is valid
|
||
DiagROMExists,\ ; DiagROMAddr is valid
|
||
VIA1Exists,\ ; VIA1Addr is valid
|
||
VIA2Exists,\ ; VIA2Addr is valid
|
||
SCCRdExists,\ ; SCCRdAddr is valid
|
||
SCCWrExists,\ ; SCCWrAddr is valid
|
||
NewAgeExists,\ ; NewAge is valid
|
||
SCSI96_1Exists,\ ; SCSI 96 is valid
|
||
PSCExists ; PSC DMA is valid
|
||
BitVector32 \ ; Flags for valid base addresses 32-63
|
||
DSPExists,\ ; DSP is valid
|
||
MaceExists, \ ; MACE is valid
|
||
MUNIExists, \ ; MUNI is valid <SM34>
|
||
CivicExists,\ ; Civic video is valid
|
||
SebastianExists ; Sebastian CLUT DAC is valid
|
||
BitVector32 ; Flags for valid base addresses 64-95
|
||
dc.l \ ; Flags for valid ext feature flags 0-31
|
||
(ClockEgret)|\ ; Has Egret clock/pram
|
||
(ADBEgret)|\ ; Egret ADB
|
||
(Cuda)|\ ; Cuda firmware
|
||
(SoundHasSoundIn)|\ ; Has Sound In <LW7>
|
||
(Sound16Bit)|\ ; Has 16-bit hardware <LW7>
|
||
(SoundStereoIn)|\ ; has stereo sound input <LW7>
|
||
(SoundStereoOut)|\ ; has stereo sound output
|
||
(SoundStereoMixing)|\ ; has stereo mixing
|
||
(SoundPlayAndRecord)|\ ; can Play and Record simultaneously <LW7>
|
||
(1 << SoundLineLevel) ; requires line level on sound input port <LW7>
|
||
dc.l \ ; Flags for valid ext feature flags 32-63
|
||
(1<<SerialDMA//32)|\ ; hardware requires SerialDMA driver
|
||
(SHALPSC)|\ ; using PSC HAL
|
||
(1<<hasEnhancedLTalk//32) ; has CURIO LocalTalk enhancements
|
||
dc.l 0 ; Flags for valid ext feature flags 64-95
|
||
dc.b $00,$00,$00,$00 ; don't check any VIA bits
|
||
dc.b $0F ; CPU ID. update for EVT6 <LW3>
|
||
dc.b $00,$00,$00 ; Filler.
|
||
dc.l VIA1InitCyclone-InfoQuadra840AV ; VIA1 init info
|
||
dc.l VIA2InitCyclone-InfoQuadra840AV ; VIA2 init info
|
||
dc.l SndCntlCyclone-InfoQuadra840AV ; sound control vector table
|
||
dc.l CudaClockPRAM-InfoQuadra840AV ; clock/PRAM vector table
|
||
dc.l CudaADBTable-InfoQuadra840AV ; ADB/DebugUtil vector table
|
||
dc.l 0 ; no Power Manager primitives
|
||
dc.l PSCIntTbl-InfoQuadra840AV ; interrupt handlers table
|
||
dc.l 0 ; internal modem manager
|
||
dc.w cpuIDHiEnd|\ ; CPU ID: hi end design center
|
||
cpuIDinMMC|\ ; CPU ID: Extended ID in MMC.
|
||
$30 ; CPU ID: Cyclone Family is ID $30
|
||
dc.w 0 ; spare <SM74>
|
||
dc.l FrigidaireIcon-InfoQuadra840AV ; offset to ICON info •• fake for now •• <SM74>
|
||
|
||
|
||
; 25 MHz Tempest product table
|
||
|
||
ALIGN 4
|
||
InfoCentris660AV
|
||
dc.l CycloneDecoderTable-InfoCentris660AV; offset to decoder info (Same as Cyclone)
|
||
dc.l RamInfoTempest-InfoCentris660AV ; offset to ram bank info
|
||
dc.l VideoInfoTempest-InfoCentris660AV ; offset to video info (Same as Cyclone)
|
||
dc.l NuBusInfoTempest-InfoCentris660AV ; offset to NuBus info
|
||
dc.w 0|\ ; hwCfgFlags
|
||
(1<<hwCbSCSI)|\ ; SCSI port present
|
||
(1<<hwCbClock)|\ ; New clock chip present
|
||
(1<<hwCbFPU)|\ ; FPU chip present.
|
||
(1<<hwCbMMU)|\ ; Some kind of MMU present (see MMUType for what kind).
|
||
(1<<hwCbADB) ; Apple Desktop Bus present.
|
||
dc.b BoxCentris660AV ; product kind
|
||
dc.b YMCADecoder ; decoder kind
|
||
dc.w $3FFF ; ROM85, New ROMs, Power Off ability
|
||
dc.b 4 ; default ROM Resource configuration
|
||
dc.b ProductInfoVersion ; ProductInfo version
|
||
BitVector32 \ ; Flags for valid base addresses 0-31
|
||
ROMExists,\ ; ROMAddr is valid
|
||
DiagROMExists,\ ; DiagROMAddr is valid
|
||
VIA1Exists,\ ; VIA1Addr is valid
|
||
VIA2Exists,\ ; VIA2Addr is valid
|
||
SCCRdExists,\ ; SCCRdAddr is valid
|
||
SCCWrExists,\ ; SCCWrAddr is valid
|
||
NewAgeExists,\ ; NewAge is valid
|
||
SCSI96_1Exists,\ ; SCSI 96 is valid
|
||
PSCExists ; PSC DMA is valid
|
||
BitVector32 ; Flags for valid base addresses 32-63 (Leave empty so that features are checked) <SM34>
|
||
BitVector32 ; Flags for valid base addresses 64-95
|
||
dc.l \ ; Flags for valid ext feature flags 0-31
|
||
(ClockEgret)|\ ; Has Egret clock/pram
|
||
(ADBEgret)|\ ; Egret ADB
|
||
(Cuda)|\ ; Cuda firmware
|
||
(SoundHasSoundIn)|\ ; Has Sound In <LW7>
|
||
(Sound16Bit)|\ ; Has 16-bit hardware <LW7>
|
||
(SoundStereoIn)|\ ; has stereo sound input <LW7>
|
||
(SoundStereoOut)|\ ; has stereo sound output
|
||
(SoundStereoMixing)|\ ; has stereo mixing
|
||
(SoundPlayAndRecord)|\ ; can Play and Record simultaneously <LW7>
|
||
(1 << SoundLineLevel)|\ ; requires line level on sound input port <LW7>
|
||
(1<<hasHardPowerOff) ; hasHardPowerOff is valid <SM32>
|
||
dc.l \ ; Flags for valid ext feature flags 32-63
|
||
(1<<SerialDMA//32)|\ ; hardware requires SerialDMA driver
|
||
(SHALPSC)|\ ; using PSC HAL
|
||
(1<<hasEnhancedLTalk//32) ; has CURIO LocalTalk enhancements
|
||
dc.l 0 ; Flags for valid ext feature flags 64-95
|
||
dc.b $00,$00,$00,$00 ; don't check any VIA bits
|
||
dc.b $0B ; CPU ID.
|
||
dc.b $00,$00,$00 ; Filler.
|
||
dc.l VIA1InitCyclone-InfoCentris660AV ; VIA1 init info (Same as Cyclone)
|
||
dc.l VIA2InitCyclone-InfoCentris660AV ; VIA2 init info (Same as Cyclone)
|
||
dc.l SndCntlCyclone-InfoCentris660AV ; sound control vector table (Same as Cyclone)
|
||
dc.l CudaClockPRAM-InfoCentris660AV ; clock/PRAM vector table (Same as Cyclone)
|
||
dc.l CudaADBTable-InfoCentris660AV ; ADB/DebugUtil vector table <SM35>
|
||
dc.l 0 ; no Power Manager primitives <SM33>
|
||
dc.l PSCIntTbl-InfoCentris660AV ; interrupt handlers table <SM38>
|
||
dc.l 0 ; internal modem manager
|
||
dc.w cpuIDHiEnd|\ ; CPU ID: hi end design center
|
||
cpuIDinMMC|\ ; CPU ID: Extended ID in MMC.
|
||
$30 ; CPU ID: Cyclone Family is ID $30
|
||
dc.w 0 ; spare <SM74>
|
||
dc.l IconInfoQFC-InfoCentris660AV ; offset to ICON info •• fake for now •• <SM74>
|
||
|
||
|
||
; 33 MHz Tempest product table
|
||
|
||
ALIGN 4
|
||
InfoTempest33
|
||
dc.l CycloneDecoderTable-InfoTempest33 ; offset to decoder info (Same as Cyclone)
|
||
dc.l RamInfoTempest-InfoTempest33 ; offset to ram bank info
|
||
dc.l VideoInfoTempest-InfoTempest33 ; offset to video info (Same as Cyclone)
|
||
dc.l NuBusInfoTempest-InfoTempest33 ; offset to NuBus info
|
||
dc.w 0|\ ; hwCfgFlags
|
||
(1<<hwCbSCSI)|\ ; SCSI port present
|
||
(1<<hwCbClock)|\ ; New clock chip present
|
||
(1<<hwCbFPU)|\ ; FPU chip present.
|
||
(1<<hwCbMMU)|\ ; Some kind of MMU present (see MMUType for what kind).
|
||
(1<<hwCbADB) ; Apple Desktop Bus present.
|
||
dc.b BoxTempest33 ; product kind
|
||
dc.b YMCADecoder ; decoder kind
|
||
dc.w $3FFF ; ROM85, New ROMs, Power Off ability
|
||
dc.b 4 ; default ROM Resource configuration
|
||
dc.b ProductInfoVersion ; ProductInfo version
|
||
BitVector32 \ ; Flags for valid base addresses 0-31
|
||
ROMExists,\ ; ROMAddr is valid
|
||
DiagROMExists,\ ; DiagROMAddr is valid
|
||
VIA1Exists,\ ; VIA1Addr is valid
|
||
VIA2Exists,\ ; VIA2Addr is valid
|
||
SCCRdExists,\ ; SCCRdAddr is valid
|
||
SCCWrExists,\ ; SCCWrAddr is valid
|
||
NewAgeExists,\ ; NewAge is valid
|
||
SCSI96_1Exists,\ ; SCSI 96 is valid
|
||
PSCExists ; PSC DMA is valid
|
||
BitVector32 ; Flags for valid base addresses 32-63 <SM34>
|
||
BitVector32 ; Flags for valid base addresses 64-95
|
||
dc.l \ ; Flags for valid ext feature flags 0-31
|
||
(ClockEgret)|\ ; Has Egret clock/pram
|
||
(ADBEgret)|\ ; Egret ADB
|
||
(Cuda)|\ ; Cuda firmware
|
||
(SoundHasSoundIn)|\ ; Has Sound In <LW7>
|
||
(Sound16Bit)|\ ; Has 16-bit hardware <LW7>
|
||
(SoundStereoIn)|\ ; has stereo sound input <LW7>
|
||
(SoundStereoOut)|\ ; has stereo sound output
|
||
(SoundStereoMixing)|\ ; has stereo mixing
|
||
(SoundPlayAndRecord)|\ ; can Play and Record simultaneously <LW7>
|
||
(1 << SoundLineLevel)|\ ; requires line level on sound input port <LW7>
|
||
(1<<hasHardPowerOff) ; hasHardPowerOff is valid <SM32>
|
||
dc.l \ ; Flags for valid ext feature flags 32-63
|
||
(1<<SerialDMA//32)|\ ; hardware requires SerialDMA driver
|
||
(SHALPSC)|\ ; using PSC HAL
|
||
(1<<hasEnhancedLTalk//32) ; has CURIO LocalTalk enhancements
|
||
dc.l 0 ; Flags for valid ext feature flags 64-95
|
||
dc.b $00,$00,$00,$00 ; don't check any VIA bits
|
||
dc.b $08 ; CPU ID.
|
||
dc.b $00,$00,$00 ; Filler.
|
||
dc.l VIA1InitCyclone-InfoTempest33 ; VIA1 init info (Same as Cyclone)
|
||
dc.l VIA2InitCyclone-InfoTempest33 ; VIA2 init info (Same as Cyclone)
|
||
dc.l SndCntlCyclone-InfoTempest33 ; sound control vector table (Same as Cyclone)
|
||
dc.l CudaClockPRAM-InfoTempest33 ; clock/PRAM vector table (Same as Cyclone)
|
||
dc.l CudaADBTable-InfoTempest33 ; ADB/DebugUtil vector table <SM35>
|
||
dc.l 0 ; no Power Manager primitives <SM33>
|
||
dc.l PSCIntTbl-InfoTempest33 ; interrupt handlers table <SM38>
|
||
dc.l 0 ; internal modem manager
|
||
dc.w cpuIDHiEnd|\ ; CPU ID: hi end design center
|
||
cpuIDinMMC|\ ; CPU ID: Extended ID in MMC.
|
||
$30 ; CPU ID: Cyclone Family is ID $30
|
||
dc.w 0 ; spare <SM74>
|
||
dc.l IconInfoQFC-InfoTempest33 ; offset to ICON info •• fake for now •• <SM74>
|
||
|
||
ENDIF ; hasYMCA
|
||
|
||
|
||
IF hasHMC THEN ; <SM46>
|
||
|
||
; ProductInfo table for PDM
|
||
|
||
IMPORT SndCntlPDM, AMICIntTbl ; <SM75><SM76>
|
||
|
||
ALIGN 4
|
||
InfoPDM ; PDM Family <SM71>
|
||
dc.l HMCDecoderTable-InfoPDM ; offset to decoder info
|
||
dc.l RamInfoPDM-InfoPDM ; offset to ram bank info
|
||
dc.l VideoInfoPDM-InfoPDM ; PDM built in video
|
||
dc.l NuBusInfoPDM-InfoPDM ; offset to NuBus info
|
||
dc.w 0|\ ; hwCfgFlags
|
||
(1<<hwCbSCSI)|\ ; SCSI port present
|
||
(1<<hwCbClock)|\ ; New clock chip present
|
||
(0<<hwCbFPU)|\ ; No FPU chip present.
|
||
(1<<hwCbMMU)|\ ; Some kind of MMU present (see MMUType for what kind).
|
||
(1<<hwCbADB) ; Apple Desktop Bus present.
|
||
dc.b boxPDM50WLCD ; product kind
|
||
dc.b HMCDecoder ; decoder kind
|
||
dc.w $3FFF ; ROM85, New ROMs, Power Off ability?
|
||
dc.b 4 ; default ROM Resource configuration for non-FPU-based machine
|
||
dc.b ProductInfoVersion ; ProductInfo version
|
||
BitVector32 \ ; Flags for valid base addresses 0-31
|
||
ROMExists,\ ; ROMAddr is valid
|
||
VIA1Exists,\ ; VIA1Addr is valid
|
||
RBVExists,\ ; RBVAddr is valid
|
||
SCCRdExists,\ ; SCCRdAddr may be valid
|
||
SCCWrExists,\ ; SCCWrAddr may be valid
|
||
ASCExists,\ ; ASC isn't valid, but say it is
|
||
SCSI96_1Exists ; 1st SCSI96 is valid
|
||
BitVector32 ; Flags for valid base addresses 32-63 (leave empty)<SM83>
|
||
BitVector32 ; Flags for valid base addresses 64-95
|
||
dc.l \ ; Flags for valid ext feature flags 0-31
|
||
(ClockEgret)|\ ; Has Egret clock/pram
|
||
(ADBEgret)|\ ; Egret ADB
|
||
(Cuda)|\ ; Cuda firmware
|
||
(SoundHasSoundIn)|\ ; Has Sound In
|
||
(Sound16Bit)|\ ; Has 16-bit hardware
|
||
(SoundStereoIn)|\ ; has stereo sound input
|
||
(SoundStereoOut)|\ ; has stereo sound output
|
||
(SoundStereoMixing)|\ ; has stereo mixing
|
||
(SoundPlayAndRecord)|\ ; can Play and Record simultaneously
|
||
(1<<SoundLineLevel)|\ ; requires line level on sound input port <SM79>
|
||
(1<<hasHardPowerOff)|\ ; hasHardPowerOff is valid
|
||
(1<<hasNewMemMgr) ; hasNewMemMgr support (ie Figment can be switched on)
|
||
dc.l \ ; Flags for valid ext feature flags 32-63
|
||
(1<<has68kEmulator//32)|\ ; This ROM starts up with a 68k emulator
|
||
(1<<SerialDMA//32)|\ ; hardware requires SerialDMA driver
|
||
(SHALAMIC)|\ ; using AMIC HAL
|
||
(1<<hasEnhancedLTalk//32) ; gots Enhanced curio LTalk <MC5>
|
||
dc.l 0 ; Flags for valid ext feature flags 64-95
|
||
dc.b $00,$00,$00,$00 ; Check VIA1 PA6, PA4, PA2, PA1
|
||
dc.b $00,$00,$00,$00 ; VIA1 PA6 = 1, PA4 = 0, PA2 = 0, PA1 = 0
|
||
dc.l VIA1InitPDM-InfoPDM ; VIA1 init info
|
||
dc.l 0 ; no VIA2 init info
|
||
dc.l SndCntlPDM-InfoPDM ; sound control vector table <SM75>
|
||
dc.l CudaClockPRAM-InfoPDM ; clock/PRAM vector table
|
||
dc.l CudaADBTable-InfoPDM ; ADB/DebugUtil vector table
|
||
dc.l 0 ; no Power Manager primitives
|
||
dc.l AMICIntTbl-InfoPDM ; interrupt handlers table
|
||
dc.l 0 ; internal modem manager
|
||
dc.w (cpuIDRISC)|\ ; CPU ID: RISC design center
|
||
(cpuIDinReg)|\ ; CPU ID: ID only in Reg
|
||
$3011 ; CPU ID: PDM ID is $3011
|
||
dc.w 0 ; spare <SM74>
|
||
dc.l IconInfoQFC-InfoPDM ; offset to ICON info <SM74>
|
||
|
||
ALIGN 4
|
||
InfoPDMcoldFusion ; Cold Fusion <SM80> SAM
|
||
dc.l HMCcfDecoderTable-InfoPDMcoldfusion ; offset to decoder info
|
||
dc.l RamInfoPDM-InfoPDMcoldfusion ; offset to ram bank info
|
||
dc.l VideoInfoPDM-InfoPDMcoldfusion ; PDM built in video
|
||
dc.l NuBusInfoCFusion-InfoPDMcoldfusion ; offset to NuBus info
|
||
dc.w 0|\ ; hwCfgFlags
|
||
(1<<hwCbSCSI)|\ ; SCSI port present
|
||
(1<<hwCbClock)|\ ; New clock chip present
|
||
(0<<hwCbFPU)|\ ; No FPU chip present.
|
||
(1<<hwCbMMU)|\ ; Some kind of MMU present (see MMUType for what kind).
|
||
(1<<hwCbADB) ; Apple Desktop Bus present.
|
||
dc.b boxPDM66F ; product kind
|
||
dc.b HMCDecoder ; decoder kind
|
||
dc.w $3FFF ; ROM85, New ROMs, ColorQD
|
||
dc.b 4 ; default ROM Resource configuration for non-FPU-based machine
|
||
dc.b ProductInfoVersion ; ProductInfo version
|
||
BitVector32 \ ; Flags for valid base addresses 0-31
|
||
ROMExists,\ ; ROMAddr is valid
|
||
VIA1Exists,\ ; VIA1Addr is valid
|
||
RBVExists,\ ; RBVAddr is valid
|
||
SCCRdExists,\ ; SCCRdAddr may be valid
|
||
SCCWrExists,\ ; SCCWrAddr may be valid
|
||
ASCExists,\ ; ASC isn't valid, but say it is
|
||
SCSI96_1Exists,\ ; 1st SCSICF96 is valid (internal)
|
||
SCSI96_2Exists ; 1st SCSIC96 is valid (external)
|
||
BitVector32 ; Flags for valid base addresses 32-63 (leave empty) <GMR>
|
||
BitVector32 ; Flags for valid base addresses 64-95
|
||
dc.l \ ; Flags for valid ext feature flags 0-31
|
||
(ClockEgret)|\ ; Has Egret clock/pram
|
||
(ADBEgret)|\ ; Egret ADB
|
||
(Cuda)|\ ; Cuda firmware
|
||
(SoundHasSoundIn)|\ ; Has Sound In
|
||
(Sound16Bit)|\ ; Has 16-bit hardware
|
||
(SoundStereoIn)|\ ; has stereo sound input
|
||
(SoundStereoOut)|\ ; has stereo sound output
|
||
(SoundStereoMixing)|\ ; has stereo mixing
|
||
(SoundPlayAndRecord)|\ ; can Play and Record simultaneously
|
||
(1 << SoundLineLevel)|\ ; requires line level on sound input port
|
||
(1<<hasNewMemMgr) ; hasNewMemMgr support (ie Figment can be switched on)
|
||
dc.l \ ; Flags for valid ext feature flags 32-63
|
||
(1<<has68kEmulator//32)|\ ; This ROM starts up with a 68k emulator
|
||
(1<<SerialDMA//32)|\ ; hardware requires SerialDMA driver
|
||
(SHALAMIC)|\ ; using AMIC HAL
|
||
(1<<hasEnhancedLTalk//32) ; gots Enhanced curio LTalk <MC5>
|
||
dc.l 0 ; Flags for valid ext feature flags 64-95
|
||
dc.b $00,$00,$00,$00 ; Check VIA1 PA6, PA4, PA2, PA1
|
||
dc.b $00,$00,$00,$00 ; VIA1 PA6 = 1, PA4 = 0, PA2 = 0, PA1 = 0
|
||
dc.l VIA1InitPDM-InfoPDMcoldfusion ; VIA1 init info
|
||
dc.l 0 ; no VIA2 init info
|
||
dc.l SndCntlPDM-InfoPDMcoldfusion ; sound control vector table
|
||
dc.l CudaClockPRAM-InfoPDMcoldfusion ; clock/PRAM vector table
|
||
dc.l CudaADBTable-InfoPDMcoldfusion ; ADB/DebugUtil vector table
|
||
dc.l 0 ; no Power Manager primitives
|
||
dc.l AMICIntTbl-InfoPDMcoldfusion ; interrupt handlers table
|
||
dc.l 0 ; internal modem manager
|
||
dc.w (cpuIDRISC)|\ ; CPU ID: RISC design center
|
||
(cpuIDinReg)|\ ; CPU ID: ID only in Reg
|
||
$3013 ; CPU ID: ColdFusion ID is $3013
|
||
dc.w 0 ; spare
|
||
dc.l IconInfoFrigidaire-InfoPDMcoldfusion; offset to ICON info
|
||
|
||
ALIGN 4
|
||
|
||
InfoPDMCarlSagan ; Carl Sagan <SM88>
|
||
dc.l HMCDecoderTable-InfoPDMCarlSagan ; offset to decoder info
|
||
dc.l RamInfoPDM-InfoPDMCarlSagan ; offset to ram bank info
|
||
dc.l VideoInfoPDM-InfoPDMCarlSagan ; PDM built in video
|
||
dc.l NuBusInfoCFusion-InfoPDMCarlSagan ; offset to NuBus info
|
||
dc.w 0|\ ; hwCfgFlags
|
||
(1<<hwCbSCSI)|\ ; SCSI port present
|
||
(1<<hwCbClock)|\ ; New clock chip present
|
||
(0<<hwCbFPU)|\ ; No FPU chip present.
|
||
(1<<hwCbMMU)|\ ; Some kind of MMU present (see MMUType for what kind).
|
||
(1<<hwCbADB) ; Apple Desktop Bus present.
|
||
dc.b boxPDM66L ; product kind
|
||
dc.b HMCDecoder ; decoder kind
|
||
dc.w $3FFF ; ROM85, New ROMs, ColorQD
|
||
dc.b 4 ; default ROM Resource configuration for non-FPU-based machine
|
||
dc.b ProductInfoVersion ; ProductInfo version
|
||
BitVector32 \ ; Flags for valid base addresses 0-31
|
||
ROMExists,\ ; ROMAddr is valid
|
||
VIA1Exists,\ ; VIA1Addr is valid
|
||
RBVExists,\ ; RBVAddr is valid
|
||
SCCRdExists,\ ; SCCRdAddr may be valid
|
||
SCCWrExists,\ ; SCCWrAddr may be valid
|
||
ASCExists,\ ; ASC isn't valid, but say it is
|
||
SCSI96_1Exists ; 1st SCSICF96 is valid (internal)
|
||
BitVector32 \ ; Flags for valid base addresses 32-63
|
||
AwacsExists,\ ; AwacsAddr is valid
|
||
MaceExists, \ ; MACE is valid
|
||
AMICExists,\ ; AMIC DMA IO controller exists
|
||
SWIM3Exists,\ ; SWIM3 DMA floppy controller exists
|
||
BartExists ; BART (NuBus controller) exists <SM83>
|
||
BitVector32 ; Flags for valid base addresses 64-95
|
||
dc.l \ ; Flags for valid ext feature flags 0-31
|
||
(ClockEgret)|\ ; Has Egret clock/pram
|
||
(ADBEgret)|\ ; Egret ADB
|
||
(Cuda)|\ ; Cuda firmware
|
||
(SoundHasSoundIn)|\ ; Has Sound In
|
||
(Sound16Bit)|\ ; Has 16-bit hardware
|
||
(SoundStereoIn)|\ ; has stereo sound input
|
||
(SoundStereoOut)|\ ; has stereo sound output
|
||
(SoundStereoMixing)|\ ; has stereo mixing
|
||
(SoundPlayAndRecord)|\ ; can Play and Record simultaneously
|
||
(1 << SoundLineLevel)|\ ; requires line level on sound input port
|
||
(1<<hasNewMemMgr) ; hasNewMemMgr support (ie Figment can be switched on)
|
||
dc.l \ ; Flags for valid ext feature flags 32-63
|
||
(1<<has68kEmulator//32)|\ ; This ROM starts up with a 68k emulator
|
||
(1<<SerialDMA//32)|\ ; hardware requires SerialDMA driver
|
||
(SHALAMIC)|\ ; using AMIC HAL
|
||
(1<<hasEnhancedLTalk//32) ; gots Enhanced curio LTalk <MC5>
|
||
dc.l 0 ; Flags for valid ext feature flags 64-95
|
||
dc.b $00,$00,$00,$00 ; Check VIA1 PA6, PA4, PA2, PA1
|
||
dc.b $00,$00,$00,$00 ; VIA1 PA6 = 1, PA4 = 0, PA2 = 0, PA1 = 0
|
||
dc.l VIA1InitPDM-InfoPDMCarlSagan ; VIA1 init info
|
||
dc.l 0 ; no VIA2 init info
|
||
dc.l SndCntlPDM-InfoPDMCarlSagan ; sound control vector table
|
||
dc.l CudaClockPRAM-InfoPDMCarlSagan ; clock/PRAM vector table
|
||
dc.l CudaADBTable-InfoPDMCarlSagan ; ADB/DebugUtil vector table
|
||
dc.l 0 ; no Power Manager primitives
|
||
dc.l AMICIntTbl-InfoPDMCarlSagan ; interrupt handlers table
|
||
dc.l 0 ; internal modem manager
|
||
dc.w (cpuIDRISC)|\ ; CPU ID: RISC design center
|
||
(cpuIDinReg)|\ ; CPU ID: ID only in Reg
|
||
$3012 ; CPU ID: Carl Sagan ID is $3012
|
||
dc.w 0 ; spare
|
||
dc.l IconInfoLego-InfoPDMCarlSagan ; offset to ICON info
|
||
|
||
|
||
ENDIF ; hasHMC
|
||
|
||
IF hasGrandCentral THEN
|
||
|
||
IMPORT GCIntTbl, SndCntlPDM
|
||
|
||
; TNT bringup board product table
|
||
|
||
ALIGN 4
|
||
InfoTNTProto1
|
||
dc.l HHeadDecoderTable-InfoTNTProto1 ; offset to decoder info for EVT4
|
||
dc.l RamInfoTNT-InfoTNTProto1 ; offset to ram bank info
|
||
dc.l VideoInfoTNT-InfoTNTProto1 ; Pseudo TNT built in video
|
||
dc.l NuBusInfoTNT-InfoTNTProto1 ; offset to NuBus info
|
||
dc.w 0|\ ; hwCfgFlags
|
||
(1<<hwCbSCSI)|\ ; SCSI port present
|
||
(1<<hwCbClock)|\ ; New clock chip present
|
||
(0<<hwCbFPU)|\ ; No FPU chip present.
|
||
(1<<hwCbMMU)|\ ; Some kind of MMU present (see MMUType for what kind).
|
||
(1<<hwCbADB) ; Apple Desktop Bus present.
|
||
dc.b BoxTNTProto1 ; product kind
|
||
dc.b HHeadDecoder ; decoder kind
|
||
dc.w $3FFF ; ROM85, New ROMs, Power Off ability
|
||
dc.b 4 ; default ROM Resource configuration
|
||
dc.b ProductInfoVersion ; ProductInfo version
|
||
BitVector32 \ ; Flags for valid base addresses 0-31
|
||
ROMExists,\ ; ROMAddr is valid
|
||
VIA1Exists,\ ; VIA1Addr is valid
|
||
SCCRdExists,\ ; SCCRdAddr is valid
|
||
SCCWrExists,\ ; SCCWrAddr is valid
|
||
ASCExists,\ ; ASC isn't valid, but say it is
|
||
SCSI96_1Exists,\ ; SCSI 96 bus 1 is valid (internal)
|
||
SCSI96_2Exists ; SCSI 96 bus 2 is valid (external)
|
||
BitVector32 \ ; Flags for valid base addresses 32-63
|
||
MaceExists, \ ; MACE is valid
|
||
SWIM3Exists, \ ; MUNI is valid
|
||
AwacsExists, \ ; Awacs is valid
|
||
GrandCentralExists ; Grand Central is valid
|
||
BitVector32 ; Flags for valid base addresses 64-95
|
||
dc.l \ ; Flags for valid ext feature flags 0-31
|
||
(ClockEgret)|\ ; Has Egret clock/pram
|
||
(ADBEgret)|\ ; Egret ADB
|
||
(Cuda)|\ ; Cuda firmware
|
||
(SoundHasSoundIn)|\ ; Has Sound In
|
||
(Sound16Bit)|\ ; Has 16-bit hardware
|
||
(SoundStereoIn)|\ ; has stereo sound input
|
||
(SoundStereoOut)|\ ; has stereo sound output
|
||
(SoundStereoMixing)|\ ; has stereo mixing
|
||
(SoundPlayAndRecord)|\ ; can Play and Record simultaneously
|
||
(1 << SoundLineLevel)|\ ; requires line level on sound input port
|
||
(1<<hasNewMemMgr)|\ ; hasNewMemMgr support (ie Figment can be switched on)
|
||
(1<<SoftVBL) ; SoftVBL is valid
|
||
dc.l \ ; Flags for valid ext feature flags 32-63
|
||
(1<<has68kEmulator//32)|\ ; This ROM starts up with a 68k emulator
|
||
(1<<hasEnhancedLTalk//32) ; has CURIO LocalTalk enhancements
|
||
dc.l 0 ; Flags for valid ext feature flags 64-95
|
||
dc.b $00,$00,$00,$00 ; don't check any VIA bits
|
||
dc.b $00 ; CPU ID
|
||
dc.b $00,$00,$00 ; Filler
|
||
dc.l VIA1InitTNT-InfoTNTProto1 ; VIA1 init info
|
||
dc.l 0 ; no VIA2 init info
|
||
dc.l SndCntlPDM-InfoTNTProto1 ; sound control vector table <SM75>
|
||
dc.l CudaClockPRAM-InfoTNTProto1 ; clock/PRAM vector table
|
||
dc.l CudaADBTable-InfoTNTProto1 ; ADB/DebugUtil vector table
|
||
dc.l 0 ; no Power Manager primitives
|
||
dc.l GCIntTbl-InfoTNTProto1 ; interrupt handlers table
|
||
dc.l 0 ; internal modem manager
|
||
dc.w cpuIDHiEnd|\ ; CPU ID: hi end design center
|
||
(cpuIDinReg)|\ ; CPU ID: ID only in Reg
|
||
$3020 ; CPU ID: PDM ID is $3011
|
||
dc.w 0 ; spare
|
||
dc.l IconInfoFrigidaire-InfoTNTProto1 ; offset to ICON info
|
||
|
||
ENDIF ; {hasGrandCentral}
|
||
|
||
|
||
|
||
;_______________________________________________________________________
|
||
;
|
||
; ••• The following applies only to older CPUs that do not support the
|
||
; ••• CPUID register identification scheme.
|
||
;
|
||
; The tables below figure out which logic board we are running on. Some VIA bits
|
||
; have been dedicated to this task starting with the Mac II. On other machines,
|
||
; we need to be more clever to determine which board it is.
|
||
;
|
||
; For 020/030 based machines, the VIA bits are used. For the Mac II, IIx, IIcx and
|
||
; SE30 machines, the ID bits are PA6 on VIA1 aand PB3 on VIA2. Note that on the
|
||
; Mac II, PB3 on VIA 2 is normally an output that controls the MMU, but when read as an
|
||
; input it is pulled high internal to the VIA.
|
||
;
|
||
; PA6 PB3 machine
|
||
;
|
||
; 0 0 Mac IIx
|
||
; 0 1 Mac II
|
||
; 1 0 Mac SE 30
|
||
; 1 1 Mac IIcx
|
||
;
|
||
; For newer machines, Via 1 port A has four bits dedicated to a logic board ID. These bits
|
||
; are defined as follows:
|
||
;
|
||
; PA6 PA4 PA2 PA1 machine <5.0>
|
||
; 1 1 1 1 Aurora 25MHz, CX package IIci
|
||
; 1 1 1 0 Elsie (was Foursquare) LC <12>
|
||
; 1 1 0 1 F19 IIfx
|
||
; 1 0 1 1 Aurora 16MHz, CX package
|
||
; 0 1 1 1 Erickson IIsi
|
||
; 0 0 1 1 Aurora 16MHz, SE package (reserved for future)
|
||
; 1 1 0 0 Eclipse Quadra900 <13>
|
||
; 1 0 0 0 Spike Quadra700
|
||
; 0 1 0 1 TIM PowerBook170 <36>
|
||
; 0 1 1 0 Waimea <36>
|
||
|
||
|
||
IF hasOrwell THEN
|
||
IMPORT SndCntlQuadra700, SndCntlQuadra900, Quadra700IntTbl, Quadra900IntTbl
|
||
|
||
ALIGN 4
|
||
InfoQuadra700
|
||
dc.l OrwellDecoderTable-InfoQuadra700 ; offset to decoder info
|
||
dc.l RAMInfo2Bank4Meg-InfoQuadra700 ; offset to ram bank info
|
||
dc.l VideoInfoDAFB-InfoQuadra700 ; DAFB built in video
|
||
dc.l NuBusInfoQuadra700-InfoQuadra700 ; offset to NuBus info
|
||
dc.w 0|\ ; hwCfgFlags
|
||
(1<<hwCbSCSI)|\ ; SCSI port present
|
||
(1<<hwCbClock)|\ ; New clock chip present
|
||
(1<<hwCbFPU)|\ ; FPU chip present.
|
||
(1<<hwCbMMU)|\ ; Some kind of MMU present (see MMUType for what kind).
|
||
(1<<hwCbADB) ; Apple Desktop Bus present.
|
||
dc.b BoxQuadra700 ; product kind
|
||
dc.b OrwellDecoder ; decoder kind
|
||
dc.w $3FFF ; ROM85, New ROMs, Power Off ability.
|
||
dc.b 2 ; default ROM Resource configuration for FPU-based machine <T15><T19>
|
||
dc.b ProductInfoVersion ; ProductInfo version
|
||
BitVector32 \ ; Flags for valid base addresses 0-31
|
||
ROMExists,\ ; ROMAddr is valid
|
||
DiagROMExists,\ ; DiagROMAddr is valid
|
||
VIA1Exists,\ ; VIA1Addr is valid
|
||
VIA2Exists,\ ; VIA2Addr is valid
|
||
SCCRdExists,\ ; SCCRdAddr is valid
|
||
SCCWrExists,\ ; SCCWrAddr is valid
|
||
ASCExists,\ ; ASCAddr is valid (means Batman in this case)
|
||
IWMExists,\ ; IWMAddr is valid
|
||
SCSI96_1Exists,\ ; 1st SCSI96 is valid
|
||
OrwellExists,\ ; OrwellAddr in valid <SM62> CSS
|
||
SONICExists,\ ; SONIC is valid
|
||
DAFBExists ; has DAFB video
|
||
BitVector32 ; Flags for valid base addresses 32-63
|
||
BitVector32 ; Flags for valid base addresses 64-95
|
||
dc.l \ ; Flags for valid ext feature flags 0-31
|
||
(ClockRTC)|\ ; Has RTC clock/PRAM
|
||
(SoundHasSoundIn)|\ ; Has 8-bit mono sound input <LW7>
|
||
(SoundStereoOut)|\ ; has stereo sound output
|
||
(SoundPlayAndRecord)|\ ; can Play and Record simultaneously <H24>
|
||
(1<<hasNewMemMgr)|\ ; hasNewMemMgr support (ie Figment can be switched on)
|
||
(ADBXcvr) ; Has transceiver ADB
|
||
dc.l 0 ; Flags for valid ext feature flags 32-63
|
||
dc.l 0 ; Flags for valid ext feature flags 64-95
|
||
dc.b $56,$00,$00,$00 ; Check VIA1 PA6, PA4, PA2, PA1
|
||
dc.b $40,$00,$00,$00 ; VIA1 PA6 = 1, PA4 = 0, PA2 = 0, PA1 = 0
|
||
dc.l VIA1InitQuadra700-InfoQuadra700 ; VIA1 init info
|
||
dc.l VIA2InitQuadra700-InfoQuadra700 ; VIA2 init info
|
||
dc.l SndCntlQuadra700-InfoQuadra700 ; sound control vector table
|
||
dc.l RTCClockPRAM-InfoQuadra700 ; clock/PRAM vector table <H4>
|
||
dc.l ViaADBTable-InfoQuadra700 ; ADB/DebugUtil vector table <H14>
|
||
dc.l 0 ; no Power Manager primitives <SM33>
|
||
dc.l Quadra700IntTbl-InfoQuadra700 ; interrupt handlers table <SM38>
|
||
dc.l 0 ; internal modem manager
|
||
dc.w 0 ; no CPU ID register
|
||
dc.w 0 ; spare <SM74>
|
||
dc.l IconInfoQuadra700-InfoQuadra700 ; offset to ICON info <SM74>
|
||
|
||
|
||
ALIGN 4
|
||
InfoQuadra900
|
||
dc.l OrwellDecoderTable-InfoQuadra900 ; offset to decoder info
|
||
dc.l RamInfoQuadra900-InfoQuadra900 ; offset to ram bank info
|
||
dc.l VideoInfoDAFB-InfoQuadra900 ; DAFB built in video <58>
|
||
dc.l NuBusInfoQuadra900-InfoQuadra900 ; offset to NuBus info
|
||
dc.w 0|\ ; hwCfgFlags
|
||
(1<<hwCbSCSI)|\ ; SCSI port present
|
||
(1<<hwCbClock)|\ ; New clock chip present
|
||
(1<<hwCbFPU)|\ ; FPU chip present. <58>
|
||
(1<<hwCbMMU)|\ ; Some kind of MMU present (see MMUType for what kind).
|
||
(1<<hwCbADB) ; Apple Desktop Bus present.
|
||
dc.b BoxQuadra900 ; product kind <57>
|
||
dc.b OrwellDecoder ; decoder kind
|
||
dc.w $3FFF ; ROM85, New ROMs, Power Off ability.
|
||
dc.b 2 ; default ROM Resource configuration
|
||
dc.b ProductInfoVersion ; ProductInfo version
|
||
BitVector32 \ ; Flags for valid base addresses 0-31
|
||
ROMExists,\ ; ROMAddr is valid
|
||
DiagROMExists,\ ; DiagROMAddr is valid
|
||
VIA1Exists,\ ; VIA1Addr is valid
|
||
VIA2Exists,\ ; VIA2Addr is valid
|
||
ASCExists,\ ; ASCAddr is valid (means Batman in this case) <47>
|
||
SWIMIOPExists,\ ; SWIMIOPAddr is valid
|
||
SCCIOPExists,\ ; SCCIOPAddr is valid
|
||
OrwellExists,\ ; OrwellAddr is valid <SM62> CSS
|
||
SONICExists,\ ; SONIC is valid <58>
|
||
SCSI96_1Exists,\ ; 1st SCSI96 is valid <58>
|
||
PatchROMExists,\ ; Patch ROM is valid <H15><SM5>
|
||
SCSI96_2Exists,\ ; 2nd SCSI96 is valid <58>
|
||
DAFBExists ; has DAFB video <58>
|
||
BitVector32 ; Flags for valid base addresses 32-63
|
||
BitVector32 ; Flags for valid base addresses 64-95
|
||
dc.l \ ; Flags for valid ext feature flags 0-31
|
||
(ClockEgret)|\ ; Has Egret clock/PRAM <58>
|
||
(SoundHasSoundIn)|\ ; Has 8-bit mono sound input <58><LW7>
|
||
(Caboose)|\ ; Caboose firmware <SM4><P1>
|
||
(SoundStereoOut)|\ ; has stereo sound output <58>
|
||
(SoundPlayAndRecord)|\ ; can Play and Record simultaneously <H24>
|
||
(KeyswCaboose)|\ ; has a Caboose-flavored power keyswitch <58>
|
||
(1<<hasNewMemMgr)|\ ; hasNewMemMgr support (ie Figment can be switched on)
|
||
(ADBIop) ; IOP ADB <58>
|
||
dc.l 0 ; Flags for valid ext feature flags 32-63
|
||
dc.l 0 ; Flags for valid ext feature flags 64-95
|
||
dc.b $56,$00,$00,$00 ; Check VIA1 PA6, PA4, PA2, PA1
|
||
dc.b $50,$00,$00,$00 ; VIA1 PA6 = 1, PA4 = 1, PA2 = 0, PA1 = 0
|
||
dc.l VIA1InitQuadra900-InfoQuadra900 ; VIA1 init info
|
||
dc.l VIA2InitQuadra900-InfoQuadra900 ; VIA2 init info
|
||
dc.l SndCntlQuadra900-InfoQuadra900 ; sound control vector table <t23>
|
||
dc.l EgretClockPRAM-InfoQuadra900 ; clock/PRAM vector table <H4>
|
||
dc.l QuadraADBTable-InfoQuadra900 ; ADB/DebugUtil vector table <H14>
|
||
dc.l 0 ; no Power Manager primitives <SM33>
|
||
dc.l Quadra900IntTbl-InfoQuadra900 ; interrupt handlers table <SM38>
|
||
dc.l 0 ; internal modem manager
|
||
dc.w 0 ; no CPU ID register
|
||
dc.w 0 ; spare <SM74>
|
||
dc.l IconInfoQuadra900-InfoQuadra900 ; offset to ICON info <SM74>
|
||
|
||
|
||
ALIGN 4
|
||
InfoQuadra950
|
||
dc.l OrwellDecoderTable-InfoQuadra950 ; offset to decoder info
|
||
dc.l RamInfoQuadra900-InfoQuadra950 ; offset to ram bank info
|
||
dc.l VideoInfoDAFB-InfoQuadra950 ; DAFB built in video
|
||
dc.l NuBusInfoQuadra900-InfoQuadra950 ; offset to NuBus info
|
||
dc.w 0|\ ; hwCfgFlags
|
||
(1<<hwCbSCSI)|\ ; SCSI port present
|
||
(1<<hwCbClock)|\ ; New clock chip present
|
||
(1<<hwCbFPU)|\ ; FPU chip present.
|
||
(1<<hwCbMMU)|\ ; Some kind of MMU present (see MMUType for what kind).
|
||
(1<<hwCbADB) ; Apple Desktop Bus present.
|
||
dc.b BoxQuadra950 ; product kind
|
||
dc.b OrwellDecoder ; decoder kind
|
||
dc.w $3FFF ; ROM85, New ROMs, Power Off ability.
|
||
dc.b 2 ; default ROM Resource configuration for FPU-based machine <T15><T19>
|
||
dc.b ProductInfoVersion ; ProductInfo version
|
||
BitVector32 \ ; Flags for valid base addresses 0-31
|
||
ROMExists,\ ; ROMAddr is valid
|
||
DiagROMExists,\ ; DiagROMAddr is valid
|
||
VIA1Exists,\ ; VIA1Addr is valid
|
||
VIA2Exists,\ ; VIA2Addr is valid
|
||
ASCExists,\ ; ASCAddr is valid (means Batman in this case) <47>
|
||
SWIMIOPExists,\ ; SWIMIOPAddr is valid
|
||
SCCIOPExists,\ ; SCCIOPAddr is valid
|
||
OrwellExists,\ ; OrwellAddr is valid <SM62> CSS
|
||
SONICExists,\ ; SONIC is valid <58>
|
||
SCSI96_1Exists,\ ; 1st SCSI96 is valid <58>
|
||
SCSI96_2Exists,\ ; 2nd SCSI96 is valid <58>
|
||
PatchROMExists,\ ; Patch ROM is valid <H15><SM5>
|
||
DAFBExists ; has DAFB video <58>
|
||
BitVector32 ; Flags for valid base addresses 32-63
|
||
BitVector32 ; Flags for valid base addresses 64-95
|
||
dc.l \ ; Flags for valid ext feature flags 0-31
|
||
(ClockEgret)|\ ; Has Egret clock/PRAM <58>
|
||
(SoundHasSoundIn)|\ ; Has 8-bit mono sound input <58><LW7>
|
||
(Caboose)|\ ; Caboose firmware <SM4><P1>
|
||
(SoundStereoOut)|\ ; has stereo sound output <58>
|
||
(SoundStereoMixing)|\ ; has stereo mixing <H13>
|
||
(SoundPlayAndRecord)|\ ; can Play and Record simultaneously <H24>
|
||
(KeyswCaboose)|\ ; has a Caboose-flavored power keyswitch <58>
|
||
(1<<hasNewMemMgr)|\ ; hasNewMemMgr support (ie Figment can be switched on)
|
||
(ADBIop) ; IOP ADB <58>
|
||
dc.l 0 ; Flags for valid ext feature flags 32-63
|
||
dc.l 0 ; Flags for valid ext feature flags 64-95
|
||
dc.b $56,$00,$00,$00 ; Check VIA1 PA6, PA4, PA2, PA1
|
||
dc.b $10,$00,$00,$00 ; VIA1 PA6 = 0, PA4 = 1, PA2 = 0, PA1 = 0
|
||
dc.l VIA1InitQuadra900-InfoQuadra950 ; VIA1 init info
|
||
dc.l VIA2InitQuadra900-InfoQuadra950 ; VIA2 init info
|
||
dc.l SndCntlQuadra900-InfoQuadra950 ; sound control vector table <t23>
|
||
dc.l EgretClockPRAM-InfoQuadra950 ; clock/PRAM vector table <H4>
|
||
dc.l QuadraADBTable-InfoQuadra950 ; ADB/DebugUtil vector table <H14>
|
||
dc.l 0 ; no Power Manager primitives <SM33>
|
||
dc.l Quadra900IntTbl-InfoQuadra950 ; interrupt handlers table <SM38>
|
||
dc.l 0 ; internal modem manager
|
||
dc.w 0 ; no CPU ID register
|
||
dc.w 0 ; spare <SM74>
|
||
dc.l IconInfoQuadra900-InfoQuadra950 ; offset to ICON info <SM74>
|
||
|
||
|
||
; ProductInfo table for 601 Smurf cards running in Quadra 700's
|
||
|
||
IF forSmurf THEN
|
||
ALIGN 4
|
||
InfoRiscQuadra700 ; <SM11>
|
||
dc.l OrwellDecoderTable-InfoRiscQuadra700; offset to decoder info
|
||
dc.l RamInfoRiscQuadra-InfoRiscQuadra700 ; offset to ram bank info
|
||
dc.l VideoInfoDAFB-InfoRiscQuadra700 ; DAFB built in video
|
||
dc.l NuBusInfoQuadra700-InfoRiscQuadra700; offset to NuBus info
|
||
dc.w 0|\ ; hwCfgFlags
|
||
(1<<hwCbSCSI)|\ ; SCSI port present
|
||
(1<<hwCbClock)|\ ; New clock chip present
|
||
(0<<hwCbFPU)|\ ; FPU chip present.
|
||
(1<<hwCbMMU)|\ ; Some kind of MMU present (see MMUType for what kind).
|
||
(1<<hwCbADB) ; Apple Desktop Bus present.
|
||
dc.b boxRiscQuadra700 ; product kind
|
||
dc.b OrwellDecoder ; decoder kind
|
||
dc.w $3FFF ; ROM85, New ROMs, Power Off ability.
|
||
dc.b 4 ; default ROM Resource configuration for FPU-based machine
|
||
dc.b ProductInfoVersion ; ProductInfo version
|
||
BitVector32 \ ; Flags for valid base addresses 0-31
|
||
ROMExists,\ ; ROMAddr is valid
|
||
VIA1Exists,\ ; VIA1Addr is valid
|
||
VIA2Exists,\ ; VIA2Addr is valid
|
||
SCCRdExists,\ ; SCCRdAddr is valid
|
||
SCCWrExists,\ ; SCCWrAddr is valid
|
||
ASCExists,\ ; ASCAddr is valid (means Batman in this case)
|
||
IWMExists,\ ; IWMAddr is valid
|
||
OrwellExists,\ ; OrwellAddr is valid <SM62> CSS
|
||
SCSI96_1Exists,\ ; 1st SCSI96 is valid
|
||
SONICExists,\ ; SONIC is valid <SM21>
|
||
DAFBExists ; has DAFB video
|
||
BitVector32 ; Flags for valid base addresses 32-63
|
||
BitVector32 ; Flags for valid base addresses 64-95
|
||
dc.l \ ; Flags for valid ext feature flags 0-31
|
||
(ClockRTC)|\ ; Has RTC clock/PRAM
|
||
(SoundHasSoundIn)|\ ; Has 8-bit mono sound input <LW7>
|
||
(SoundStereoOut)|\ ; has stereo sound output
|
||
(SoundPlayAndRecord)|\ ; can Play and Record simultaneously
|
||
(ADBXcvr) ; Has transceiver ADB
|
||
dc.l \ ; Flags for valid ext feature flags 32-63
|
||
(1<<has68kEmulator//32) ; This ROM starts up with a 68k emulator
|
||
dc.l 0 ; Flags for valid ext feature flags 64-95
|
||
dc.b $56,$00,$00,$00 ; Check VIA1 PA6, PA4, PA2, PA1
|
||
dc.b $40,$00,$00,$00 ; VIA1 PA6 = 1, PA4 = 0, PA2 = 0, PA1 = 0
|
||
dc.l VIA1InitQuadra700-InfoRiscQuadra700 ; VIA1 init info
|
||
dc.l VIA2InitQuadra700-InfoRiscQuadra700 ; VIA2 init info
|
||
dc.l SndCntlQuadra700-InfoRiscQuadra700 ; sound control vector table
|
||
dc.l RTCClockPRAM-InfoRiscQuadra700 ; clock/PRAM vector table
|
||
dc.l ViaADBTable-InfoRiscQuadra700 ; ADB/DebugUtil vector table
|
||
dc.l 0 ; no Power Manager primitives <SM33>
|
||
dc.l Quadra700IntTbl-InfoRiscQuadra700 ; interrupt handlers table <SM38>
|
||
dc.l 0 ; internal modem manager
|
||
dc.w (cpuIDRISC)|\ ; CPU ID: RISC design center
|
||
$1235 ; CPU ID: Risc Card ID is $1234
|
||
dc.w 0 ; spare <SM74>
|
||
dc.l IconInfoQuadra700-InfoRiscQuadra700 ; offset to ICON info <SM74>
|
||
|
||
|
||
; ProductInfo table for 601 Smurf cards running in Quadra 900's
|
||
|
||
ALIGN 4
|
||
InfoRiscQuadra900
|
||
dc.l OrwellDecoderTable-InfoRiscQuadra900; offset to decoder info
|
||
dc.l RamInfoRiscQuadra-InfoRiscQuadra900 ; offset to ram bank info
|
||
dc.l VideoInfoDAFB-InfoRiscQuadra900 ; DAFB built in video
|
||
dc.l NuBusInfoQuadra900-InfoRiscQuadra900; offset to NuBus info
|
||
dc.w 0|\ ; hwCfgFlags
|
||
(1<<hwCbSCSI)|\ ; SCSI port present
|
||
(1<<hwCbClock)|\ ; New clock chip present
|
||
(0<<hwCbFPU)|\ ; FPU chip present.
|
||
(1<<hwCbMMU)|\ ; Some kind of MMU present (see MMUType for what kind).
|
||
(1<<hwCbADB) ; Apple Desktop Bus present.
|
||
dc.b boxRiscQuadra900 ; product kind
|
||
dc.b OrwellDecoder ; decoder kind
|
||
dc.w $3FFF ; ROM85, New ROMs, Power Off ability.
|
||
dc.b 2 ; default ROM Resource configuration for FPU-based machine <T15><T19>
|
||
dc.b ProductInfoVersion ; ProductInfo version
|
||
BitVector32 \ ; Flags for valid base addresses 0-31
|
||
ROMExists,\ ; ROMAddr is valid
|
||
VIA1Exists,\ ; VIA1Addr is valid
|
||
VIA2Exists,\ ; VIA2Addr is valid
|
||
ASCExists,\ ; ASCAddr is valid (means Batman in this case) <47>
|
||
SWIMIOPExists,\ ; SWIMIOPAddr is valid
|
||
SCCIOPExists,\ ; SCCIOPAddr is valid
|
||
OrwellExists,\ ; OrwellAddr is valid <SM62> CSS
|
||
SONICExists,\ ; SONIC is valid <58>
|
||
SCSI96_1Exists,\ ; 1st SCSI96 is valid <58>
|
||
SCSI96_2Exists,\ ; 2nd SCSI96 is valid <58>
|
||
DAFBExists ; has DAFB video <58>
|
||
BitVector32 ; Flags for valid base addresses 32-63
|
||
BitVector32 ; Flags for valid base addresses 64-95
|
||
dc.l \ ; Flags for valid ext feature flags 0-31
|
||
(ClockEgret)|\ ; Has Egret clock/PRAM <58>
|
||
(SoundHasSoundIn)|\ ; Has 8-bit mono sound input <58><LW7>
|
||
(Caboose)|\ ; Caboose firmware <SM4><P1>
|
||
(SoundStereoOut)|\ ; has stereo sound output <58>
|
||
(SoundStereoMixing)|\ ; has stereo mixing <H13>
|
||
(SoundPlayAndRecord)|\ ; can Play and Record simultaneously <H24>
|
||
(KeyswCaboose)|\ ; has a Caboose-flavored power keyswitch <58>
|
||
(ADBIop) ; IOP ADB <58>
|
||
dc.l \ ; Flags for valid ext feature flags 32-63
|
||
(1<<has68kEmulator//32) ; This ROM starts up with a 68k emulator
|
||
dc.l 0 ; Flags for valid ext feature flags 32-63
|
||
dc.b $56,$00,$00,$00 ; Check VIA1 PA6, PA4, PA2, PA1
|
||
dc.b $50,$00,$00,$00 ; VIA1 PA6 = 1, PA4 = 1, PA2 = 0, PA1 = 0
|
||
dc.l VIA1InitQuadra900-InfoRiscQuadra900 ; VIA1 init info
|
||
dc.l VIA2InitQuadra900-InfoRiscQuadra900 ; VIA2 init info
|
||
dc.l SndCntlQuadra900-InfoRiscQuadra900 ; sound control vector table <t23>
|
||
dc.l EgretClockPRAM-InfoRiscQuadra900 ; clock/PRAM vector table <H4>
|
||
dc.l QuadraADBTable-InfoRiscQuadra900 ; ADB/DebugUtil vector table <H14>
|
||
dc.l 0 ; no Power Manager primitives <SM33>
|
||
dc.l Quadra900IntTbl-InfoRiscQuadra900 ; interrupt handlers table <SM38>
|
||
dc.l 0 ; internal modem manager
|
||
dc.w (cpuIDRISC)|\ ; CPU ID: RISC design center
|
||
$1236 ; CPU ID: Risc Card ID is $1236
|
||
dc.w 0 ; spare <SM74>
|
||
dc.l IconInfoQuadra900-InfoRiscQuadra900 ; offset to ICON info <SM74>
|
||
|
||
; ProductInfo table for 601 Smurf cards running in Quadra 950's
|
||
|
||
ALIGN 4
|
||
InfoRiscQuadra950
|
||
dc.l OrwellDecoderTable-InfoRiscQuadra950; offset to decoder info
|
||
dc.l RamInfoRiscQuadra-InfoRiscQuadra950 ; offset to ram bank info
|
||
dc.l VideoInfoDAFB-InfoRiscQuadra950 ; DAFB built in video
|
||
dc.l NuBusInfoQuadra900-InfoRiscQuadra950; offset to NuBus info
|
||
dc.w 0|\ ; hwCfgFlags
|
||
(1<<hwCbSCSI)|\ ; SCSI port present
|
||
(1<<hwCbClock)|\ ; New clock chip present
|
||
(0<<hwCbFPU)|\ ; FPU chip present.
|
||
(1<<hwCbMMU)|\ ; Some kind of MMU present (see MMUType for what kind).
|
||
(1<<hwCbADB) ; Apple Desktop Bus present.
|
||
dc.b boxRiscQuadra950 ; product kind
|
||
dc.b OrwellDecoder ; decoder kind
|
||
dc.w $3FFF ; ROM85, New ROMs, Power Off ability.
|
||
dc.b 2 ; default ROM Resource configuration for FPU-based machine <T15><T19>
|
||
dc.b ProductInfoVersion ; ProductInfo version
|
||
BitVector32 \ ; Flags for valid base addresses 0-31
|
||
ROMExists,\ ; ROMAddr is valid
|
||
VIA1Exists,\ ; VIA1Addr is valid
|
||
VIA2Exists,\ ; VIA2Addr is valid
|
||
ASCExists,\ ; ASCAddr is valid (means Batman in this case) <47>
|
||
SWIMIOPExists,\ ; SWIMIOPAddr is valid
|
||
SCCIOPExists,\ ; SCCIOPAddr is valid
|
||
OrwellExists,\ ; OrwellAddr is valid <SM62> CSS
|
||
SONICExists,\ ; SONIC is valid <58>
|
||
SCSI96_1Exists,\ ; 1st SCSI96 is valid <58>
|
||
SCSI96_2Exists,\ ; 2nd SCSI96 is valid <58>
|
||
DAFBExists ; has DAFB video <58>
|
||
BitVector32 ; Flags for valid base addresses 32-63
|
||
BitVector32 ; Flags for valid base addresses 64-95
|
||
dc.l \ ; Flags for valid ext feature flags 0-31
|
||
(ClockEgret)|\ ; Has Egret clock/PRAM <58>
|
||
(SoundHasSoundIn)|\ ; Has 8-bit mono sound input <58><LW7>
|
||
(Caboose)|\ ; Caboose firmware <SM4><P1>
|
||
(SoundStereoOut)|\ ; has stereo sound output <58>
|
||
(SoundStereoMixing)|\ ; has stereo mixing <H13>
|
||
(SoundPlayAndRecord)|\ ; can Play and Record simultaneously <H24>
|
||
(KeyswCaboose)|\ ; has a Caboose-flavored power keyswitch <58>
|
||
(ADBIop) ; IOP ADB <58>
|
||
dc.l \ ; Flags for valid ext feature flags 32-63
|
||
(1<<has68kEmulator//32) ; This ROM starts up with a 68k emulator
|
||
dc.l 0 ; Flags for valid ext feature flags 32-63
|
||
dc.b $56,$00,$00,$00 ; Check VIA1 PA6, PA4, PA2, PA1
|
||
dc.b $10,$00,$00,$00 ; VIA1 PA6 = 0, PA4 = 1, PA2 = 0, PA1 = 0
|
||
dc.l VIA1InitQuadra900-InfoRiscQuadra950 ; VIA1 init info
|
||
dc.l VIA2InitQuadra900-InfoRiscQuadra950 ; VIA2 init info
|
||
dc.l SndCntlQuadra900-InfoRiscQuadra950 ; sound control vector table <t23>
|
||
dc.l EgretClockPRAM-InfoRiscQuadra950 ; clock/PRAM vector table <H4>
|
||
dc.l QuadraADBTable-InfoRiscQuadra950 ; ADB/DebugUtil vector table <H14>
|
||
dc.l 0 ; no Power Manager primitives <SM33>
|
||
dc.l Quadra900IntTbl-InfoRiscQuadra950 ; interrupt handlers table <SM38>
|
||
dc.l 0 ; internal modem manager
|
||
dc.w (cpuIDRISC)|\ ; CPU ID: RISC design center
|
||
$1237 ; CPU ID: Risc Card ID is $1237
|
||
dc.w 0 ; spare <SM74>
|
||
dc.l IconInfoQuadra900-InfoRiscQuadra950 ; offset to ICON info <SM74>
|
||
|
||
ENDIF ; {forSmurf}
|
||
|
||
ENDIF ; {hasOrwell}
|
||
|
||
IF forSTP601 THEN
|
||
|
||
|
||
; ProductInfo table STP Quadra 700's
|
||
|
||
ALIGN 4
|
||
InfoSTPQuadra700
|
||
dc.l OrwellDecoderTable-InfoSTPQuadra700 ; offset to decoder info
|
||
dc.l RAMInfo2Bank4Meg-InfoSTPQuadra700 ; offset to ram bank info
|
||
dc.l VideoInfoDAFB-InfoSTPQuadra700 ; DAFB built in video
|
||
dc.l NuBusInfoQuadra700-InfoSTPQuadra700 ; offset to NuBus info
|
||
dc.w 0|\ ; hwCfgFlags
|
||
(1<<hwCbSCSI)|\ ; SCSI port present
|
||
(1<<hwCbClock)|\ ; New clock chip present
|
||
(0<<hwCbFPU)|\ ; FPU chip present.
|
||
(1<<hwCbMMU)|\ ; Some kind of MMU present (see MMUType for what kind).
|
||
(1<<hwCbADB) ; Apple Desktop Bus present.
|
||
dc.b boxSTPQ700 ; product kind
|
||
dc.b OrwellDecoder ; decoder kind
|
||
dc.w $3FFF ; ROM85, New ROMs, Power Off ability.
|
||
dc.b 4 ; default ROM Resource configuration for FPU-based machine <T15><T19>
|
||
dc.b ProductInfoVersion ; ProductInfo version
|
||
BitVector32 \ ; Flags for valid base addresses 0-31
|
||
ROMExists,\ ; ROMAddr is valid
|
||
DiagROMExists,\ ; DiagROMAddr is valid
|
||
VIA1Exists,\ ; VIA1Addr is valid
|
||
VIA2Exists,\ ; VIA2Addr is valid
|
||
SCCRdExists,\ ; SCCRdAddr is valid
|
||
SCCWrExists,\ ; SCCWrAddr is valid
|
||
ASCExists,\ ; ASCAddr is valid (means Batman in this case)
|
||
IWMExists,\ ; IWMAddr is valid
|
||
SCSI96_1Exists,\ ; 1st SCSI96 is valid
|
||
OrwellExists,\ ; OrwellAddr in valid <SM62> CSS
|
||
SONICExists,\ ; SONIC is valid
|
||
DAFBExists ; has DAFB video
|
||
BitVector32 ; Flags for valid base addresses 32-63
|
||
BitVector32 ; Flags for valid base addresses 64-95
|
||
dc.l \ ; Flags for valid ext feature flags 0-31
|
||
(ClockRTC)|\ ; Has RTC clock/PRAM
|
||
(SoundHasSoundIn)|\ ; Has 8-bit mono sound input <LW7>
|
||
(SoundStereoOut)|\ ; has stereo sound output
|
||
(SoundPlayAndRecord)|\ ; can Play and Record simultaneously <H24>
|
||
(1<<hasNewMemMgr)|\ ; hasNewMemMgr support (ie Figment can be switched on)
|
||
(ADBXcvr) ; Has transceiver ADB
|
||
dc.l \ ; Flags for valid ext feature flags 32-63
|
||
(1<<has68kEmulator//32) ; This ROM starts up with a 68k emulator
|
||
dc.l 0 ; Flags for valid ext feature flags 64-95
|
||
dc.b $56,$00,$00,$00 ; Check VIA1 PA6, PA4, PA2, PA1
|
||
dc.b $40,$00,$00,$00 ; VIA1 PA6 = 1, PA4 = 0, PA2 = 0, PA1 = 0
|
||
dc.l VIA1InitQuadra700-InfoSTPQuadra700 ; VIA1 init info
|
||
dc.l VIA2InitQuadra700-InfoSTPQuadra700 ; VIA2 init info
|
||
dc.l SndCntlQuadra700-InfoSTPQuadra700 ; sound control vector table
|
||
dc.l RTCClockPRAM-InfoSTPQuadra700 ; clock/PRAM vector table <H4>
|
||
dc.l ViaADBTable-InfoSTPQuadra700 ; ADB/DebugUtil vector table <H14>
|
||
dc.l 0 ; no Power Manager primitives <SM33>
|
||
dc.l Quadra700IntTbl-InfoSTPQuadra700 ; interrupt handlers table <SM38>
|
||
dc.l 0 ; internal modem manager
|
||
dc.w 0 ; no CPU ID register
|
||
dc.w 0 ; spare <SM74>
|
||
dc.l IconInfoQuadra700-InfoSTPQuadra700 ; offset to ICON info <SM74>
|
||
|
||
|
||
; ProductInfo table STP Quadra 900's
|
||
|
||
ALIGN 4
|
||
InfoSTPQuadra900
|
||
dc.l OrwellDecoderTable-InfoSTPQuadra900 ; offset to decoder info
|
||
dc.l RamInfoQuadra900-InfoSTPQuadra900 ; offset to ram bank info
|
||
dc.l VideoInfoDAFB-InfoSTPQuadra900 ; DAFB built in video <58>
|
||
dc.l NuBusInfoQuadra900-InfoSTPQuadra900 ; offset to NuBus info
|
||
dc.w 0|\ ; hwCfgFlags
|
||
(1<<hwCbSCSI)|\ ; SCSI port present
|
||
(1<<hwCbClock)|\ ; New clock chip present
|
||
(0<<hwCbFPU)|\ ; FPU chip present.
|
||
(1<<hwCbMMU)|\ ; Some kind of MMU present (see MMUType for what kind).
|
||
(1<<hwCbADB) ; Apple Desktop Bus present.
|
||
dc.b boxSTPQ900 ; product kind
|
||
dc.b OrwellDecoder ; decoder kind
|
||
dc.w $3FFF ; ROM85, New ROMs, Power Off ability.
|
||
dc.b 4 ; default ROM Resource configuration for FPU-based machine <T15><T19>
|
||
dc.b ProductInfoVersion ; ProductInfo version
|
||
BitVector32 \ ; Flags for valid base addresses 0-31
|
||
ROMExists,\ ; ROMAddr is valid
|
||
DiagROMExists,\ ; DiagROMAddr is valid
|
||
VIA1Exists,\ ; VIA1Addr is valid
|
||
VIA2Exists,\ ; VIA2Addr is valid
|
||
ASCExists,\ ; ASCAddr is valid (means Batman in this case) <47>
|
||
SWIMIOPExists,\ ; SWIMIOPAddr is valid
|
||
SCCIOPExists,\ ; SCCIOPAddr is valid
|
||
OrwellExists,\ ; OrwellAddr is valid <SM62> CSS
|
||
SONICExists,\ ; SONIC is valid <58>
|
||
SCSI96_1Exists,\ ; 1st SCSI96 is valid <58>
|
||
PatchROMExists,\ ; Patch ROM is valid <H15><SM5>
|
||
SCSI96_2Exists,\ ; 2nd SCSI96 is valid <58>
|
||
DAFBExists ; has DAFB video <58>
|
||
BitVector32 ; Flags for valid base addresses 32-63
|
||
BitVector32 ; Flags for valid base addresses 64-95
|
||
dc.l \ ; Flags for valid ext feature flags 0-31
|
||
(ClockEgret)|\ ; Has Egret clock/PRAM <58>
|
||
(SoundHasSoundIn)|\ ; Has 8-bit mono sound input <58><LW7>
|
||
(Caboose)|\ ; Caboose firmware <SM4><P1>
|
||
(SoundStereoOut)|\ ; has stereo sound output <58>
|
||
(SoundPlayAndRecord)|\ ; can Play and Record simultaneously <H24>
|
||
(KeyswCaboose)|\ ; has a Caboose-flavored power keyswitch <58>
|
||
(1<<hasNewMemMgr)|\ ; hasNewMemMgr support (ie Figment can be switched on)
|
||
(ADBIop) ; IOP ADB <58>
|
||
dc.l \ ; Flags for valid ext feature flags 32-63
|
||
(1<<has68kEmulator//32) ; This ROM starts up with a 68k emulator
|
||
dc.l 0 ; Flags for valid ext feature flags 64-95
|
||
dc.b $56,$00,$00,$00 ; Check VIA1 PA6, PA4, PA2, PA1
|
||
dc.b $50,$00,$00,$00 ; VIA1 PA6 = 1, PA4 = 1, PA2 = 0, PA1 = 0
|
||
dc.l VIA1InitQuadra900-InfoSTPQuadra900 ; VIA1 init info
|
||
dc.l VIA2InitQuadra900-InfoSTPQuadra900 ; VIA2 init info
|
||
dc.l SndCntlQuadra900-InfoSTPQuadra900 ; sound control vector table <t23>
|
||
dc.l EgretClockPRAM-InfoSTPQuadra900 ; clock/PRAM vector table <H4>
|
||
dc.l QuadraADBTable-InfoSTPQuadra900 ; ADB/DebugUtil vector table <H14>
|
||
dc.l 0 ; no Power Manager primitives <SM33>
|
||
dc.l Quadra900IntTbl-InfoSTPQuadra900 ; interrupt handlers table <SM38>
|
||
dc.l 0 ; internal modem manager
|
||
dc.w 0 ; no CPU ID register
|
||
dc.w 0 ; spare <SM74>
|
||
dc.l IconInfoQuadra900-InfoSTPQuadra900 ; offset to ICON info <SM74>
|
||
|
||
|
||
; ProductInfo table STP Quadra 950's
|
||
|
||
ALIGN 4
|
||
InfoSTPQuadra950
|
||
dc.l OrwellDecoderTable-InfoSTPQuadra950 ; offset to decoder info
|
||
dc.l RamInfoQuadra900-InfoSTPQuadra950 ; offset to ram bank info
|
||
dc.l VideoInfoDAFB-InfoSTPQuadra950 ; DAFB built in video
|
||
dc.l NuBusInfoQuadra900-InfoSTPQuadra950 ; offset to NuBus info
|
||
dc.w 0|\ ; hwCfgFlags
|
||
(1<<hwCbSCSI)|\ ; SCSI port present
|
||
(1<<hwCbClock)|\ ; New clock chip present
|
||
(0<<hwCbFPU)|\ ; FPU chip present.
|
||
(1<<hwCbMMU)|\ ; Some kind of MMU present (see MMUType for what kind).
|
||
(1<<hwCbADB) ; Apple Desktop Bus present.
|
||
dc.b boxSTPQ950 ; product kind
|
||
dc.b OrwellDecoder ; decoder kind
|
||
dc.w $3FFF ; ROM85, New ROMs, Power Off ability.
|
||
dc.b 4 ; default ROM Resource configuration for FPU-based machine <T15><T19>
|
||
dc.b ProductInfoVersion ; ProductInfo version
|
||
BitVector32 \ ; Flags for valid base addresses 0-31
|
||
ROMExists,\ ; ROMAddr is valid
|
||
DiagROMExists,\ ; DiagROMAddr is valid
|
||
VIA1Exists,\ ; VIA1Addr is valid
|
||
VIA2Exists,\ ; VIA2Addr is valid
|
||
ASCExists,\ ; ASCAddr is valid (means Batman in this case) <47>
|
||
SWIMIOPExists,\ ; SWIMIOPAddr is valid
|
||
SCCIOPExists,\ ; SCCIOPAddr is valid
|
||
OrwellExists,\ ; OrwellAddr is valid <SM62> CSS
|
||
SONICExists,\ ; SONIC is valid <58>
|
||
SCSI96_1Exists,\ ; 1st SCSI96 is valid <58>
|
||
SCSI96_2Exists,\ ; 2nd SCSI96 is valid <58>
|
||
PatchROMExists,\ ; Patch ROM is valid <H15><SM5>
|
||
DAFBExists ; has DAFB video <58>
|
||
BitVector32 ; Flags for valid base addresses 32-63
|
||
BitVector32 ; Flags for valid base addresses 64-95
|
||
dc.l \ ; Flags for valid ext feature flags 0-31
|
||
(ClockEgret)|\ ; Has Egret clock/PRAM <58>
|
||
(SoundHasSoundIn)|\ ; Has 8-bit mono sound input <58><LW7>
|
||
(Caboose)|\ ; Caboose firmware <SM4><P1>
|
||
(SoundStereoOut)|\ ; has stereo sound output <58>
|
||
(SoundStereoMixing)|\ ; has stereo mixing <H13>
|
||
(SoundPlayAndRecord)|\ ; can Play and Record simultaneously <H24>
|
||
(KeyswCaboose)|\ ; has a Caboose-flavored power keyswitch <58>
|
||
(1<<hasNewMemMgr)|\ ; hasNewMemMgr support (ie Figment can be switched on)
|
||
(ADBIop) ; IOP ADB <58>
|
||
dc.l \ ; Flags for valid ext feature flags 32-63
|
||
(1<<has68kEmulator//32) ; This ROM starts up with a 68k emulator
|
||
dc.l 0 ; Flags for valid ext feature flags 64-95
|
||
dc.b $56,$00,$00,$00 ; Check VIA1 PA6, PA4, PA2, PA1
|
||
dc.b $10,$00,$00,$00 ; VIA1 PA6 = 0, PA4 = 1, PA2 = 0, PA1 = 0
|
||
dc.l VIA1InitQuadra900-InfoSTPQuadra950 ; VIA1 init info
|
||
dc.l VIA2InitQuadra900-InfoSTPQuadra950 ; VIA2 init info
|
||
dc.l SndCntlQuadra900-InfoSTPQuadra950 ; sound control vector table <t23>
|
||
dc.l EgretClockPRAM-InfoSTPQuadra950 ; clock/PRAM vector table <H4>
|
||
dc.l QuadraADBTable-InfoSTPQuadra950 ; ADB/DebugUtil vector table <H14>
|
||
dc.l 0 ; no Power Manager primitives <SM33>
|
||
dc.l Quadra900IntTbl-InfoSTPQuadra950 ; interrupt handlers table <SM38>
|
||
dc.l 0 ; internal modem manager
|
||
dc.w 0 ; no CPU ID register
|
||
dc.w 0 ; spare <SM74>
|
||
dc.l IconInfoQuadra900-InfoSTPQuadra950 ; offset to ICON info <SM74>
|
||
|
||
|
||
ENDIF ; {forSTP601}
|
||
|
||
|
||
|
||
IF hasJaws THEN
|
||
IMPORT SndCntlPB170, JawsPmgrPrims, JawsIntTbl
|
||
|
||
ALIGN 4
|
||
InfoPowerBook170 ; table for PowerBook 140 and 170 <8>
|
||
dc.l JAWSTable-InfoPowerBook170 ; offset to decoder info
|
||
dc.l RAMInfoJaws-InfoPowerBook170 ; offset to ram bank info
|
||
dc.l VideoInfoJaws-InfoPowerBook170 ; offset to video info
|
||
dc.l NuBusInfoJaws-InfoPowerBook170 ; offset to NuBus info
|
||
dc.w 0|\ ; hwCfgFlags
|
||
(1<<hwCbSCSI)|\ ; SCSI port present
|
||
(1<<hwCbClock)|\ ; New clock chip present
|
||
(1<<hwCbFPU)|\ ; FPU chip present.
|
||
(1<<hwCbMMU)|\ ; Some kind of MMU present (see MMUType for what kind).
|
||
(1<<hwCbADB)|\ ; Apple Desktop Bus present.
|
||
(1<<hwCbPwrMgr) ; Power Manager present
|
||
dc.b boxPowerBook170 ; product kind
|
||
dc.b JAWSDecoder ; decoder kind
|
||
dc.w $3FFF ; ROM85, New ROMs, Power Off ability.
|
||
dc.b 4 ; default ROM Resource configuration
|
||
dc.b ProductInfoVersion ; ProductInfo version
|
||
BitVector32 \ ; Flags for valid base addresses 0-31
|
||
ROMExists,\ ; ROMAddr is valid
|
||
DiagROMExists,\ ; DiagROMAddr is valid
|
||
VIA1Exists,\ ; VIA1Addr is valid
|
||
SCCRdExists,\ ; SCCRdAddr is valid
|
||
SCCWrExists,\ ; SCCWrAddr is valid
|
||
IWMExists,\ ; IWMAddr is valid
|
||
SCSIExists,\ ; SCSIAddr is valid
|
||
SCSIDackExists,\ ; SCSIDackAddr is valid
|
||
SCSIHskExists,\ ; SCSIHskAddr is valid
|
||
VIA2Exists,\ ; VIA2Addr is valid
|
||
ASCExists,\ ; ASCAddr is valid
|
||
JAWSExists ; JAWSAddr is valid
|
||
BitVector32 ; Flags for valid base addresses 32-63
|
||
BitVector32 ; Flags for valid base addresses 64-95
|
||
dc.l \ ; Flags for valid ext feature flags 0-31
|
||
(ClockRTC)|\ ; Has RTC clock/PRAM <H4>
|
||
(ADBPwrMgr)|\ ; PowerManager ADB <5>
|
||
(SoundHasSoundIn)|\ ; Has 8-bit mono sound input <T16><LW7>
|
||
(SoundStereoOut)|\ ; has stereo sound output <t32>
|
||
(SoundStereoMixing)|\ ; has stereo mixing <H13>
|
||
(SoundPlayAndRecord)|\ ; can Play and Record simultaneously <H24>
|
||
(1<<SupportsIdle) ; and has idle
|
||
dc.l 0 ; Flags for valid ext feature flags 32-63
|
||
dc.l 0 ; Flags for valid ext feature flags 64-95
|
||
dc.b $56,$00,$00,$00 ; Check VIA1 PA6, PA4, PA2, PA1
|
||
dc.b $12,$00,$00,$00 ; VIA1 PA6 = 0, PA4 = 1, PA2 = 0, PA1 = 1
|
||
dc.l VIA1InitJaws-InfoPowerBook170 ; VIA1 init info
|
||
dc.l VIA2InitJaws-InfoPowerBook170 ; VIA2 init info
|
||
dc.l SndCntlPB170-InfoPowerBook170 ; sound control vector table<t23> djw
|
||
dc.l RTCClockPRAM-InfoPowerBook170 ; clock/PRAM vector table <H4>
|
||
dc.l PMGRADBTable-InfoPowerBook170 ; ADB/DebugUtil vector table<H14>
|
||
dc.l JawsPmgrPrims-InfoPowerBook170 ; Power Manager primitives <SM33>
|
||
dc.l JawsIntTbl-InfoPowerBook170 ; interrupt handlers table <SM38>
|
||
dc.l 0 ; internal modem manager
|
||
dc.w 0 ; no CPU ID register
|
||
dc.w 0 ; spare <SM74>
|
||
dc.l IconInfoTIM-InfoPowerBook170 ; offset to ICON info <SM74>
|
||
|
||
|
||
ALIGN 4
|
||
InfoJAWSUnknown
|
||
dc.l JAWSTable-InfoJAWSUnknown ; offset to decoder info <25>
|
||
dc.l RamInfoJAWS-InfoJAWSUnknown ; offset to ram bank info
|
||
dc.l VideoInfoJaws-InfoJAWSUnknown ; offset to video info
|
||
dc.l NuBusInfoJaws-InfoJAWSUnknown ; offset to NuBus info
|
||
dc.w 0|\ ; hwCfgFlags
|
||
(1<<hwCbSCSI)|\ ; SCSI port present
|
||
(1<<hwCbClock)|\ ; New clock chip present
|
||
(1<<hwCbFPU)|\ ; FPU chip present.
|
||
(1<<hwCbMMU)|\ ; Some kind of MMU present (see MMUType for what kind).
|
||
(1<<hwCbADB)|\ ; Apple Desktop Bus present.
|
||
(1<<hwCbPwrMgr) ; Power Manager present
|
||
dc.b BoxUnknown ; product kind
|
||
dc.b JAWSDecoder ; decoder kind
|
||
dc.w $3FFF ; ROM85, New ROMs, Power Off ability.
|
||
dc.b 2 ; default ROM Resource configuration <2.1>
|
||
dc.b ProductInfoVersion ; ProductInfo version
|
||
BitVector32 ; use default bases for this decoder
|
||
BitVector32 ; Flags for valid base addresses 32-63
|
||
BitVector32 ; Flags for valid base addresses 64-95
|
||
dc.l 0 ; use default external features for this decoder
|
||
dc.l 0 ; Flags for valid ext feature flags 32-63
|
||
dc.l 0 ; Flags for valid ext feature flags 64-95
|
||
dc.b $00,$00,$00,$00 ; don't check any VIA bits
|
||
dc.b $00,$00,$00,$00 ; anything with this decoder matches
|
||
dc.l VIA1InitJaws-InfoJAWSUnknown ; VIA1 init info
|
||
dc.l VIA2InitJaws-InfoJAWSUnknown ; VIA2 init info
|
||
dc.l 0 ; no sound control vector table
|
||
dc.l RTCClockPRAM-InfoJAWSUnknown ; clock/PRAM vector table <H4>
|
||
dc.l PMGRADBTable-InfoJAWSUnknown ; ADB/DebugUtil vector table <H14>
|
||
dc.l JawsPmgrPrims-InfoJAWSUnknown ; Power Manager primitives <SM33>
|
||
dc.l JawsIntTbl-InfoJAWSUnknown ; interrupt handlers table <SM38>
|
||
dc.l 0 ; internal modem manager
|
||
dc.w 0 ; no CPU ID register
|
||
dc.w 0 ; no CPU ID register
|
||
dc.l IconInfoTIM-InfoJAWSUnknown ; offset to ICON info <SM74>
|
||
|
||
ENDIF ; {hasJaws}
|
||
|
||
|
||
|
||
IF hasVISADecoder THEN
|
||
IMPORT SndCntlLC, RBVEgretIntTbl
|
||
|
||
ALIGN 4
|
||
InfoMacLC
|
||
dc.l VISADecoderTable-InfoMacLC ; offset to decoder info
|
||
dc.l RamInfoVISA-InfoMacLC ; offset to ram bank info
|
||
dc.l VideoInfoVISA-InfoMacLC ; offset to video info
|
||
dc.l NuBusInfoVISA-InfoMacLC ; offset to NuBus info
|
||
dc.w 0|\ ; hwCfgFlags
|
||
(1<<hwCbSCSI)|\ ; SCSI port present
|
||
(1<<hwCbClock)|\ ; New clock chip present <?, Elsie has yet another clock>
|
||
(1<<hwCbFPU)|\ ; FPU chip present.
|
||
(1<<hwCbMMU)|\ ; Some kind of MMU present (see MMUType for what kind).
|
||
(1<<hwCbADB) ; Apple Desktop Bus present.
|
||
dc.b boxMacLCII ; product kind <SM25>
|
||
dc.b VISADecoder ; decoder kind
|
||
dc.w $3FFF ; ROM85, New ROMs, no Power Off ability.
|
||
dc.b 4 ; default ROM Resource configuration
|
||
dc.b ProductInfoVersion ; ProductInfo version
|
||
BitVector32 \ ; Flags for valid base addresses 0-31
|
||
ROMExists,\ ; ROMAddr is valid
|
||
DiagROMExists,\ ; DiagROMAddr is valid
|
||
VIA1Exists,\ ; VIA1Addr is valid
|
||
SCCRdExists,\ ; SCCRdAddr is valid
|
||
SCCWrExists,\ ; SCCWrAddr is valid
|
||
IWMExists,\ ; IWMAddr is valid
|
||
SCSIExists,\ ; SCSIAddr is valid
|
||
SCSIDackExists,\ ; SCSIDackAddr is valid
|
||
SCSIHskExists,\ ; SCSIHskAddr is valid
|
||
ASCExists,\ ; ASCAddr is valid
|
||
RBVExists,\ ; RBVAddr is valid
|
||
VDACExists ; VDACAddr is valid
|
||
BitVector32 ; Flags for valid base addresses 32-63
|
||
BitVector32 ; Flags for valid base addresses 64-95
|
||
dc.l \ ; Flags for valid ext feature flags 0-31
|
||
(ClockEgret)|\ ; Has Egret clock/pram
|
||
(ADBEgret)|\ ; Egret ADB
|
||
(Egret8)|\ ; Egret Eight firmware <SM4><P1>
|
||
(1<<V8ChipBit)|\ ; and VISA variant of RBV/MDU <14><15>
|
||
(SoundHasSoundIn)|\ ; Has 8-bit mono sound input <23><SM27><LW7>
|
||
(1<<SupportsROMDisk)|\ ; supports ROM disk (Ginty) <SM27>
|
||
(1<<hasHardPowerOff) ; hasHardPowerOff is valid <SM32>
|
||
dc.l 0 ; Flags for valid ext feature flags 32-63
|
||
dc.l 0 ; Flags for valid ext feature flags 64-95
|
||
dc.b $56,$00,$00,$00 ; Check VIA1 PA6, PA4, PA2, PA1
|
||
dc.b $54,$00,$00,$00 ; VIA1 PA6 = 1, PA4 = 1, PA2 = 1, PA1 = 0
|
||
dc.l VIA1InitMacLC-InfoMacLC ; VIA1 init info
|
||
dc.l 0 ; no VIA2 init info
|
||
dc.l SndCntlLC-InfoMacLC ; sound control vector table <SM17>
|
||
dc.l EgretClockPRAM-InfoMacLC ; clock/PRAM vector table <H4>
|
||
dc.l EgretADBTable-InfoMacLC ; ADB/DebugUtil vector table <H14>
|
||
dc.l 0 ; no Power Manager primitives <SM33>
|
||
dc.l RBVEgretIntTbl-InfoMacLC ; interrupt handlers table <SM38>
|
||
dc.l 0 ; internal modem manager
|
||
dc.w 0 ; no CPU ID register
|
||
dc.w 0 ; spare <SM74>
|
||
dc.l IconInfoMacLC-InfoMacLC ; offset to ICON info <SM74>
|
||
|
||
|
||
|
||
ALIGN 4
|
||
InfoVISAUnknown
|
||
dc.l VISADecoderTable-InfoVISAUnknown ; offset to decoder info
|
||
dc.l RamInfoVISA-InfoVISAUnknown ; offset to ram bank info
|
||
dc.l VideoInfoVISA-InfoVISAUnknown ; offset to video info
|
||
dc.l NuBusInfoVISA-InfoVISAUnknown ; offset to NuBus info
|
||
dc.w 0|\ ; hwCfgFlags
|
||
(1<<hwCbSCSI)|\ ; SCSI port present
|
||
(1<<hwCbClock)|\ ; New clock chip present
|
||
(1<<hwCbMMU)|\ ; Some kind of MMU present (see MMUType for what kind).
|
||
(1<<hwCbADB) ; Apple Desktop Bus present.
|
||
dc.b BoxUnknown ; product kind
|
||
dc.b VISADecoder ; decoder kind
|
||
dc.w $7FFF ; ROM85, New ROMs, no Power Off ability.
|
||
dc.b 4 ; default ROM Resource configuration
|
||
dc.b ProductInfoVersion ; ProductInfo version
|
||
BitVector32 ; use default bases for this decoder
|
||
BitVector32 ; Flags for valid base addresses 32-63
|
||
BitVector32 ; Flags for valid base addresses 64-95
|
||
dc.l 0 ; use default external features for this decoder
|
||
dc.l 0 ; Flags for valid ext feature flags 32-63
|
||
dc.l 0 ; Flags for valid ext feature flags 64-95
|
||
dc.b $00,$00,$00,$00 ; don't check any VIA bits
|
||
dc.b $00,$00,$00,$00 ; anything with this decoder matches
|
||
dc.l VIA1InitMacLC-InfoVISAUnknown ; VIA1 init info
|
||
dc.l 0 ; no VIA2 init info
|
||
dc.l 0 ; no sound control vector table
|
||
dc.l EgretClockPRAM-InfoVISAUnknown ; clock/PRAM vector table <H4>
|
||
dc.l EgretADBTable-InfoVISAUnknown ; ADB/DebugUtil vector table<H14>
|
||
dc.l 0 ; no Power Manager primitives <SM33>
|
||
dc.l RBVEgretIntTbl-InfoVISAUnknown ; interrupt handlers table <SM38>
|
||
dc.l 0 ; internal modem manager
|
||
dc.w 0 ; no CPU ID register
|
||
dc.w 0 ; spare <SM74>
|
||
dc.l IconInfoMacLC-InfoVISAUnknown ; offset to ICON info <SM74>
|
||
|
||
|
||
ENDIF ; {hasVISADecoder}
|
||
|
||
|
||
|
||
IMPORT VIAIntTbl
|
||
InfoUnknownUnknown
|
||
dc.l UnknownDecoderTable-InfoUnknownUnknown ; offset to decoder info
|
||
dc.l 0 ; no ram bank info
|
||
dc.l 0 ; no built in video
|
||
dc.l 0 ; no NuBus info
|
||
dc.w 0 ; hwCfgFlags
|
||
dc.b BoxUnknown ; product kind
|
||
dc.b UnknownDecoder ; decoder kind
|
||
dc.w $FFFF ; ROM85
|
||
dc.b 1 ; default ROM Resource configuration <2.1>
|
||
dc.b ProductInfoVersion ; ProductInfo version
|
||
BitVector32 ; use default bases for this decoder
|
||
BitVector32 ; Flags for valid base addresses 32-63
|
||
BitVector32 ; Flags for valid base addresses 64-95
|
||
dc.l 0 ; use default external features for this decoder
|
||
dc.l 0 ; Flags for valid ext feature flags 32-63
|
||
dc.l 0 ; Flags for valid ext feature flags 64-95
|
||
dc.b $00,$00,$00,$00 ; don't check any VIA bits
|
||
dc.b $00,$00,$00,$00 ; anything with this decoder matches
|
||
dc.l 0 ; no VIA1 to init
|
||
dc.l 0 ; no VIA2 to init
|
||
dc.l 0 ; no sound control vector table <t21>
|
||
dc.l RTCClockPRAM-InfoUnknownUnknown ; clock/PRAM vector table <H4>
|
||
dc.l 0 ; no ADB/DebugUtil vector table
|
||
dc.l 0 ; no Power Manager primitives <SM33>
|
||
dc.l VIAIntTbl-InfoUnknownUnknown ; interrupt handlers table <SM38>
|
||
dc.l 0 ; internal modem manager
|
||
dc.w 0 ; no CPU ID register
|
||
dc.w 0 ; spare <SM74>
|
||
dc.l 0 ; no Icon info <SM74>
|
||
|
||
|
||
|
||
;———————————————————————————————————————————————————————————————————————————————————————————————
|
||
;
|
||
; Decoder Tables
|
||
;
|
||
;———————————————————————————————————————————————————————————————————————————————————————————————
|
||
|
||
ALIGN 16
|
||
|
||
IF hasPratt THEN
|
||
;-----------------------------------------------------------------------------------------
|
||
; Pratt Decoder
|
||
;-----------------------------------------------------------------------------------------
|
||
BitVector32 \ ; Flags for valid base addresses 0-31
|
||
ROMExists,\ ; ROMAddr is valid
|
||
DiagROMExists,\ ; DiagROMAddr is valid
|
||
VIA1Exists,\ ; VIA1Addr is valid
|
||
SCCRdExists,\ ; SCCRdAddr is valid
|
||
SCCWrExists,\ ; SCCWrAddr is valid
|
||
IWMExists,\ ; IWMAddr is valid
|
||
SCSIExists,\ ; SCSIAddr is valid
|
||
SCSIDackExists,\ ; SCSIDackAddr is valid
|
||
SCSIHskExists,\ ; SCSIHskAddr is valid
|
||
VIA2Exists,\ ; VIA2Addr is valid
|
||
ASCExists,\ ; ASCAddr is valid
|
||
VDACExists,\ ; VDAC (CSC) is valid
|
||
SONICExists ; SONIC is valid
|
||
BitVector32 \ ; Flags for valid base addresses 32-63
|
||
SingerExists,\ ; PrattAddr is valid
|
||
PrattExists ; SingerAddr is valid
|
||
BitVector32 ; Default valid addresses 64-95
|
||
dc.l \ ; Default ext features 0-31
|
||
(ADBPwrMgr)|\ ; PMGR ADB
|
||
(ClockPwrMgr)|\ ; PMGR clock/pram
|
||
(SoundHasSoundIn)|\ ; Has 8-bit mono sound input <LW7>
|
||
(Sound16Bit)|\ ; has 16-bit hardware
|
||
(SoundStereoOut)|\ ; has stereo sound output
|
||
(SoundPlayAndRecord)|\ ; can Play and Record simultaneously
|
||
(1<<SoundLineLevel)|\ ; requires line level on sound input port
|
||
(1<<SupportsIdle) ; and has idle
|
||
dc.l 0 ; Default ext features 32-63
|
||
dc.l 0 ; Default ext features 64-95
|
||
dc.b $00,$00,$00,$00 ; no special VIA bits to avoid changing
|
||
dc.l 0 ; no identify routine - supports CPU ID reg
|
||
dc.b PrattDecoder
|
||
dc.b DecoderInfoVersion ; DecoderInfo version
|
||
dcb.b 3,0
|
||
dc.l $50F80000 ; Pratt Base Address
|
||
PrattTable dc.l $40000000 ; ROM - valid
|
||
dc.l $58000000 ; DiagROM - valid
|
||
dc.l $50F00000 ; VIA1 - valid
|
||
dc.l $50F04000 ; SCC read - valid
|
||
dc.l $50F04000 ; SCC write - valid
|
||
dc.l $50F16000 ; IWM - valid
|
||
dc.l $00000000 ; PWM - unused
|
||
dc.l $00000000 ; Sound - unused
|
||
dc.l $50F10000 ; SCSI - optional
|
||
dc.l $50F06000 ; SCSIDack - optional
|
||
dc.l $50F06000 ; SCSIHsk - optional
|
||
dc.l $50F02000 ; VIA2 - valid
|
||
dc.l $50F14000 ; ASC - valid
|
||
dc.l $00000000 ; RBV - unused
|
||
dc.l $50f20000 ; VDAC (CSC) - valid
|
||
dc.l $00000000 ; SCSIDMA - unused
|
||
dc.l $00000000 ; SWIMIOP - unused
|
||
dc.l $00000000 ; SCCIOP - unused
|
||
dc.l $00000000 ; OSS - unused
|
||
dc.l $00000000 ; FMC - unused
|
||
dc.l $00000000 ; RPU - unused
|
||
dc.l $00000000 ; Orwell - unused
|
||
dc.l $00000000 ; JAWS - unused
|
||
dc.l $50f0a000 ; Sonic - valid
|
||
dc.l $00000000 ; 1st (internal) SCSI96 - unused
|
||
dc.l $00000000 ; 2nd (external) SCSI96 - unused
|
||
dc.l $00000000 ; DAFB - unused
|
||
dc.l $00000000 ; PSCAddr - unused
|
||
dc.l $00000000 ; ROMPhysAddr - unused
|
||
dc.l $00000000 ; PatchROMAddr - unused
|
||
dc.l $50140000 ; SingerAddr - valid
|
||
dc.l $50080000 ; Pratt Base Address
|
||
|
||
|
||
ENDIF ; {hasPratt}
|
||
|
||
IF hasHMC THEN ; <SM46>
|
||
|
||
;-----------------------------------------------------------------------------------------
|
||
; HMC Decoder (PDM) <SM21>
|
||
;-----------------------------------------------------------------------------------------
|
||
BitVector32 \ ; Default valid addresses 0-31
|
||
ROMExists,\ ; ROMAddr is valid
|
||
VIA1Exists,\ ; VIA1Addr is valid
|
||
RBVExists,\ ; RBVAddr is valid
|
||
SCCRdExists,\ ; SCCRdAddr may be valid
|
||
SCCWrExists,\ ; SCCWrAddr may be valid
|
||
ASCExists,\ ; ASC isn't valid, but say it is
|
||
SCSI96_1Exists ; 1st SCSI96 is valid
|
||
BitVector32 \ ; Default valid addresses 32-63
|
||
AwacsExists,\ ; AwacsAddr exists
|
||
MaceExists, \ ; MACE exists
|
||
AMICExists,\ ; AMIC DMA IO controller exists <SM55>
|
||
SWIM3Exists,\ ; SWIM3 DMA floppy controller exists <SM56>
|
||
BartExists ; BART (NuBus controller) may exist <SM83>
|
||
BitVector32 ; Default valid addresses 64-95
|
||
dc.l \ ; Flags for valid ext feature flags 0-31
|
||
(ClockEgret)|\ ; Has Egret clock/pram
|
||
(ADBEgret)|\ ; Egret ADB
|
||
(Cuda)|\ ; Cuda firmware
|
||
(Sound16Bit)|\ ; Has 16-bit mono/stereo sound input
|
||
(SoundStereoOut)|\ ; has stereo sound output
|
||
(1<<hasHardPowerOff)|\ ; hasHardPowerOff is valid
|
||
(1<<hasNewMemMgr) ; hasNewMemMgr support (ie Figment can be switched on)
|
||
dc.l \ ; Flags for valid ext feature flags 32-63
|
||
(1<<has68kEmulator//32) ; This ROM starts up with a 68k emulator
|
||
dc.l 0 ; Default ext features 64-95
|
||
dc.b $00,$C0,$00,$00 ; dont trigger SoftIRQ, A/UX interrupt scheme
|
||
dc.l 0 ; no routine to identify this map
|
||
dc.b HMCDecoder
|
||
dc.b DecoderInfoVersion ; DecoderInfo version
|
||
dcb.b 2,0
|
||
dc.l $50F40000 ; HMC Base Address
|
||
HMCDecoderTable ; PDM Memory Map
|
||
dc.l $40800000 ; ROM - valid
|
||
dc.l $00000000 ; DiagROM - unused
|
||
dc.l $50F00000 ; VIA1 - valid
|
||
dc.l $50F04000 ; SCC read - valid
|
||
dc.l $50F04000 ; SCC write - valid
|
||
dc.l $00000000 ; IWM - unused
|
||
dc.l $00000000 ; PWM - unused
|
||
dc.l $00000000 ; Sound - unused
|
||
dc.l $00000000 ; SCSI - unused
|
||
dc.l $00000000 ; SCSIDack - unused
|
||
dc.l $00000000 ; SCSIHsk - unused
|
||
dc.l $00000000 ; VIA2 - unused
|
||
dc.l $40800000 ; ASC - fake addr
|
||
dc.l $50F26000 ; RBV - valid
|
||
dc.l $50F24000 ; VDAC - valid
|
||
dc.l $00000000 ; SCSIDMA - unused
|
||
dc.l $00000000 ; SWIMIOP - unused
|
||
dc.l $00000000 ; SCCIOP - unused
|
||
dc.l $00000000 ; OSS - unused
|
||
dc.l $00000000 ; FMC - unused
|
||
dc.l $00000000 ; RPU - unused
|
||
dc.l $00000000 ; unused 21
|
||
dc.l $00000000 ; JAWS - unused
|
||
dc.l $00000000 ; Sonic - unused
|
||
dc.l $50F10000 ; 1st (internal) SCSI96 - valid
|
||
dc.l $00000000 ; 2nd (external) SCSI96 - unused
|
||
dc.l $00000000 ; DAFB - unused
|
||
dc.l $00000000 ; unused 27
|
||
dc.l $00000000 ; ROMPhysAddr - unused
|
||
dc.l $00000000 ; PatchRomAddr - unused
|
||
dc.l $00000000 ; unused 30
|
||
dc.l $00000000 ; unused 31
|
||
|
||
dc.l $00000000 ; SingerAddr unused 32
|
||
dc.l $00000000 ; DSPAddr unused 33
|
||
dc.l $50F0A000 ; MACEAddr - valid
|
||
dc.l $00000000 ; MuniAddr unused 35
|
||
dc.l $50F31000 ; Base of AMIC DMA controller (PDM) <SM37)
|
||
dc.l $00000000 ; Base of Pratt decoder
|
||
dc.l $50F16000 ; Base of SWIM3 chip <SM56>
|
||
dc.l $50F14000 ; Base of AWACS
|
||
dc.l $00000000 ; Base of Civic
|
||
dc.l $00000000 ; Base of Sebastian
|
||
dc.l $F0000000 ; Base of BART
|
||
|
||
;-----------------------------------------------------------------------------------------
|
||
; HMC Decoder (ColdFusion - differs from PDM only in SCSI & soft power) <SM81>
|
||
;-----------------------------------------------------------------------------------------
|
||
BitVector32 \ ; Default valid addresses 0-31
|
||
ROMExists,\ ; ROMAddr is valid
|
||
VIA1Exists,\ ; VIA1Addr is valid
|
||
RBVExists,\ ; RBVAddr is valid
|
||
SCCRdExists,\ ; SCCRdAddr may be valid
|
||
SCCWrExists,\ ; SCCWrAddr may be valid
|
||
ASCExists,\ ; ASC isn't valid, but say it is
|
||
SCSI96_1Exists,\ ; Internal 53CF96 is valid
|
||
SCSI96_2Exists ; External 53C96 (curio) is valid
|
||
BitVector32 \ ; Default valid addresses 32-63
|
||
AwacsExists,\ ; AwacsAddr exists
|
||
MaceExists, \ ; MACE exists
|
||
AMICExists,\ ; AMIC DMA IO controller exists <SM55>
|
||
SWIM3Exists,\ ; SWIM3 DMA floppy controller exists <SM56>
|
||
BartExists ; BART (NuBus controller) may exist <MC4><MC6>
|
||
BitVector32 ; Default valid addresses 64-95
|
||
dc.l \ ; Flags for valid ext feature flags 0-31
|
||
(ClockEgret)|\ ; Has Egret clock/pram
|
||
(ADBEgret)|\ ; Egret ADB
|
||
(Cuda)|\ ; Cuda firmware
|
||
(Sound16Bit)|\ ; Has 16-bit mono/stereo sound input
|
||
(SoundStereoOut)|\ ; has stereo sound output
|
||
(1<<hasNewMemMgr) ; hasNewMemMgr support (ie Figment can be switched on)
|
||
dc.l \ ; Flags for valid ext feature flags 32-63
|
||
(1<<has68kEmulator//32) ; This ROM starts up with a 68k emulator
|
||
dc.l 0 ; Default ext features 64-95
|
||
dc.b $00,$C0,$00,$00 ; dont trigger SoftIRQ, A/UX interrupt scheme
|
||
dc.l 0 ; no routine to identify this map
|
||
dc.b HMCDecoder
|
||
dc.b DecoderInfoVersion ; DecoderInfo version
|
||
dcb.b 2,0
|
||
dc.l $50F40000 ; HMC Base Address
|
||
HMCcfDecoderTable ; PDM Memory Map
|
||
dc.l $40800000 ; ROM - valid
|
||
dc.l $00000000 ; DiagROM - unused
|
||
dc.l $50F00000 ; VIA1 - valid
|
||
dc.l $50F04000 ; SCC read - valid
|
||
dc.l $50F04000 ; SCC write - valid
|
||
dc.l $00000000 ; IWM - unused
|
||
dc.l $00000000 ; PWM - unused
|
||
dc.l $00000000 ; Sound - unused
|
||
dc.l $00000000 ; SCSI - unused
|
||
dc.l $00000000 ; SCSIDack - unused
|
||
dc.l $00000000 ; SCSIHsk - unused
|
||
dc.l $00000000 ; VIA2 - unused
|
||
dc.l $40800000 ; ASC - fake addr
|
||
dc.l $50F26000 ; RBV - valid
|
||
dc.l $50F24000 ; VDAC - valid
|
||
dc.l $00000000 ; SCSIDMA - unused
|
||
dc.l $00000000 ; SWIMIOP - unused
|
||
dc.l $00000000 ; SCCIOP - unused
|
||
dc.l $00000000 ; OSS - unused
|
||
dc.l $00000000 ; FMC - unused
|
||
dc.l $00000000 ; RPU - unused
|
||
dc.l $00000000 ; unused 21
|
||
dc.l $00000000 ; JAWS - unused
|
||
dc.l $00000000 ; Sonic - unused
|
||
dc.l $50F11000 ; 1st (internal) SCSICF96 - valid
|
||
dc.l $50F10000 ; 2nd (external) SCSIC96 - valid
|
||
dc.l $00000000 ; DAFB - unused
|
||
dc.l $00000000 ; unused 27
|
||
dc.l $00000000 ; ROMPhysAddr - unused
|
||
dc.l $00000000 ; PatchRomAddr - unused
|
||
dc.l $00000000 ; unused 30
|
||
dc.l $00000000 ; unused 31
|
||
|
||
dc.l $00000000 ; SingerAddr unused 32
|
||
dc.l $00000000 ; DSPAddr unused 33
|
||
dc.l $50F0A000 ; MACEAddr - valid
|
||
dc.l $00000000 ; MuniAddr unused 35
|
||
dc.l $50F31000 ; Base of AMIC DMA controller (PDM) <SM37)
|
||
dc.l $00000000 ; Base of Pratt decoder
|
||
dc.l $50F16000 ; Base of SWIM3 chip <SM56>
|
||
dc.l $50F14000 ; Base of AWACS
|
||
dc.l $00000000 ; Base of Civic
|
||
dc.l $00000000 ; Base of Sebastian
|
||
dc.l $F0000000 ; Base of BART
|
||
ENDIF ; hasHMC <SM46>
|
||
|
||
|
||
IF hasOrwell THEN
|
||
IMPORT CheckForOrwell
|
||
;-----------------------------------------------------------------------------------------
|
||
; Orwell Decoder
|
||
;-----------------------------------------------------------------------------------------
|
||
IF forSmurf THEN
|
||
BitVector32 \ ; Default valid addresses 0-31
|
||
ROMExists,\ ; ROMAddr is valid
|
||
DiagROMExists,\ ; DiagROMAddr is valid
|
||
VIA1Exists,\ ; VIA1Addr is valid
|
||
VIA2Exists,\ ; VIA2Addr is valid
|
||
ASCExists,\ ; ASCAddr is valid
|
||
SCCRdExists,\ ; SCCRdAddr may be valid
|
||
SCCWrExists,\ ; SCCWrAddr may be valid
|
||
SWIMIOPExists,\ ; SWIMIOPAddr may be valid
|
||
SCCIOPExists,\ ; SCCIOPAddr may be valid
|
||
SCSI96_1Exists,\ ; 1st SCSI96 is valid
|
||
OrwellExists,\ ; Orwell MCA is valid <SM62> CSS
|
||
SONICExists,\ ; SONIC is valid on the Smurf Card
|
||
DAFBExists ; DAFB video is valid
|
||
BitVector32 ; Default valid addresses 32-63
|
||
BitVector32 ; Default valid addresses 64-95
|
||
dc.l 0 ; Default ext features 0-31
|
||
dc.l \ ; Flags for valid ext feature flags 32-63
|
||
(1<<has68kEmulator//32) ; This ROM starts up with a 68k emulator
|
||
dc.l 0 ; Default ext features 64-95
|
||
dc.b $00,$C0,$00,$00 ; dont trigger SoftIRQ, A/UX interrupt scheme
|
||
dc.l CheckForOrwell-OrwellDecoderTable ; routine to identify this map
|
||
dc.b OrwellDecoder
|
||
dc.b DecoderInfoVersion ; DecoderInfo version
|
||
dcb.b 2,0
|
||
dc.l $5000E000 ; Orwell Base Address
|
||
OrwellDecoderTable ; Orwell Memory Map
|
||
dc.l $40800000 ; ROM - valid
|
||
dc.l $58000000 ; DiagROM - valid
|
||
dc.l $50000000 ; VIA1 - valid
|
||
dc.l $5000C020 ; SCC read - valid
|
||
dc.l $5000C020 ; SCC write - valid
|
||
dc.l $5001E000 ; IWM - valid
|
||
dc.l $00000000 ; PWM - unused
|
||
dc.l $00000000 ; Sound - unused
|
||
dc.l $00000000 ; SCSI - unused
|
||
dc.l $00000000 ; SCSIDack - unused
|
||
dc.l $00000000 ; SCSIHsk - unused
|
||
dc.l $50002000 ; VIA2 - valid
|
||
dc.l $50014000 ; ASC - valid
|
||
dc.l $00000000 ; RBV - unused
|
||
dc.l $F9800000 ; VDAC - used
|
||
dc.l $00000000 ; SCSIDMA - valid
|
||
dc.l $5001E020 ; SWIMIOP - valid
|
||
dc.l $5000C020 ; SCCIOP - valid
|
||
dc.l $00000000 ; OSS - unused
|
||
dc.l $00000000 ; FMC - unused
|
||
dc.l $00000000 ; RPU - unused
|
||
dc.l $5000E000 ; Orwell - valid <SM62> CSS
|
||
dc.l $00000000 ; JAWS - unused
|
||
dc.l $5000A000 ; Sonic - valid <45>
|
||
dc.l $5000F000 ; 1st (internal) SCSI96 - valid <58>
|
||
dc.l $5000F402 ; 2nd (external) SCSI96 - valid <58>
|
||
dc.l $F9800000 ; DAFB - valid
|
||
dc.l $00000000 ; unused 27
|
||
dc.l $00000000 ; ROMPhysAddr - unused
|
||
dc.l $E0000000 ; PatchRomAddr - valid
|
||
dc.l $00000000 ; unused 30
|
||
dc.l $00000000 ; unused 31
|
||
|
||
ELSE ; {forSmurf}
|
||
|
||
BitVector32 \ ; Default valid addresses 0-31
|
||
ROMExists,\ ; ROMAddr is valid
|
||
DiagROMExists,\ ; DiagROMAddr is valid
|
||
VIA1Exists,\ ; VIA1Addr is valid
|
||
VIA2Exists,\ ; VIA2Addr is valid
|
||
ASCExists,\ ; ASCAddr is valid
|
||
SCCRdExists,\ ; SCCRdAddr may be valid
|
||
SCCWrExists,\ ; SCCWrAddr may be valid
|
||
SWIMIOPExists,\ ; SWIMIOPAddr may be valid
|
||
SCCIOPExists,\ ; SCCIOPAddr may be valid
|
||
SCSI96_1Exists,\ ; 1st SCSI96 is valid
|
||
SCSI96_2Exists,\ ; 2nd SCSI96 may be valid
|
||
OrwellExists,\ ; Orwell MCA is valid <SM62> CSS
|
||
SONICExists,\ ; SONIC is valid
|
||
DAFBExists ; DAFB video is valid
|
||
BitVector32 ; Default valid addresses 32-63
|
||
BitVector32 ; Default valid addresses 64-95
|
||
dc.l \ ; Flags for valid ext feature flags 0-31
|
||
(1<<hasNewMemMgr) ; hasNewMemMgr support (ie Figment can be switched on)
|
||
IF forSTP601 THEN
|
||
dc.l \ ; Flags for valid ext feature flags 32-63
|
||
(1<<has68kEmulator//32) ; This ROM starts up with a 68k emulator
|
||
ELSE ;
|
||
dc.l 0 ; Default ext features 32-63
|
||
ENDIF
|
||
dc.l 0 ; Default ext features 64-95
|
||
dc.b $00,$C0,$00,$00 ; dont trigger SoftIRQ, A/UX interrupt scheme<16><47>
|
||
dc.l CheckForOrwell-OrwellDecoderTable ; routine to identify this map
|
||
dc.b OrwellDecoder
|
||
dc.b DecoderInfoVersion ; DecoderInfo version
|
||
dcb.b 2,0
|
||
dc.l $50F0E000 ; Orwell Base Address <SM13>
|
||
OrwellDecoderTable ; Eclipse Memory Map <13>
|
||
dc.l $40800000 ; ROM - valid
|
||
dc.l $58000000 ; DiagROM - valid <16>
|
||
dc.l $50F00000 ; VIA1 - valid
|
||
dc.l $50F0C020 ; SCC read - valid <58>
|
||
dc.l $50F0C020 ; SCC write - valid <58>
|
||
dc.l $50F1E000 ; IWM - valid <58>
|
||
dc.l $00000000 ; PWM - unused
|
||
dc.l $00000000 ; Sound - unused
|
||
dc.l $00000000 ; SCSI - unused
|
||
dc.l $00000000 ; SCSIDack - unused
|
||
dc.l $00000000 ; SCSIHsk - unused
|
||
dc.l $50F02000 ; VIA2 - valid
|
||
dc.l $50F14000 ; ASC - valid
|
||
dc.l $00000000 ; RBV - unused
|
||
dc.l $F9800000 ; VDAC - used <58>
|
||
dc.l $00000000 ; SCSIDMA - valid <58>
|
||
dc.l $50F1E020 ; SWIMIOP - valid
|
||
dc.l $50F0C020 ; SCCIOP - valid
|
||
dc.l $00000000 ; OSS - unused
|
||
dc.l $00000000 ; FMC - unused
|
||
dc.l $00000000 ; RPU - unused
|
||
dc.l $5000E000 ; Orwell - valid <SM62> CSS
|
||
dc.l $00000000 ; JAWS - unused <25>
|
||
dc.l $50F0A000 ; Sonic - valid <45>
|
||
dc.l $50F0F000 ; 1st (internal) SCSI96 - valid <58>
|
||
dc.l $50F0F402 ; 2nd (external) SCSI96 - valid <58>
|
||
dc.l $F9800000 ; DAFB - valid <58>
|
||
dc.l $00000000 ; unused 27
|
||
dc.l $00000000 ; ROMPhysAddr - unused
|
||
dc.l $E0000000 ; PatchRomAddr - valid <H15><SM5>
|
||
dc.l $00000000 ; unused 30
|
||
dc.l $00000000 ; unused 31
|
||
ENDIF ; {forSmurf}
|
||
ENDIF ; {hasOrwell}
|
||
|
||
|
||
IF hasJaws THEN
|
||
IMPORT CheckForJAWS
|
||
;-----------------------------------------------------------------------------------------
|
||
; JAWS Decoder
|
||
;-----------------------------------------------------------------------------------------
|
||
BitVector32 \ ; Default valid addresses 0-31
|
||
ROMExists,\ ; ROMAddr is valid
|
||
DiagROMExists,\ ; DiagROMAddr is valid
|
||
VIA1Exists,\ ; VIA1Addr is valid
|
||
SCCRdExists,\ ; SCCRdAddr is valid
|
||
SCCWrExists,\ ; SCCWrAddr is valid
|
||
IWMExists,\ ; IWMAddr is valid
|
||
SCSIExists,\ ; SCSIAddr is valid
|
||
SCSIDackExists,\ ; SCSIDackAddr is valid
|
||
SCSIHskExists,\ ; SCSIHskAddr is valid
|
||
VIA2Exists,\ ; VIA2Addr is valid
|
||
ASCExists,\ ; ASCAddr is valid
|
||
JAWSExists ; JAWS is valid
|
||
BitVector32 ; Default valid addresses 32-63
|
||
BitVector32 ; Default valid addresses 64-95
|
||
dc.l \ ; Default ext features 0-31
|
||
(ClockNoPram)|\ ; has PowerManager clock, but not PwrMgr pram
|
||
(ADBPwrMgr)|\ ; PowerManager ADB
|
||
(1<<SupportsIdle) ; and has idle
|
||
dc.l 0 ; Default ext features 32-63
|
||
dc.l 0 ; Default ext features 64-95
|
||
dc.b $00,$00,$00,$00 ; no special VIA bits to avoid changing
|
||
dc.l CheckForJAWS-JAWStable ; routine to identify this map
|
||
dc.b JAWSDecoder
|
||
dc.b DecoderInfoVersion ; DecoderInfo version
|
||
dcb.b 2,0
|
||
dc.l $50F80000 ; JAWS Base Address
|
||
JAWStable dc.l $40800000 ; ROM - valid
|
||
dc.l $58000000 ; DiagROM - valid
|
||
dc.l $50F00000 ; VIA1 - valid
|
||
dc.l $50F04000 ; SCC read - valid
|
||
dc.l $50F04000 ; SCC write - valid
|
||
dc.l $50F16000 ; IWM - valid
|
||
dc.l $00000000 ; PWM - unused
|
||
dc.l $00000000 ; Sound - unused
|
||
dc.l $50F10000 ; SCSI - optional
|
||
dc.l $50F06000 ; SCSIDack - optional
|
||
dc.l $50F06000 ; SCSIHsk - optional
|
||
dc.l $50F02000 ; VIA2 - valid
|
||
dc.l $50F14000 ; ASC - valid
|
||
dc.l $00000000 ; RBV - unused
|
||
dc.l $00000000 ; VDAC - unused
|
||
dc.l $00000000 ; SCSIDMA - unused
|
||
dc.l $00000000 ; SWIMIOP - unused
|
||
dc.l $00000000 ; SCCIOP - unused
|
||
dc.l $00000000 ; OSS - unused
|
||
dc.l $00000000 ; FMC - unused
|
||
dc.l $00000000 ; RPU - unused
|
||
dc.l $00000000 ; unused 21 <SM10>
|
||
dc.l $50F80000 ; JAWS - valid <25>
|
||
dc.l $00000000 ; Sonic - unused <45>
|
||
dc.l $00000000 ; 1st (internal) SCSI96 - unused
|
||
dc.l $00000000 ; 2nd (external) SCSI96 - unused
|
||
dc.l $00000000 ; DAFB - unused
|
||
dc.l $00000000 ; unused 27
|
||
dc.l $00000000 ; ROMPhysAddr - unused
|
||
dc.l $00000000 ; unused 29
|
||
dc.l $00000000 ; unused 30
|
||
dc.l $00000000 ; unused 31
|
||
|
||
ENDIF ; {hasJaws}
|
||
|
||
|
||
IF hasNiagra THEN
|
||
IMPORT CheckForNiagra
|
||
;-----------------------------------------------------------------------------------------
|
||
; Niagra Decoder
|
||
;-----------------------------------------------------------------------------------------
|
||
BitVector32 \ ; Default valid addresses 0-31
|
||
ROMExists,\ ; ROMAddr is valid
|
||
DiagROMExists,\ ; DiagROMAddr is valid
|
||
VIA1Exists,\ ; VIA1Addr is valid
|
||
SCCRdExists,\ ; SCCRdAddr is valid
|
||
SCCWrExists,\ ; SCCWrAddr is valid
|
||
IWMExists,\ ; IWMAddr is valid
|
||
SCSIExists,\ ; SCSIAddr is valid
|
||
SCSIDackExists,\ ; SCSIDackAddr is valid
|
||
SCSIHskExists,\ ; SCSIHskAddr is valid
|
||
VIA2Exists,\ ; VIA2Addr is valid
|
||
ASCExists,\ ; ASCAddr is valid
|
||
JAWSExists ; JAWS is valid
|
||
BitVector32 ; Default valid addresses 32-63
|
||
BitVector32 ; Default valid addresses 64-95
|
||
dc.l \ ; Default ext features 0-31
|
||
(ClockRTC)|\ ; RTC clock/PRAM
|
||
(ADBPwrMgr)|\ ; PowerManager ADB
|
||
(SoundPlayAndRecord)|\ ; can Play and Record simultaneously <H42>
|
||
(1<<SupportsIdle)|\ ; and has idle
|
||
(1<<NiagraExistsBit) ; Niagra a variant of Jaws
|
||
dc.l 0 ; Default ext features 32-63
|
||
dc.l 0 ; Default ext features 64-95
|
||
dc.b $00,$00,$00,$00 ; no special VIA bits to avoid changing
|
||
dc.l CheckForNiagra-NiagraTable ; routine to identify this map
|
||
dc.b NiagraDecoder
|
||
dc.b DecoderInfoVersion ; DecoderInfo version
|
||
dcb.b 2,0
|
||
dc.l $50F80000 ; Niagra Base Address
|
||
NiagraTable dc.l $40800000 ; ROM - valid
|
||
dc.l $58000000 ; DiagROM - valid
|
||
dc.l $50F00000 ; VIA1 - valid
|
||
dc.l $50F04000 ; SCC read - valid
|
||
dc.l $50F04000 ; SCC write - valid
|
||
dc.l $50F16000 ; IWM - valid
|
||
dc.l $00000000 ; PWM - unused
|
||
dc.l $00000000 ; Sound - unused
|
||
dc.l $50F10000 ; SCSI - optional
|
||
dc.l $50F06000 ; SCSIDack - optional
|
||
dc.l $50F06000 ; SCSIHsk - optional
|
||
dc.l $50F02000 ; VIA2 - valid
|
||
dc.l $50F14000 ; ASC - valid
|
||
dc.l $00000000 ; RBV - unused
|
||
dc.l $50F20000 ; VDAC - valid <SM2>
|
||
dc.l $00000000 ; SCSIDMA - unused
|
||
dc.l $00000000 ; SWIMIOP - unused
|
||
dc.l $00000000 ; SCCIOP - unused
|
||
dc.l $00000000 ; OSS - unused
|
||
dc.l $00000000 ; FMC - unused
|
||
dc.l $00000000 ; RPU - unused
|
||
dc.l $00000000 ; Orwell - unused <SM29>
|
||
dc.l $50F80000 ; JAWS - valid
|
||
dc.l $00000000 ; Sonic - unused
|
||
dc.l $00000000 ; 1st (internal) SCSI96 - unused
|
||
dc.l $00000000 ; 2nd (external) SCSI96 - unused
|
||
dc.l $00000000 ; DAFB - unused
|
||
dc.l $00000000 ; unused 27
|
||
dc.l $00000000 ; ROMPhysAddr - unused
|
||
dc.l $00000000 ; PatchROMAddr - unused
|
||
dc.l $00000000 ; unused 30
|
||
dc.l $00000000 ; unused 31
|
||
|
||
ENDIF ; {hasNiagra}
|
||
|
||
|
||
IF hasMSC THEN
|
||
;-----------------------------------------------------------------------------------------
|
||
; MSC Decoder
|
||
;-----------------------------------------------------------------------------------------
|
||
BitVector32 \ ; Default valid addresses 0-31
|
||
ROMExists,\ ; ROMAddr is valid
|
||
DiagROMExists,\ ; DiagROMAddr is valid
|
||
VIA1Exists,\ ; VIA1Addr is valid
|
||
SCCRdExists,\ ; SCCRdAddr is valid
|
||
SCCWrExists,\ ; SCCWrAddr is valid
|
||
IWMExists,\ ; IWMAddr is valid <H6>
|
||
SCSIExists,\ ; SCSIAddr is valid
|
||
SCSIDackExists,\ ; SCSIDackAddr is valid
|
||
SCSIHskExists,\ ; SCSIHskAddr is valid
|
||
ASCExists,\ ; ASCAddr is valid
|
||
RBVExists,\ ; RBVAddr is valid
|
||
VDACExists ; VDACAddr (GSC) is valid <H9>
|
||
BitVector32 ; Default valid addresses 32-63
|
||
BitVector32 ; Default valid addresses 64-95
|
||
dc.l \ ; Default ext features 0-31
|
||
(ADBPwrMgr)|\ ; PMGR ADB
|
||
(ClockPwrMgr)|\ ; PMGR clock/pram
|
||
(SoundHasSoundIn)|\ ; Has 8-bit mono sound input <LW7>
|
||
(1<<SupportsIdle)|\ ; supports idle mode
|
||
(1<<PMgrNewIntf)|\ ; serial PMgr interface and new protocol
|
||
(1<<MSCChipBit) ; MSC variant of the RBV <H5>
|
||
dc.l 0 ; Default ext features 32-63
|
||
dc.l 0 ; Default ext features 64-95
|
||
dc.b $00,$00,$00,$00 ; no special VIA bits to avoid changing
|
||
dc.l 0 ; no identify routine - supports CPU ID reg <H10>
|
||
dc.b MSCDecoder
|
||
dc.b DecoderInfoVersion ; DecoderInfo version
|
||
dcb.b 3,0
|
||
dc.l $FFFFFFFF ; No Base Address for this decoder
|
||
MSCTable
|
||
IF ROMinRAM THEN ; <SM18>
|
||
dc.l $00400000 ; ROM - hacked • HACK 4 Meg <SM18>
|
||
ELSE ; <SM18>
|
||
dc.l $40800000 ; ROM - valid
|
||
ENDIF ; <SM18>
|
||
dc.l $58000000 ; DiagROM - valid
|
||
dc.l $50F00000 ; VIA1 - valid
|
||
dc.l $50F04000 ; SCC read - valid
|
||
dc.l $50F04000 ; SCC write - valid
|
||
dc.l $50F16000 ; IWM - valid <H6><H11>
|
||
dc.l $00000000 ; PWM - unused
|
||
dc.l $00000000 ; Sound - unused
|
||
dc.l $50F10000 ; SCSI - valid
|
||
dc.l $50F12000 ; SCSIDack - valid
|
||
dc.l $50F06000 ; SCSIHsk - valid
|
||
dc.l $00000000 ; VIA2 - unused
|
||
dc.l $50F14000 ; ASC - valid
|
||
dc.l $50F26000 ; RBV - valid
|
||
dc.l $50F20000 ; VDAC - valid (GSC) <H9>
|
||
dc.l $00000000 ; SCSIDMA - unused
|
||
dc.l $00000000 ; SWIMIOP - unused
|
||
dc.l $00000000 ; SCCIOP - unused
|
||
dc.l $00000000 ; OSS - unused
|
||
dc.l $00000000 ; FMC - unused
|
||
dc.l $00000000 ; RPU - unused
|
||
dc.l $00000000 ; Orwell - unused <SM29>
|
||
dc.l $00000000 ; JAWS - unused
|
||
dc.l $00000000 ; Sonic - unused
|
||
dc.l $00000000 ; 1st (internal) SCSI96 - unused
|
||
dc.l $00000000 ; 2nd (external) SCSI96 - unused
|
||
dc.l $00000000 ; DAFB - unused
|
||
dc.l $00000000 ; unused 27 <H5>
|
||
dc.l $00000000 ; ROMPhysAddr - unused
|
||
dc.l $00000000 ; PatchROM - unused
|
||
dc.l $00000000 ; unused 30
|
||
dc.l $00000000 ; unused 31
|
||
|
||
ENDIF ; {hasMSC}
|
||
|
||
|
||
IF hasSonora THEN
|
||
;-----------------------------------------------------------------------------------------
|
||
; Sonora Decoder
|
||
;-----------------------------------------------------------------------------------------
|
||
BitVector32 \ ; Default valid addresses 0-31
|
||
ROMExists,\ ; ROMAddr is valid
|
||
DiagROMExists,\ ; DiagROMAddr is valid
|
||
VIA1Exists,\ ; VIA1Addr is valid
|
||
SCCRdExists,\ ; SCCRdAddr is valid
|
||
SCCWrExists,\ ; SCCWrAddr is valid
|
||
IWMExists,\ ; IWMAddr is valid (Actually, SWIM2)
|
||
SCSIExists,\ ; SCSIAddr is valid
|
||
SCSIDackExists,\ ; SCSIDackAddr is valid
|
||
SCSIHskExists,\ ; SCSIHskAddr is valid
|
||
ASCExists,\ ; ASCAddr is valid
|
||
RBVExists,\ ; RBVAddr is valid
|
||
VDACExists,\ ; VDACAddr is valid <SM29>
|
||
SONICExists,\ ; SONIC is valid
|
||
PatchROMExists ; PatchRomAddr is valid <H33>
|
||
BitVector32 ; Default valid addresses 32-63
|
||
BitVector32 ; Default valid addresses 64-95
|
||
dc.l \ ; Default ext features 0-31
|
||
(ClockEgret)|\ ; Has Egret clock/pram
|
||
(ADBEgret)|\ ; Egret ADB
|
||
(SoundHasSoundIn)|\ ; Has 8-bit mono sound input <LW7>
|
||
(SoundStereoOut)|\ ; has stereo sound output <t32>
|
||
(SoundPlayAndRecord)|\ ; can Play and Record simultaneously <H42>
|
||
(1<<SonoraExistsBit) ; Has Sonora Memory Controller <H33>
|
||
dc.l 0 ; Default ext features 32-63
|
||
dc.l 0 ; Default ext features 64-95
|
||
dc.b $00,$00,$00,$00 ; no special VIA bits to avoid changing
|
||
dc.l 0 ; no identify routine - supports CPU ID reg <H10>
|
||
dc.b SonoraDecoder
|
||
dc.b DecoderInfoVersion ; DecoderInfo version
|
||
dcb.b 2,0
|
||
dc.l $FFFFFFFF ; No Base Address for this decoder
|
||
SonoraTable
|
||
dc.l $40800000 ; √ROM - valid
|
||
|
||
;••••••••••••••••••••••••••••• <H38>
|
||
;
|
||
; NOTE: Singapore has built their board testers using $50FC0000 as the DiagROM
|
||
; address. So, I need to change it here (since Vail is a Sonora machine). They will
|
||
; use the correct address in the future.
|
||
;
|
||
; dc.l $58000000 ; √DiagROM - valid
|
||
dc.l $50FC0000 ; √DiagROM - valid
|
||
|
||
;•••••••••••••••••••••••••••••
|
||
dc.l $50F00000 ; √VIA1 - valid
|
||
dc.l $50F04000 ; √SCC read - valid
|
||
dc.l $50F04000 ; √SCC write - valid
|
||
dc.l $50F16000 ; √IWM - SWIM2 address
|
||
dc.l $00000000 ; PWM - unused
|
||
dc.l $00000000 ; Sound - unused
|
||
dc.l $50F10000 ; √SCSI - valid
|
||
dc.l $50F12000 ; √SCSIDack - valid
|
||
dc.l $50F06000 ; √SCSIHsk - valid
|
||
dc.l $00000000 ; VIA2 - unused
|
||
dc.l $50F14000 ; √ASC - valid
|
||
dc.l $50F26000 ; √RBV - valid
|
||
dc.l $50F24000 ; √VDAC - valid
|
||
dc.l $00000000 ; SCSIDMA - unused
|
||
dc.l $00000000 ; SWIMIOP - unused
|
||
dc.l $00000000 ; SCCIOP - unused
|
||
dc.l $00000000 ; OSS - unused
|
||
dc.l $00000000 ; FMC - unused
|
||
dc.l $00000000 ; RPU - unused
|
||
dc.l $00000000 ; Orwell - unused <SM29>
|
||
dc.l $00000000 ; JAWS - unused
|
||
dc.l $50F0A000 ; √Sonic - valid
|
||
dc.l $00000000 ; 1st (internal) SCSI96 - unused
|
||
dc.l $00000000 ; 2nd (external) SCSI96 - unused
|
||
dc.l $00000000 ; DAFB - unused
|
||
dc.l $00000000 ; unused 27 <H5>
|
||
dc.l $00000000 ; ROMPhysAddr - unused <H19>
|
||
dc.l $5FF00000 ; √PatchROM - valid <H33> <SM29>
|
||
dc.l $00000000 ; unused 30
|
||
dc.l $00000000 ; unused 31
|
||
|
||
ENDIF ; {hasSonora}
|
||
|
||
|
||
IF hasDJMEMC THEN
|
||
;-----------------------------------------------------------------------------------------
|
||
; djMEMC Decoder •••• This info is not up to date ••••
|
||
;-----------------------------------------------------------------------------------------
|
||
IF forSmurf THEN ; <SM48>
|
||
BitVector32 \ ; Default valid addresses 0-31
|
||
ROMExists,\ ; ROMAddr is valid
|
||
DiagROMExists,\ ; DiagROMAddr is valid
|
||
VIA1Exists,\ ; VIA1Addr is valid
|
||
VIA2Exists,\ ; VIA2Addr is valid
|
||
ASCExists,\ ; ASCAddr is valid
|
||
IWMExists,\ ; IWMAddr is valid (Actually, SWIM2)
|
||
SCCRdExists,\ ; SCCRdAddr may be valid
|
||
SCCWrExists,\ ; SCCWrAddr may be valid
|
||
SCSI96_1Exists,\ ; 1st SCSI96 is valid
|
||
SONICExists,\ ; SONIC is valid
|
||
DAFBExists ; DAFB video is valid
|
||
BitVector32 ; Default valid addresses 32-63
|
||
BitVector32 ; Default valid addresses 64-95
|
||
dc.l \ ; Default ext features 0-31
|
||
SoundPlayAndRecord ; can Play and Record simultaneously <H42>
|
||
; (we better know what features we have)
|
||
dc.l \ ; Flags for valid ext feature flags 32-63
|
||
(1<<has68kEmulator//32) ; This ROM starts up with a 68k emulator
|
||
dc.l 0 ; Default ext features 64-95
|
||
dc.b $00,$C0,$00,$00 ; dont trigger SoftIRQ, A/UX interrupt scheme
|
||
dc.l 0 ; routine to identify this map
|
||
dc.b djMEMCDecoder
|
||
dc.b DecoderInfoVersion ; DecoderInfo version
|
||
dcb.b 2,0
|
||
dc.l $FFFFFFFF ; djMEMC Base Address???
|
||
djMEMCTable
|
||
dc.l $40800000 ; ROM - valid
|
||
dc.l $58000000 ; DiagROM - valid
|
||
dc.l $50000000 ; VIA1 - valid
|
||
dc.l $5000C020 ; SCC read - valid
|
||
dc.l $5000C020 ; SCC write - valid
|
||
dc.l $5001E000 ; IWM - valid
|
||
dc.l $00000000 ; PWM - unused
|
||
dc.l $00000000 ; Sound - unused
|
||
dc.l $00000000 ; SCSI - unused
|
||
dc.l $00000000 ; SCSIDack - unused
|
||
dc.l $00000000 ; SCSIHsk - unused
|
||
dc.l $50002000 ; VIA2 - valid
|
||
dc.l $50014000 ; ASC - valid
|
||
dc.l $00000000 ; RBV - unused
|
||
dc.l $F9800000 ; VDAC - used
|
||
dc.l $00000000 ; SCSIDMA - valid
|
||
dc.l $00000000 ; SWIMIOP - valid
|
||
dc.l $00000000 ; SCCIOP - valid
|
||
dc.l $00000000 ; OSS - unused
|
||
dc.l $00000000 ; FMC - unused
|
||
dc.l $00000000 ; RPU - unused
|
||
dc.l $00000000 ; Orwell - valid <SM29>
|
||
dc.l $00000000 ; JAWS - unused
|
||
dc.l $5000A000 ; Sonic - valid
|
||
dc.l $50010000 ; 1st (internal) SCSI96 - valid
|
||
dc.l $00000000 ; 2nd (external) SCSI96 - unused
|
||
dc.l $F9800000 ; DAFB - valid
|
||
dc.l $00000000 ; unused 27
|
||
dc.l $00000000 ; ROMPhysAddr - unused
|
||
dc.l $5F000000 ; PatchRomAddr - valid <SM29>
|
||
dc.l $00000000 ; unused 30
|
||
dc.l $00000000 ; unused 31 <H41>
|
||
|
||
ELSE ; {forSmurf}
|
||
|
||
BitVector32 \ ; Default valid addresses 0-31
|
||
ROMExists,\ ; ROMAddr is valid
|
||
DiagROMExists,\ ; DiagROMAddr is valid
|
||
VIA1Exists,\ ; VIA1Addr is valid
|
||
VIA2Exists,\ ; VIA2Addr is valid
|
||
ASCExists,\ ; ASCAddr is valid
|
||
SCCRdExists,\ ; SCCRdAddr may be valid
|
||
SCCWrExists,\ ; SCCWrAddr may be valid
|
||
SCSI96_1Exists,\ ; 1st SCSI96 is valid
|
||
SONICExists,\ ; SONIC is valid
|
||
DAFBExists ; DAFB video is valid
|
||
BitVector32 ; Default valid addresses 32-63
|
||
BitVector32 ; Default valid addresses 64-95
|
||
dc.l \ ; Default ext features 0-31
|
||
(SoundPlayAndRecord )|\ ; can Play and Record simultaneously <H42>
|
||
\ ; (we better know what features we have)
|
||
(1<<hasNewMemMgr) ; hasNewMemMgr support (ie Figment can be switched on)
|
||
IF forSTP601 THEN
|
||
dc.l \ ; Flags for valid ext feature flags 32-63
|
||
(1<<has68kEmulator//32) ; This ROM starts up with a 68k emulator
|
||
ELSE ;
|
||
dc.l 0 ; Default ext features 32-63
|
||
ENDIF
|
||
dc.l 0 ; Default ext features 64-95
|
||
dc.b $00,$C0,$00,$00 ; dont trigger SoftIRQ, A/UX interrupt scheme
|
||
dc.l 0 ; routine to identify this map
|
||
dc.b djMEMCDecoder
|
||
dc.b DecoderInfoVersion ; DecoderInfo version
|
||
dcb.b 2,0
|
||
dc.l $FFFFFFFF ; djMEMC Base Address???
|
||
djMEMCTable
|
||
dc.l $40800000 ; ROM - valid
|
||
dc.l $58000000 ; DiagROM - valid
|
||
dc.l $50F00000 ; VIA1 - valid
|
||
dc.l $50F0C020 ; SCC read - valid
|
||
dc.l $50F0C020 ; SCC write - valid
|
||
dc.l $50F1E000 ; IWM - valid
|
||
dc.l $00000000 ; PWM - unused
|
||
dc.l $00000000 ; Sound - unused
|
||
dc.l $00000000 ; SCSI - unused
|
||
dc.l $00000000 ; SCSIDack - unused
|
||
dc.l $00000000 ; SCSIHsk - unused
|
||
dc.l $50F02000 ; VIA2 - valid
|
||
dc.l $50F14000 ; ASC - valid
|
||
dc.l $00000000 ; RBV - unused
|
||
dc.l $F9800000 ; VDAC - used
|
||
dc.l $00000000 ; SCSIDMA - valid
|
||
dc.l $00000000 ; SWIMIOP - valid
|
||
dc.l $00000000 ; SCCIOP - valid
|
||
dc.l $00000000 ; OSS - unused
|
||
dc.l $00000000 ; FMC - unused
|
||
dc.l $00000000 ; RPU - unused
|
||
dc.l $00000000 ; Orwell - valid <SM29>
|
||
dc.l $00000000 ; JAWS - unused
|
||
dc.l $50F0A000 ; Sonic - valid
|
||
dc.l $50F10000 ; 1st (internal) SCSI96 - valid
|
||
dc.l $00000000 ; 2nd (external) SCSI96 - unused
|
||
dc.l $F9800000 ; DAFB - valid
|
||
dc.l $00000000 ; unused 27
|
||
dc.l $00000000 ; ROMPhysAddr - unused
|
||
dc.l $5FF00000 ; PatchRomAddr - valid <SM29>
|
||
dc.l $00000000 ; unused 30
|
||
dc.l $00000000 ; unused 31 <H41>
|
||
ENDIF ; {forSmurf}
|
||
ENDIF ; {hasDJMEMC}
|
||
|
||
|
||
IF hasYMCA THEN ; this is really YMCA now <SM46>
|
||
;-----------------------------------------------------------------------------------------
|
||
; YMCA Decoder
|
||
;-----------------------------------------------------------------------------------------
|
||
BitVector32 \ ; Default valid addresses 0-31
|
||
ROMExists,\ ; ROMAddr is valid
|
||
DiagROMExists,\ ; DiagROMAddr is valid
|
||
VIA1Exists,\ ; VIA1Addr is valid
|
||
VIA2Exists,\ ; VIA2Addr is valid
|
||
SCCRdExists,\ ; SCCRdAddr is valid
|
||
SCCWrExists,\ ; SCCWrAddr is valid
|
||
NewAgeExists,\ ; NewAge is valid
|
||
SCSI96_1Exists,\ ; SCSI 96 is valid
|
||
PSCExists ; PSC DMA is valid
|
||
BitVector32 \ ; Default valid addresses 32-63
|
||
DSPExists,\ ; DSP is valid
|
||
MaceExists, \ ; MACE is valid
|
||
MUNIExists, \ ; MUNI is valid <SM34>
|
||
CivicExists,\ ; Civic video is valid
|
||
SebastianExists ; Sebastian CLUT DAC is valid
|
||
BitVector32 ; Default valid addresses 64-95
|
||
dc.l 0 ; Default ext features 0-31
|
||
; (we better know what features we have)
|
||
dc.l 0 ; Default ext features 32-63
|
||
dc.l 0 ; Default ext features 64-95
|
||
dc.b $00,$30,$00,$00 ; special VIA bits to avoid changing,
|
||
; VIA1 PB4=1,PB5=1, for Cuda 1/27/92 gjs <P9>
|
||
dc.l 0 ; no identify routine - supports CPU ID reg <P5>
|
||
dc.b YMCADecoder
|
||
dc.b DecoderInfoVersion ; DecoderInfo version
|
||
dcb.b 2,0
|
||
dc.l $50F30400 ; YMCA Base Address <SM19>
|
||
CycloneDecoderTable
|
||
IF ROMinRAM THEN ; <SM18>
|
||
dc.l $00400000 ; ROM - hacked • HACK 4 Meg <SM18>
|
||
ELSE ; <SM18>
|
||
dc.l $40800000 ; ROM - valid
|
||
ENDIF ; <SM18>
|
||
dc.l $58000000 ; DiagROM - valid
|
||
dc.l $50F00000 ; VIA1 - valid
|
||
dc.l $50F04000 ; SCC read - valid
|
||
dc.l $50F04000 ; SCC write - valid
|
||
dc.l $00000000 ; IWM - unused
|
||
dc.l $00000000 ; PWM - unused
|
||
dc.l $00000000 ; Sound - unused
|
||
dc.l $00000000 ; SCSI - unused
|
||
dc.l $00000000 ; SCSIDack - unused
|
||
dc.l $00000000 ; SCSIHsk - unused
|
||
dc.l $50F02000 ; VIA2 - valid <SM7>
|
||
dc.l $00000000 ; ASC - unused <SM15>
|
||
dc.l $00000000 ; RBV - unused
|
||
dc.l $00000000 ; VDAC - valid <SM7>
|
||
dc.l $00000000 ; SCSIDMA - unused
|
||
dc.l $00000000 ; SWIMIOP - unused
|
||
dc.l $00000000 ; SCCIOP - unused
|
||
dc.l $00000000 ; OSS - unused
|
||
dc.l $00000000 ; FMC - unused
|
||
dc.l $00000000 ; RPU - unused
|
||
dc.l $00000000 ; Unused21 - valid <SM10><SM19>
|
||
dc.l $00000000 ; JAWS - unused
|
||
dc.l $00000000 ; Sonic - unused
|
||
dc.l $50F18000 ; 1st (internal) SCSI96 - unused
|
||
dc.l $00000000 ; 2nd (external) SCSI96 - unused
|
||
dc.l $00000000 ; Civic - valid
|
||
dc.l $50F31000 ; PSC DMA - valid
|
||
dc.l $00000000 ; ROMPhysAddr - unused
|
||
dc.l $00000000 ; PatchROMAddr - unused
|
||
dc.l $50F2A000 ; NewAge - valid
|
||
dc.l $00000000 ; Unused31
|
||
dc.l $00000000 ; Singer - unused
|
||
dc.l $50F31000 ; DSP (really PSC's base address) - valid <SM23>
|
||
dc.l $50F1C000 ; MACE - valid <SM23>
|
||
dc.l $50F30000 ; MUNI - valid <SM34>
|
||
dc.l $00000000 ; AMIC DMA controller - unused
|
||
dc.l $00000000 ; Pratt decoder - unused
|
||
dc.l $00000000 ; SWIM3 chip - unused
|
||
dc.l $00000000 ; AWACS chip - unused
|
||
dc.l $50036000 ; Civic - valid
|
||
dc.l $50F30800 ; Sebastian - valid <SM7>
|
||
|
||
|
||
ENDIF ; <SM20> <SM46>
|
||
|
||
|
||
IF hasVISADecoder THEN
|
||
IMPORT CheckForVISADecoder
|
||
;-----------------------------------------------------------------------------------------
|
||
; VISA Decoder
|
||
;-----------------------------------------------------------------------------------------
|
||
BitVector32 \ ; Default valid addresses 0-31
|
||
ROMExists,\ ; ROMAddr is valid
|
||
DiagROMExists,\ ; DiagROMAddr is valid
|
||
VIA1Exists,\ ; VIA1Addr is valid
|
||
SCCRdExists,\ ; SCCRdAddr is valid
|
||
SCCWrExists,\ ; SCCWrAddr is valid
|
||
IWMExists,\ ; IWMAddr is valid
|
||
SCSIExists,\ ; SCSIAddr is valid
|
||
SCSIDackExists,\ ; SCSIDackAddr is valid
|
||
SCSIHskExists,\ ; SCSIHskAddr is valid
|
||
ASCExists,\ ; ASCAddr is valid
|
||
RBVExists,\ ; RBVAddr is valid
|
||
VDACExists ; VDACAddr is valid
|
||
BitVector32 ; Default valid addresses 32-63
|
||
BitVector32 ; Default valid addresses 64-95
|
||
dc.l \ ; Default ext features 0-31
|
||
(ClockEgret)|\ ; Has Egret clock/pram
|
||
(ADBEgret)|\ ; Has Egret ADB
|
||
(1<<V8ChipBit) ; and V8 variant of RBV/MDU
|
||
dc.l 0 ; Default ext features 32-63
|
||
dc.l 0 ; Default ext features 64-95
|
||
dc.b $00,$00,$00,$00 ; no special VIA bits to avoid changing
|
||
dc.l CheckForVISADecoder-VISADecoderTable; routine to identify this map
|
||
dc.b VISADecoder
|
||
dc.b DecoderInfoVersion ; DecoderInfo version
|
||
dcb.b 2,0
|
||
dc.l $FFFFFFFF ; No Base Address for this decoder
|
||
VISADecoderTable
|
||
dc.l $40A00000 ; ROM - valid <H20><SM5><SM17><SM18>
|
||
dc.l $50F80000 ; DiagROM - valid <12><8>
|
||
dc.l $50F00000 ; VIA1 - valid
|
||
dc.l $50F04000 ; SCC read - valid
|
||
dc.l $50F04000 ; SCC write - valid
|
||
dc.l $50F16000 ; IWM - valid
|
||
dc.l $00000000 ; PWM - unused
|
||
dc.l $00000000 ; Sound - unused
|
||
dc.l $50F10000 ; SCSI - valid
|
||
dc.l $50F12000 ; SCSIDack - valid
|
||
dc.l $50F06000 ; SCSIHsk - valid
|
||
dc.l $00000000 ; VIA2 - unused
|
||
dc.l $50F14000 ; ASC - valid
|
||
dc.l $50F26000 ; RBV - valid
|
||
dc.l $50F24000 ; VDAC - valid
|
||
dc.l $00000000 ; SCSIDMA - unused
|
||
dc.l $00000000 ; SWIMIOP - unused
|
||
dc.l $00000000 ; SCCIOP - unused
|
||
dc.l $00000000 ; OSS - unused
|
||
dc.l $00000000 ; FMC - unused
|
||
dc.l $00000000 ; RPU - unused
|
||
dc.l $00000000 ; unused 21
|
||
dc.l $00000000 ; unused 22
|
||
dc.l $00000000 ; unused 23
|
||
dc.l $00000000 ; 1st (internal) SCSI96 - unused
|
||
dc.l $00000000 ; 2nd (external) SCSI96 - unused
|
||
dc.l $00000000 ; DAFB - unused
|
||
dc.l $00000000 ; unused 27
|
||
dc.l $00A00000 ; ROMPhysAddr - unused <SM17>
|
||
dc.l $00000000 ; unused 29
|
||
dc.l $00000000 ; unused 30
|
||
dc.l $00000000 ; unused 31
|
||
|
||
ENDIF ; {hasVISADecoder}
|
||
|
||
|
||
IF hasGrandCentral THEN
|
||
;-----------------------------------------------------------------------------------------
|
||
; HammerHead Decoder Table
|
||
;-----------------------------------------------------------------------------------------
|
||
BitVector32 \ ; Default valid addresses 0-31
|
||
ROMExists,\ ; ROMAddr is valid
|
||
VIA1Exists,\ ; VIA1Addr is valid
|
||
SCCRdExists,\ ; SCCRdAddr is valid
|
||
SCCWrExists,\ ; SCCWrAddr is valid
|
||
SCSI96_1Exists,\ ; SCSI 96 bus 1 is valid
|
||
SCSI96_2Exists ; SCSI 96 bus 2 is valid
|
||
BitVector32 \ ; Default valid addresses 32-63
|
||
MaceExists, \ ; MACE is valid
|
||
SWIM3Exists,\ ; SWIM3 is valid
|
||
AwacsExists,\ ; Awacs is valid
|
||
GrandCentralExists ; Grand Central DMA is valid
|
||
BitVector32 ; Default valid addresses 64-95
|
||
dc.l 0 ; Default ext features 0-31
|
||
; (we better know what features we have)
|
||
dc.l 0 ; Default ext features 32-63
|
||
dc.l 0 ; Default ext features 64-95
|
||
dc.b $00,$30,$00,$00 ; special VIA bits to avoid changing,
|
||
; VIA1 PB4=1, PB5=1, for Cuda
|
||
dc.l 0 ; no identify routine -- use CPU ID register
|
||
dc.b HHeadDecoder
|
||
dc.b DecoderInfoVersion ; DecoderInfo version
|
||
dcb.b 2,0
|
||
dc.l $F8000000 ; HammerHead Base Address
|
||
HHeadDecoderTable
|
||
dc.l $40800000 ; ROM - valid
|
||
dc.l $00000000 ; DiagROM - unused
|
||
dc.l $F3016000 ; VIA1 - valid
|
||
dc.l $F3012000 ; SCC read - valid
|
||
dc.l $F3012000 ; SCC write - valid
|
||
dc.l $00000000 ; IWM - unused
|
||
dc.l $00000000 ; PWM - unused
|
||
dc.l $00000000 ; Sound - unused
|
||
dc.l $00000000 ; SCSI - unused
|
||
dc.l $00000000 ; SCSIDack - unused
|
||
dc.l $00000000 ; SCSIHsk - unused
|
||
dc.l $00000000 ; VIA2 - unused
|
||
dc.l $00000000 ; ASC - unused
|
||
dc.l $00000000 ; RBV - unused
|
||
dc.l $00000000 ; VDAC - unused
|
||
dc.l $00000000 ; SCSIDMA - unused
|
||
dc.l $00000000 ; SWIMIOP - unused
|
||
dc.l $00000000 ; SCCIOP - unused
|
||
dc.l $00000000 ; OSS - unused
|
||
dc.l $00000000 ; FMC - unused
|
||
dc.l $00000000 ; RPU - unused
|
||
dc.l $00000000 ; Unused21 - unused
|
||
dc.l $00000000 ; JAWS - unused
|
||
dc.l $00000000 ; Sonic - unused
|
||
dc.l $F3018000 ; 1st (internal) SCSI96 - valid
|
||
dc.l $F3010000 ; 2nd (external) SCSI96 - valid
|
||
dc.l $00000000 ; Civic - unused
|
||
dc.l $00000000 ; PSC DMA - unused
|
||
dc.l $00000000 ; ROMPhysAddr - unused
|
||
dc.l $00000000 ; PatchROMAddr - unused
|
||
dc.l $00000000 ; NewAge - unused
|
||
dc.l $00000000 ; Unused31
|
||
dc.l $00000000 ; Singer - unused
|
||
dc.l $00000000 ; DSP (really PSC's base address) - unused
|
||
dc.l $F3011000 ; MACE - valid
|
||
dc.l $00000000 ; MUNI - unused
|
||
dc.l $00000000 ; AMIC DMA controller - unused
|
||
dc.l $00000000 ; Pratt decoder - unused
|
||
dc.l $F3015000 ; SWIM3 chip - valid
|
||
dc.l $F3014000 ; AWACS chip - valid
|
||
dc.l $00000000 ; Civic - unused
|
||
dc.l $00000000 ; Sebastian - unused
|
||
dc.l $00000000 ; BART - unused
|
||
dc.l $F3000000 ; Grand Central - valid
|
||
|
||
ENDIF ; {hasGrandCentral}
|
||
|
||
|
||
|
||
;-----------------------------------------------------------------------------------------
|
||
; Unknown Decoder
|
||
;-----------------------------------------------------------------------------------------
|
||
IMPORT CheckForUnknown
|
||
|
||
BitVector32 ; Default valid addresses 0-31
|
||
BitVector32 ; Default valid addresses 32-63
|
||
BitVector32 ; Default valid addresses 64-95
|
||
dc.l 0 ; Default ext features 0-31
|
||
dc.l 0 ; Default ext features 32-63
|
||
dc.l 0 ; Default ext features 64-95
|
||
dc.b $00,$00,$00,$00 ; no special VIA bits to avoid changing
|
||
dc.l CheckForUnknown-UnknownDecoderTable ; routine to identify this map
|
||
dc.b UnknownDecoder
|
||
dc.b DecoderInfoVersion ; DecoderInfo version
|
||
dcb.b 2,0
|
||
dc.l $FFFFFFFF ; No Base Address for this decoder
|
||
UnknownDecoderTable
|
||
dc.l $00000000 ; ROM - unused
|
||
dc.l $00000000 ; DiagROM - unused
|
||
dc.l $00000000 ; VIA1 - unused
|
||
dc.l $00000000 ; SCC read - unused
|
||
dc.l $00000000 ; SCC write - unused
|
||
dc.l $00000000 ; IWM - unused
|
||
dc.l $00000000 ; PWM - unused
|
||
dc.l $00000000 ; Sound - unused
|
||
dc.l $00000000 ; SCSI - unused
|
||
dc.l $00000000 ; SCSIDack - unused
|
||
dc.l $00000000 ; SCSIHsk - unused
|
||
dc.l $00000000 ; VIA2 - unused
|
||
dc.l $00000000 ; ASC - unused
|
||
dc.l $00000000 ; RBV - unused
|
||
dc.l $00000000 ; VDAC - unused
|
||
dc.l $00000000 ; SCSIDMA - unused
|
||
dc.l $00000000 ; SWIMIOP - unused
|
||
dc.l $00000000 ; SCCIOP - unused
|
||
dc.l $00000000 ; OSS - unused
|
||
dc.l $00000000 ; FMC - unused
|
||
dc.l $00000000 ; RPU - unused
|
||
dc.l $00000000 ; unused 21 <SM10>
|
||
dc.l $00000000 ; JAWS - unused <25>
|
||
dc.l $00000000 ; Sonic - unused <45>
|
||
dc.l $00000000 ; 1st (internal) SCSI96 - unused <T9>
|
||
dc.l $00000000 ; 2nd (external) SCSI96 - unused <T9>
|
||
dc.l $00000000 ; DAFB - unused <T26>
|
||
dc.l $00000000 ; unused 27
|
||
dc.l $00000000 ; ROMPhysAddr - unused <T33>
|
||
dc.l $00000000 ; unused 29
|
||
dc.l $00000000 ; unused 30
|
||
dc.l $00000000 ; unused 31
|
||
|
||
|
||
|
||
;———————————————————————————————————————————————————————————————————————————————————————————————
|
||
; RAM Info Tables
|
||
;———————————————————————————————————————————————————————————————————————————————————————————————
|
||
|
||
IF hasMDU THEN ; <SM46>
|
||
RAMInfo2Bank1Meg ; common 2 bank RAM model:
|
||
dc.l $00100000 ; 1 Meg is smallest bank
|
||
dc.l $00000000,$04000000 ; 64 Meg Bank A
|
||
dc.l $04000000,$08000000 ; 64 Meg Bank B
|
||
dc.l $FFFFFFFF ; end of table
|
||
ENDIF ; <SM46>
|
||
|
||
IF hasOrwell | hasYMCA THEN ; <SM47>
|
||
RAMInfo2Bank4Meg ; common 2 bank RAM model:
|
||
dc.l $00400000 ; 4 MB is smallest bank
|
||
dc.l $00000000,$04000000 ; 64 MB Bank A
|
||
dc.l $04000000,$08000000 ; 64 MB Bank B
|
||
dc.l $FFFFFFFF ; end of table
|
||
ENDIF ; <SM47>
|
||
|
||
IF hasVISADecoder THEN
|
||
RamInfoVISA
|
||
dc.l $00100000 ; 1 MB is smallest bank
|
||
dc.l $00000000,$00800000 ; 8 MB Bank A
|
||
dc.l $00800000,$00A00000 ; 2 MB Bank B
|
||
dc.l $FFFFFFFF ; end of table
|
||
RamInfoMacLCII ; Special case 4MB on PCB for LC II <SM20>
|
||
dc.l $00100000 ; 1 MB is smallest bank
|
||
dc.l $00000000,$00400000 ; 4 MB Bank A
|
||
dc.l $00400000,$00800000 ; 4 MB Bank B
|
||
dc.l $FFFFFFFF ; end of table
|
||
ENDIF ; {hasVISADecoder}
|
||
|
||
IF hasOrwell THEN
|
||
RamInfoQuadra900 ; Quadra 900 supports 4 banks of memory
|
||
dc.l $00400000 ; 4 MB is smallest bank
|
||
dc.l $00000000,$04000000 ; 64 MB Bank A
|
||
dc.l $04000000,$08000000 ; 64 MB Bank B
|
||
dc.l $08000000,$0C000000 ; 64 MB Bank C
|
||
dc.l $0C000000,$10000000 ; 64 MB Bank D
|
||
dc.l $FFFFFFFF ; End of table
|
||
|
||
IF forSmurf THEN
|
||
RamInfoRiscQuadra ; Smurf Card supports 1 12M bank of memory
|
||
dc.l $00C00000 ; 12 MB is smallest bank
|
||
dc.l $00000000,$00C00000 ; 12 MB Bank
|
||
dc.l $FFFFFFFF ; End of table
|
||
ENDIF ; {forSmurf}
|
||
ENDIF ; {hasOrwell}
|
||
|
||
IF hasJaws THEN
|
||
RAMInfoJaws
|
||
dc.l $00080000 ; 512K is smallest bank
|
||
dc.l $00000000,$00200000 ; 2 Meg Bank A
|
||
dc.l $00200000,$00400000 ; 2 Meg Bank B
|
||
dc.l $00400000,$00600000 ; 2 Meg Bank C
|
||
dc.l $00600000,$00800000 ; 2 Meg Bank D
|
||
dc.l $FFFFFFFF ; End of table
|
||
ENDIF ; {hasJaws}
|
||
|
||
IF hasNiagra THEN
|
||
RamInfoNiagra
|
||
dc.l $00080000 ; 512K is smallest bank <SM29>
|
||
dc.l $00000000,$00200000 ; 2 Meg Bank 0 <SM29>
|
||
dc.l $00200000,$00400000 ; 2 Meg Bank 1 <SM29>
|
||
dc.l $00400000,$00600000 ; 2 Meg Bank 2 <SM29>
|
||
dc.l $00600000,$00800000 ; 2 Meg Bank 3 <SM29>
|
||
dc.l $00800000,$00A00000 ; 2 Meg Bank 4 <SM29>
|
||
dc.l $00A00000,$00C00000 ; 2 Meg Bank 5 <SM29>
|
||
dc.l $00C00000,$00E00000 ; 2 Meg Bank 6 <SM29>
|
||
dc.l $00E00000,$01000000 ; 2 Meg Bank 7 (16 Meg Total) <SM29>
|
||
dc.l $FFFFFFFF ; End of table
|
||
ENDIF ; {hasNiagra}
|
||
|
||
IF hasMSC THEN
|
||
RAMInfoMSC
|
||
dc.l $00200000 ; 2 Meg is smallest bank allowed
|
||
dc.l $00000000,$00200000 ; 2 Meg Bank A
|
||
dc.l $00200000,$00400000 ; 2 Meg Bank B
|
||
dc.l $00400000,$00600000 ; 2 Meg Bank C
|
||
dc.l $00600000,$00800000 ; 2 Meg Bank D
|
||
dc.l $00800000,$01000000 ; 8 Meg Bank E <H40>
|
||
dc.l $01000000,$01800000 ; 8 Meg Bank F <H40>
|
||
dc.l $01800000,$02000000 ; 8 Meg Bank G <H40>
|
||
dc.l $02000000,$02800000 ; 8 Meg Bank H <H40>
|
||
dc.l $FFFFFFFF ; end of table
|
||
ENDIF ; {hasMSC}
|
||
|
||
IF hasPratt THEN
|
||
RAMInfoPratt
|
||
dc.l $00200000 ; 2 Meg is smallest bank allowed <SM39>
|
||
dc.l $00000000,$00800000 ; 8 Meg Bank A
|
||
dc.l $00800000,$01000000 ; 4 Meg Bank B
|
||
dc.l $01000000,$01800000 ; 8 Meg Bank C
|
||
dc.l $01800000,$02000000 ; 8 Meg Bank D
|
||
dc.l $02000000,$02800000 ; 8 Meg Bank E
|
||
dc.l $02800000,$03000000 ; 8 Meg Bank F
|
||
dc.l $FFFFFFFF ; end of table
|
||
ENDIF ; {hasPratt}
|
||
|
||
IF hasPratt THEN
|
||
EXPORT RamInfoPrattFlash
|
||
RamInfoPrattFlash
|
||
dc.l $00200000 ; 2 Meg is smallest bank allowed <SM39>
|
||
dc.l $00000000,$00800000 ; 8 Meg Bank A
|
||
dc.l $00800000,$01000000 ; 8 Meg Bank B
|
||
dc.l $01000000,$01800000 ; 8 Meg Bank C
|
||
dc.l $01800000,$02000000 ; 8 Meg Bank D
|
||
dc.l $FFFFFFFF ; end of table
|
||
ENDIF ; {hasPratt}
|
||
|
||
IF hasSonora THEN
|
||
RamInfoVail
|
||
dc.l $00100000 ; 1 Meg is smallest bank allowed
|
||
dc.l $00000000,$01000000 ; 16 Meg Bank A/0
|
||
dc.l $01000000,$02000000 ; 16 Meg Bank B/1
|
||
dc.l $02000000,$03000000 ; 16 Meg Bank C/2
|
||
dc.l $03000000,$04000000 ; 16 Meg Bank D/3
|
||
dc.l $04000000,$05000000 ; 16 Meg Bank E/4
|
||
dc.l $FFFFFFFF ; end of table
|
||
ENDIF ; {hasSonora}
|
||
|
||
IF hasDJMEMC THEN
|
||
RamInfoDJMEMC
|
||
dc.l $00400000 ; 4 Meg is smallest bank allowed <SM29>
|
||
dc.l $00000000,$04000000 ; 64 Meg Bank 0 (built in) <SM29>
|
||
dc.l $04000000,$08000000 ; 64 Meg Bank 1 (built in) <SM29>
|
||
dc.l $08000000,$0C000000 ; 64 Meg Bank 2 (SIMM 0A) socket 0 <SM29>
|
||
dc.l $0C000000,$10000000 ; 64 Meg Bank 3 (SIMM 1A) <SM29>
|
||
dc.l $10000000,$14000000 ; 64 Meg Bank 4 (SIMM 0B) socket 1 <SM29>
|
||
dc.l $14000000,$18000000 ; 64 Meg Bank 5 (SIMM 1B) <SM29>
|
||
dc.l $18000000,$1C000000 ; 64 Meg Bank 6 (SIMM 2A) socket 2 <SM29>
|
||
dc.l $1C000000,$20000000 ; 64 Meg Bank 7 (SIMM 3A) <SM29>
|
||
dc.l $53616D42 ; ('SamB') End of 1st half table (Sizebanks can <H49><SM29>
|
||
; only handle 8 banks. So we must break the sizing <SM29>
|
||
dc.l $00400000 ; into two parts.) <SM29>
|
||
dc.l $20000000,$24000000 ; 64 Meg Bank 8 (SIMM 2B) socket 3 <SM29>
|
||
dc.l $24000000,$28000000 ; 64 Meg Bank 9 (SIMM 3B) 640 Meg! Yeah! Can you say<SM29>
|
||
dc.l $FFFFFFFF ; end of table long RAM test?!! <H41><SM29>
|
||
|
||
IF forSmurf THEN
|
||
RamInfoRiscDJMEMC ; Smurf Card supports 1 12M bank of memory <SM47>
|
||
dc.l $00C00000 ; 12 MB is smallest bank
|
||
dc.l $00000000,$00C00000 ; 12 MB Bank
|
||
dc.l $FFFFFFFF ; End of table
|
||
ENDIF ; {forSmurf}
|
||
|
||
ENDIF ; {hasDJMEMC}
|
||
|
||
IF hasYMCA THEN ; <SM46>
|
||
|
||
RamInfoCyclone ; Cyclone EVT4 supports 8 banks of memory
|
||
dc.l $00100000 ; 1 MB is smallest bank
|
||
dc.l $00000000,$01000000 ; 16 MB Bank 0
|
||
dc.l $01000000,$02000000 ; 16 MB Bank 1
|
||
dc.l $02000000,$03000000 ; 16 MB Bank 2
|
||
dc.l $03000000,$04000000 ; 16 MB Bank 3
|
||
dc.l $04000000,$05000000 ; 16 MB Bank 4
|
||
dc.l $05000000,$06000000 ; 16 MB Bank 5
|
||
dc.l $06000000,$07000000 ; 16 MB Bank 6
|
||
dc.l $07000000,$08000000 ; 16 MB Bank 7
|
||
dc.l $FFFFFFFF ; End of table
|
||
|
||
RamInfoTempest ; Tempest supports 8 banks of memory ????
|
||
dc.l $00100000 ; 1 MB is smallest bank
|
||
dc.l $00000000,$01000000 ; 16 MB Bank 0
|
||
dc.l $01000000,$02000000 ; 16 MB Bank 1
|
||
dc.l $02000000,$03000000 ; 16 MB Bank 2
|
||
dc.l $03000000,$04000000 ; 16 MB Bank 3
|
||
dc.l $04000000,$05000000 ; 16 MB Bank 4
|
||
dc.l $05000000,$06000000 ; 16 MB Bank 5
|
||
dc.l $06000000,$07000000 ; 16 MB Bank 6
|
||
dc.l $07000000,$08000000 ; 16 MB Bank 7
|
||
dc.l $FFFFFFFF ; End of table
|
||
|
||
ENDIF ; <SM20><SM46>
|
||
|
||
|
||
IF hasHMC THEN
|
||
RamInfoPDM ; PDM supports .. memory (Emulator maps all into 1 bank)
|
||
dc.l $10000000 ; 256 MB <SM57>
|
||
dc.l $00000000,$10000000 ;
|
||
dc.l $FFFFFFFF ; End of table
|
||
|
||
ENDIF
|
||
|
||
IF hasGrandCentral THEN
|
||
RamInfoTNT ; PDM supports .. memory (Emulator maps all into 1 bank)
|
||
dc.l $10000000 ; 256 MB <SM57>
|
||
dc.l $00000000,$10000000 ;
|
||
dc.l $FFFFFFFF ; End of table
|
||
|
||
ENDIF ; (hasGrandCentral)
|
||
|
||
|
||
;———————————————————————————————————————————————————————————————————————————————————————————————
|
||
; Video Info Tables
|
||
;———————————————————————————————————————————————————————————————————————————————————————————————
|
||
|
||
IF hasVISADecoder THEN ; <SM46>
|
||
VideoInfoVISA
|
||
dc.l $50F40000 ; Physical base address of screen <H23>
|
||
dc.l $50F40000 ; Logical 32 bit base address of screen <H23>
|
||
dc.l $50F40000 ; Logical 24 bit base address of screen <H23>
|
||
dc.b $0B ; Slot number to use for PRAM storage
|
||
dc.b SmPRAMTop+(($0B-$09)*sizeSPRAMRec) ; PRAM address for RBV slot zero
|
||
dc.b sRsrcBFBasedDir ; Use the BoxFlag-based sRsrc directory directory. <H22>
|
||
dc.b 0 ; Use boxFlag to identify board sRsrc. <H11>
|
||
dc.w 0 ; <unused>
|
||
ENDIF ; <SM46>
|
||
|
||
IF hasJaws THEN
|
||
VideoInfoJaws
|
||
dc.l $FEE08000 ; Physical base address of screen
|
||
dc.l $FEE08000 ; Logical 32 bit base address of screen
|
||
dc.l $FEE08000 ; Logical 24 bit base address of screen <39>
|
||
dc.b $0B ; Slot number to use for PRAM storage <25>
|
||
dc.b SmPRAMTop+(($0B-$09)*sizeSPRAMRec) ; PRAM address for slot zero <25>
|
||
dc.b sRsrcBFBasedDir ; Use the BoxFlag-based sRsrc directory directory. <H22>
|
||
dc.b 0 ; Use boxFlag to identify board sRsrc. <H11>
|
||
dc.w 0 ; <unused>
|
||
ENDIF ; {hasJaws}
|
||
|
||
IF hasDAFB THEN
|
||
VideoInfoDAFB ; <T14>
|
||
dc.l $F9000000 ; Physical base address of screen <H19><SM5>
|
||
dc.l $F9000000 ; Logical 32 bit base address of screen <H19><SM5>
|
||
dc.l 0 ; no Logical 24 bit base address for DAFB <T14>
|
||
dc.b $09 ; Slot number to use for PRAM storage <T14>
|
||
dc.b SmPRAMTop+(($09-$09)*sizeSPRAMRec) ; PRAM address for slot zero <T14>
|
||
dc.b sRsrcBFBasedDir ; Use the BoxFlag-based sRsrc directory directory. <H22>
|
||
dc.b 0 ; Use boxFlag to identify board sRsrc. <H11>
|
||
dc.w drHwDAFB ; Uses the DAFB video driver.
|
||
ENDIF ; {hasDAFB}
|
||
|
||
IF hasNiagra THEN
|
||
VideoInfoNiagra
|
||
dc.l $60040000 ; Physical base address of screen <H54><SM29>
|
||
dc.l $60040000 ; Logical 32 bit base address of screen <H54><SM29>
|
||
dc.l $00000000 ; Logical 24 bit base address of screen
|
||
dc.b $0B ; Slot number to use for PRAM storage
|
||
dc.b SmPRAMTop+(($0B-$09)*sizeSPRAMRec) ; PRAM address for slot zero
|
||
dc.b sRsrcBFBasedDir ; Use the BoxFlag-based sRsrc directory directory. <H22>
|
||
dc.b 0 ; Use boxFlag to identify board sRsrc. <H17>
|
||
dc.w drHwGSC ; Uses the GSC (DBLite) video driver.
|
||
ENDIF ; {hasNiagra}
|
||
|
||
IF hasMSC THEN
|
||
VideoInfoMSC
|
||
dc.l $60000000 ; Physical base address of screen
|
||
dc.l $60000000 ; Logical 32 bit base address of screen
|
||
dc.l $00000000 ; Logical 24 bit base address of screen (always access in 32-bit mode)
|
||
dc.b $0B ; Slot number to use for PRAM storage
|
||
dc.b SmPRAMTop+(($0B-$09)*sizeSPRAMRec) ; PRAM address for slot zero
|
||
dc.b sRsrcBFBasedDir ; Use the BoxFlag-based sRsrc directory directory. <H39>
|
||
dc.b 0 ; Use boxFlag to identify board sRsrc. <H17>
|
||
dc.w drHwGSC ; Uses the GSC (DBLite) video driver.
|
||
|
||
VideoInfoEscher
|
||
dc.l $60000000 ; Physical base address of screen
|
||
dc.l $60000000 ; Logical 32 bit base address of screen
|
||
dc.l 0 ; No logical 24-bit address.
|
||
dc.b $0B ; Slot number to use for PRAM storage
|
||
dc.b SmPRAMTop+(($0B-$09)*\ ; PRAM address for slot zero
|
||
sizeSPRAMRec)
|
||
dc.b sRsrcCSCDir ; Use the CSC sRsrc directory directory.
|
||
dc.b sRsrc_BdEscher ; Use the Escher-family board sRsrc.
|
||
dc.w drHwCSC ; Uses the CSC video driver.
|
||
|
||
VideoInfoYeager
|
||
dc.l $60000000 ; Physical base address of screen
|
||
dc.l $60000000 ; Logical 32 bit base address of screen
|
||
dc.l 0 ; No logical 24-bit address.
|
||
dc.b $0B ; Slot number to use for PRAM storage
|
||
dc.b SmPRAMTop+(($0B-$09)*\ ; PRAM address for slot zero
|
||
sizeSPRAMRec)
|
||
dc.b sRsrcCSCDir ; Use the CSC sRsrc directory directory.
|
||
dc.b sRsrc_BdYeager ; Use the Yeager-family board sRsrc.
|
||
dc.w drHwCSC ; Uses the CSC video driver.
|
||
|
||
ENDIF ; {hasMSC}
|
||
|
||
IF hasPratt THEN
|
||
VideoInfoPratt
|
||
dc.l $60000000 ; Physical base address of screen <SM39>
|
||
dc.l $60000000 ; Logical 32 bit base address of screen
|
||
dc.l $00000000 ; No logical 24-bit base address?
|
||
dc.b $0C ; Slot number to use for PRAM storage
|
||
dc.b SmPRAMTop+(($0C-$09)*sizeSPRAMRec) ; PRAM address for slot zero
|
||
dc.b sRsrcCSCDir ; Use the CSC sRsrc directory directory.
|
||
dc.b sRsrc_BdBlackBird ; Use the BlackBird-family board sRsrc.
|
||
dc.w drHwCSC ; Uses the CSC video driver.
|
||
ENDIF ; {hasPratt}
|
||
|
||
IF hasSonora THEN
|
||
VideoInfoVail
|
||
dc.l $60B00000 ; Physical base address of screen <H24><SM29>
|
||
dc.l $60B00000 ; Logical 32-bit base address of screen <H24><SM29>
|
||
dc.l $00B00000 ; Logical 24-bit base address of screen <H24><SM29>
|
||
dc.b $0B ; Slot number to use for PRAM storage <H32>
|
||
dc.b SmPRAMTop+(($0B-$09)*sizeSPRAMRec) ; PRAM address for slot zero <H9>
|
||
dc.b sRsrcSonoraDir ; Use the Sonora sRsrc directory directory. <H17>
|
||
dc.b sRsrc_BDVail ; Use the Vail-Family board sRsrc. <H17>
|
||
dc.w drHwSonora ; Uses the Sonora video driver.
|
||
ENDIF ; {hasSonora}
|
||
|
||
IF hasYMCA THEN ; <SM46>
|
||
VideoInfoCyclone ; <P3>
|
||
dc.l $50100000 ; Physical base address of screen <SM2>
|
||
dc.l $50100000 ; Logical 32 bit base address of screen
|
||
dc.l 0 ; No logical 24-bit base address.
|
||
dc.b $09 ; Slot number to use for PRAM storage
|
||
dc.b SmPRAMTop+(($09-$09)*sizeSPRAMRec) ; PRAM address for slot zero
|
||
dc.b sRsrcCivicDir ; Use the Civic sRsrc directory directory. <P6>
|
||
dc.b sRsrc_BDCyclone ; Use the Cyclone-Family board sRsrc.
|
||
dc.w drHwCivic ; Uses the Civic video driver.
|
||
|
||
VideoInfoTempest ; <P3>
|
||
dc.l $50100000 ; Physical base address of screen
|
||
dc.l $50100000 ; Logical 32 bit base address of screen
|
||
dc.l 0 ; No logical 24-bit base address.
|
||
dc.b $09 ; Slot number to use for PRAM storage
|
||
dc.b SmPRAMTop+(($09-$09)*sizeSPRAMRec) ; PRAM address for slot zero
|
||
dc.b sRsrcCivicDir ; Use the Civic sRsrc directory directory.
|
||
dc.b sRsrc_BDTempest ; Use the Tempest-Family board sRsrc.
|
||
dc.w drHwCivic ; Uses the Civic video driver.
|
||
ENDIF ; <SM46>
|
||
|
||
IF hasHMC THEN ; <SM46>
|
||
VideoInfoPDM
|
||
dc.l $00000000 ; Physical base address of screen
|
||
dc.l $60B00000 ; Logical 32-bit base address of screen
|
||
dc.l 0 ; No logical 24-bit base address.
|
||
dc.b $09 ; Slot number to use for PRAM storage
|
||
dc.b SmPRAMTop+(($09-$09)*sizeSPRAMRec) ; PRAM address for slot zero
|
||
dc.b sRsrcSonoraDir ; Use the Sonora sRsrc directory directory.
|
||
dc.b sRsrc_BdPDM ; Use the PDM-family board sRsrc.
|
||
dc.w drHwSonora ; Uses the Sonora video driver.
|
||
ENDIF ; <SM46>
|
||
|
||
IF hasGrandCentral THEN ; <SM46>
|
||
VideoInfoTNT
|
||
dc.l $E0200000 ; Physical base address of screen
|
||
dc.l $E0200000 ; Logical 32-bit base address of screen
|
||
dc.l 0 ; No logical 24-bit base address.
|
||
dc.b $0E ; Slot number to use for PRAM storage
|
||
dc.b SmPRAMTop+(($0E-$09)*sizeSPRAMRec) ; PRAM address for slot zero
|
||
dc.b sRsrcATIDir ; Use the ATI sRsrc directory directory.
|
||
dc.b 1 ; Use the ATI-family board sRsrc.
|
||
; dc.b sRsrc_BdATI ; Use the PDM-family board sRsrc.
|
||
dc.w drHwATI ; Uses the ATI video driver.
|
||
ENDIF ; <SM46>
|
||
|
||
|
||
|
||
;———————————————————————————————————————————————————————————————————————————————————————————————
|
||
; NuBus Info Tables
|
||
;———————————————————————————————————————————————————————————————————————————————————————————————
|
||
|
||
IF hasVISADecoder THEN
|
||
NuBusInfoVISA ; beginning of change <24><4>
|
||
dc.b 0|(1<<hasPRAM)|(1<<canInterrupt) ; slot 0
|
||
dc.b 0|\ ; slot 1
|
||
(1<<slotDisabled)
|
||
dc.b 0|\ ; slot 2
|
||
(1<<slotDisabled)
|
||
dc.b 0|\ ; slot 3
|
||
(1<<slotDisabled)
|
||
dc.b 0|\ ; slot 4
|
||
(1<<slotDisabled)
|
||
dc.b 0|\ ; slot 5
|
||
(1<<slotDisabled)
|
||
dc.b 0|\ ; slot 6
|
||
(1<<slotDisabled)
|
||
dc.b 0|\ ; slot 7
|
||
(1<<slotDisabled)
|
||
dc.b 0|\ ; slot 8
|
||
(1<<slotDisabled)
|
||
dc.b 0|\ ; slot 9
|
||
(1<<hasPRAM)|\
|
||
(1<<slotDisabled)
|
||
dc.b 0|\ ; slot A
|
||
(1<<hasPRAM)|\
|
||
(1<<slotReserved) ; <H20>
|
||
dc.b 0|\ ; slot B
|
||
(1<<slotReserved) ; <H20>
|
||
dc.b 0|\ ; slot C
|
||
(1<<hasPRAM)|\
|
||
(1<<slotReserved) ; <H20>
|
||
dc.b 0|\ ; slot D
|
||
(1<<hasPRAM)|\
|
||
(1<<slotReserved) ; <H20>
|
||
dc.b 0|\ ; slot E
|
||
(1<<hasPRAM)|\
|
||
(1<<canInterrupt)|\
|
||
(1<<directSlot)
|
||
dc.b 0 ; slot F (end of change)
|
||
ENDIF ; {hasVISADecoder}
|
||
|
||
|
||
|
||
IF hasOrwell THEN
|
||
NuBusInfoQuadra700 ; slot info for Quadra 700 <T7>
|
||
dc.b 0|(1<<hasPRAM)|(1<<canInterrupt) ; slot 0
|
||
dc.b 0 ; slot 1
|
||
dc.b 0 ; slot 2
|
||
dc.b 0 ; slot 3
|
||
dc.b 0 ; slot 4
|
||
dc.b 0 ; slot 5
|
||
dc.b 0 ; slot 6
|
||
dc.b 0 ; slot 7
|
||
dc.b 0 ; slot 8
|
||
dc.b 0|\ ; slot 9 ("slot" space used for on-board video,
|
||
(1<<slotDisabled)|\ ; but the interrupt used for ethernet)
|
||
(1<<canInterrupt) ;
|
||
dc.b 0 ; slot A
|
||
dc.b 0 ; slot B
|
||
dc.b 0 ; slot C
|
||
dc.b 0|\ ; slot D
|
||
(1<<hasPRAM)|\
|
||
(1<<canInterrupt)|\
|
||
(1<<hasConnector)
|
||
dc.b 0|\ ; slot E (either Slot E or PDS, if card present)
|
||
(1<<hasPRAM)|\ ;
|
||
(1<<canInterrupt)|\ ;
|
||
(1<<hasConnector) ;
|
||
dc.b 0 ; slot F
|
||
|
||
NuBusInfoQuadra900 ; slot info for 040 Quadra 900 <24>
|
||
dc.b 0|(1<<hasPRAM)|(1<<canInterrupt) ; slot 0
|
||
dc.b 0 ; slot 1
|
||
dc.b 0 ; slot 2
|
||
dc.b 0 ; slot 3
|
||
dc.b 0 ; slot 4
|
||
dc.b 0 ; slot 5
|
||
dc.b 0 ; slot 6
|
||
dc.b 0 ; slot 7
|
||
dc.b 0 ; slot 8
|
||
dc.b 0|\ ; slot 9 ("slot" space used for on-board video) <47>
|
||
(1<<slotDisabled)|\ ; this should not currently be looked at <47>
|
||
(1<<canInterrupt) ; by the SlotMgr. <47>
|
||
dc.b 0|\ ; slot A
|
||
(1<<hasPRAM)|\
|
||
(1<<canInterrupt)|\
|
||
(1<<hasConnector)
|
||
dc.b 0|\ ; slot B
|
||
(1<<hasPRAM)|\
|
||
(1<<canInterrupt)|\
|
||
(1<<hasConnector)
|
||
dc.b 0|\ ; slot C
|
||
(1<<hasPRAM)|\
|
||
(1<<canInterrupt)|\
|
||
(1<<hasConnector)
|
||
dc.b 0|\ ; slot D
|
||
(1<<hasPRAM)|\
|
||
(1<<canInterrupt)|\
|
||
(1<<hasConnector)
|
||
dc.b 0|\ ; slot E (either Slot E or PDS, if card present) <47>
|
||
(1<<hasPRAM)|\ ; <47>
|
||
(1<<canInterrupt)|\ ; <47>
|
||
(1<<hasConnector) ; <47>
|
||
dc.b 0 ; slot F
|
||
ENDIF ; {hasOrwell}
|
||
|
||
IF hasJaws THEN
|
||
NuBusInfoJaws
|
||
dc.b 0|(1<<hasPRAM)|(1<<canInterrupt) ; slot 0
|
||
dc.b 0 ; slot 1
|
||
dc.b 0 ; slot 2
|
||
dc.b 0 ; slot 3
|
||
dc.b 0 ; slot 4
|
||
dc.b 0 ; slot 5
|
||
dc.b 0 ; slot 6
|
||
dc.b 0 ; slot 7
|
||
dc.b 0 ; slot 8
|
||
dc.b 0|(1<<slotDisabled) ; slot 9
|
||
dc.b 0|(1<<slotDisabled) ; slot A
|
||
dc.b 0|(1<<slotDisabled) ; slot B
|
||
dc.b 0|(1<<slotDisabled) ; slot C
|
||
dc.b 0|(1<<slotDisabled) ; slot D
|
||
dc.b 0|(1<<slotDisabled) ; slot E
|
||
dc.b 0 ; slot F
|
||
ENDIF ; {hasJaws}
|
||
|
||
IF hasNiagra THEN
|
||
NuBusInfoNiagra
|
||
dc.b 0|\ ; slot 0 <H54>
|
||
(1<<hasPRAM)|\ ; |
|
||
(1<<canInterrupt) ; v
|
||
dc.b 0 ; slot 1
|
||
dc.b 0 ; slot 2
|
||
dc.b 0 ; slot 3
|
||
dc.b 0 ; slot 4
|
||
dc.b 0 ; slot 5
|
||
dc.b 0|\ ; slot 6 <=== LCD video goes here
|
||
(1<<slotDisabled) ;
|
||
dc.b 0 ; slot 7
|
||
dc.b 0 ; slot 8
|
||
dc.b 0|\ ; slot 9 <=== Bus Err from Niagra
|
||
(1<<slotDisabled) ;
|
||
dc.b 0|\ ; slot A <=== Bus Err from Niagra
|
||
(1<<slotDisabled) ;
|
||
dc.b 0|\ ; slot B <=== PRAM used for LCD video
|
||
(1<<slotDisabled) ;
|
||
dc.b 0|\ ; slot C <=== Monet
|
||
(1<<hasPRAM)|\ ;
|
||
(1<<canInterrupt) ;
|
||
dc.b 0|\ ; slot D <=== Monet
|
||
(1<<hasPRAM)|\ ;
|
||
(1<<canInterrupt) ;
|
||
dc.b 0|\ ; slot E <=== External VSC video goes here
|
||
(1<<hasPRAM)|\ ;
|
||
(1<<canInterrupt)|\ ;
|
||
(1<<dockingSlot) ;
|
||
dc.b 0 ; slot F <H54>
|
||
ENDIF ; {hasNiagra}
|
||
|
||
IF hasMSC THEN
|
||
NuBusInfoMSC
|
||
dc.b 0|(1<<hasPRAM)|(1<<canInterrupt) ; slot 0
|
||
dc.b 0 ; slot 1
|
||
dc.b 0 ; slot 2
|
||
dc.b 0 ; slot 3
|
||
dc.b 0 ; slot 4
|
||
dc.b 0 ; slot 5
|
||
dc.b 0|(1<<slotDisabled) ; slot 6 <=== video goes here
|
||
dc.b 0 ; slot 7
|
||
dc.b 0 ; slot 8
|
||
dc.b 0|(1<<slotDisabled) ; slot 9 <=== PRAM used for Power Manager
|
||
dc.b 0 ; slot A
|
||
dc.b 0|(1<<slotDisabled) ; slot B <=== PRAM used for LCD video
|
||
dc.b 0|\ ; slot C <=== NuBus slot on docking station
|
||
(1<<hasPRAM)|\
|
||
(1<<canInterrupt)|\
|
||
(1<<hasConnector)
|
||
dc.b 0|\ ; slot D <=== NuBus slot on docking station
|
||
(1<<hasPRAM)|\
|
||
(1<<canInterrupt)|\
|
||
(1<<hasConnector)
|
||
dc.b 0|\ ; slot E <=== connector bars go here
|
||
(1<<hasPRAM)|\
|
||
(1<<canInterrupt)|\
|
||
(1<<directSlot)|\
|
||
(1<<dockingSlot)
|
||
dc.b 0 ; slot F
|
||
ENDIF ; {hasMSC}
|
||
|
||
IF hasPratt THEN
|
||
NuBusInfoPratt
|
||
dc.b 0|\ ; slot 0 <=== CSC video goes here <SM39>
|
||
(1<<hasPRAM)|\
|
||
(1<<canInterrupt)
|
||
dc.b 0|\ ; slot 1
|
||
(1<<slotDisabled)
|
||
dc.b 0|\ ; slot 2
|
||
(1<<slotDisabled)
|
||
dc.b 0|\ ; slot 3
|
||
(1<<slotDisabled)
|
||
dc.b 0|\ ; slot 4
|
||
(1<<slotDisabled)
|
||
dc.b 0|\ ; slot 5
|
||
(1<<slotDisabled)
|
||
dc.b 0|\ ; slot 6 <=== LCD video goes here
|
||
(1<<slotDisabled) ;
|
||
dc.b 0|\ ; slot 7
|
||
(1<<slotDisabled)
|
||
dc.b 0|\ ; slot 8
|
||
(1<<slotDisabled)
|
||
dc.b 0|\ ; slot 9 <=== PRAM used for Power Manager
|
||
(1<<slotDisabled) ;
|
||
dc.b 0|\ ; slot A <=== PDS Slot
|
||
(1<<hasPRAM)|\
|
||
(1<<canInterrupt)
|
||
dc.b 0|\ ; slot B <=== Comms card Slot
|
||
(1<<hasPRAM)|\
|
||
(1<<canInterrupt)
|
||
dc.b 0|\ ; slot C
|
||
(1<<slotDisabled)
|
||
dc.b 0|\ ; slot D
|
||
(1<<slotDisabled) ;
|
||
dc.b 0|\ ; slot E <=== External VSC video goes here
|
||
(1<<hasPRAM)|\ ;
|
||
(1<<canInterrupt)|\ ;
|
||
(1<<dockingSlot) ;
|
||
dc.b 0|\ ; slot F
|
||
(1<<slotDisabled) ;
|
||
ENDIF ; {hasPratt}
|
||
|
||
IF hasSonora THEN
|
||
NuBusInfoVail
|
||
dc.b 0|(1<<hasPRAM)|(1<<canInterrupt) ; slot 0
|
||
dc.b 0 ; slot 1
|
||
dc.b 0 ; slot 2
|
||
dc.b 0 ; slot 3
|
||
dc.b 0 ; slot 4
|
||
dc.b 0 ; slot 5
|
||
dc.b 0|(1<<slotDisabled) ; slot 6 <=== Video goes here for 32 bit mode <H32>
|
||
dc.b 0 ; slot 7
|
||
dc.b 0 ; slot 8
|
||
dc.b 0 ; slot 9
|
||
dc.b 0 ; slot A
|
||
dc.b 0|(1<<slotDisabled) ; slot B <=== PRAM used for video, 24 bit video space <H32>
|
||
dc.b 0|(1<<hasPRAM)|(1<<canInterrupt) ; slot C
|
||
dc.b 0|(1<<hasPRAM)|(1<<canInterrupt) ; slot D
|
||
dc.b 0|(1<<hasPRAM)|(1<<canInterrupt) ; slot E
|
||
dc.b 0 ; slot F
|
||
ENDIF ; {hasSonora}
|
||
|
||
IF hasDJMEMC THEN
|
||
NuBusInfoWombat ; similar to Quadra700 except it has 3 slots, not 2 <H41> thru next <H41>
|
||
dc.b 0|(1<<hasPRAM)|(1<<canInterrupt) ; slot 0
|
||
dc.b 0 ; slot 1
|
||
dc.b 0 ; slot 2
|
||
dc.b 0 ; slot 3
|
||
dc.b 0 ; slot 4
|
||
dc.b 0 ; slot 5
|
||
dc.b 0 ; slot 6
|
||
dc.b 0 ; slot 7
|
||
dc.b 0 ; slot 8
|
||
dc.b 0|\ ; slot 9 ("slot" space used for on-board video,
|
||
(1<<slotDisabled)|\ ; interrupt used for built-in ethernet)
|
||
(1<<canInterrupt) ;
|
||
dc.b 0 ; slot A
|
||
dc.b 0 ; slot B
|
||
dc.b 0|\ ; slot C
|
||
(1<<hasPRAM)|\
|
||
(1<<canInterrupt)|\
|
||
(1<<hasConnector)
|
||
dc.b 0|\ ; slot D
|
||
(1<<hasPRAM)|\
|
||
(1<<canInterrupt)|\
|
||
(1<<hasConnector)
|
||
dc.b 0|\ ; slot E (either Slot E or PDS, if card present)
|
||
(1<<hasPRAM)|\ ;
|
||
(1<<canInterrupt)|\ ;
|
||
(1<<hasConnector) ;
|
||
dc.b 0 ; slot F
|
||
|
||
NuBusInfoWLCD ; slot info for WLCD(s)
|
||
dc.b 0|\ ; slot 0
|
||
(1<<hasPRAM)|\
|
||
(1<<canInterrupt)
|
||
dc.b 0 ; slot 1
|
||
dc.b 0 ; slot 2
|
||
dc.b 0 ; slot 3
|
||
dc.b 0 ; slot 4
|
||
dc.b 0 ; slot 5
|
||
dc.b 0 ; slot 6
|
||
dc.b 0 ; slot 7
|
||
dc.b 0 ; slot 8
|
||
dc.b 0|\ ; slot 9 ("slot" space used for on-board video,
|
||
(1<<slotDisabled)|\ ; interrupt used for built-in ethernet)
|
||
(1<<canInterrupt) ;
|
||
dc.b 0 ; slot A
|
||
dc.b 0 ; slot B
|
||
dc.b 0 ; slot C
|
||
dc.b 0 ; slot D
|
||
dc.b 0|\ ; slot E (PDS or NuBus adapter, if card present)
|
||
(1<<hasPRAM)|\ ;
|
||
(1<<canInterrupt)|\ ;
|
||
(1<<hasConnector) ;
|
||
dc.b 0 ; slot F <H41>
|
||
ENDIF ; {hasDJMEMC}
|
||
|
||
IF hasYMCA THEN ; <SM46>
|
||
NuBusInfoCyclone ; <SM2>
|
||
dc.b 0|(1<<hasPRAM)|(1<<canInterrupt) ; slot 0 -> Built-in Video, Ethernet, etc….
|
||
dc.b 0 ; slot 1
|
||
dc.b 0 ; slot 2
|
||
dc.b 0 ; slot 3
|
||
dc.b 0 ; slot 4
|
||
dc.b 0|(1<<slotDisabled) ; slot 5 -> Built-in video’s VRAM is here (Super5).
|
||
dc.b 0 ; slot 6
|
||
dc.b 0 ; slot 7
|
||
dc.b 0 ; slot 8
|
||
dc.b 0|(1<<slotDisabled) ; slot 9 -> Built-in Video PRAM
|
||
dc.b 0|\ ; slot A
|
||
(1<<hasPRAM)
|
||
dc.b 0|\ ; slot B
|
||
(1<<hasPRAM)
|
||
dc.b 0|\ ; slot C -> Physical Slot.
|
||
(1<<hasPRAM)|\
|
||
(1<<canInterrupt)|\
|
||
(1<<hasConnector)
|
||
dc.b 0|\ ; slot D -> Physical Slot.
|
||
(1<<hasPRAM)|\
|
||
(1<<canInterrupt)|\
|
||
(1<<hasConnector)
|
||
dc.b 0|\ ; slot E -> Physical Slot.
|
||
(1<<hasPRAM)|\ ;
|
||
(1<<canInterrupt)|\ ;
|
||
(1<<hasConnector) ;
|
||
|
||
dc.b 0 ; slot F -> End of table (Slot Manager/VM doesn’t use).
|
||
|
||
NuBusInfoTempest ; <SM26>
|
||
dc.b 0|(1<<hasPRAM)|(1<<canInterrupt) ; slot 0 -> Built-in Video, Ethernet, etc….
|
||
dc.b 0 ; slot 1
|
||
dc.b 0 ; slot 2
|
||
dc.b 0 ; slot 3
|
||
dc.b 0 ; slot 4
|
||
dc.b 0|(1<<slotDisabled) ; slot 5 -> Built-in video’s VRAM is here (Super5).
|
||
dc.b 0 ; slot 6
|
||
dc.b 0 ; slot 7
|
||
dc.b 0 ; slot 8
|
||
dc.b 0|(1<<slotDisabled) ; slot 9 -> Built-in Video PRAM
|
||
dc.b 0|\ ; slot A
|
||
(1<<hasPRAM)
|
||
dc.b 0|\ ; slot B
|
||
(1<<hasPRAM)
|
||
dc.b 0|\ ; slot C
|
||
(1<<hasPRAM)|\
|
||
(1<<canInterrupt)|\
|
||
(1<<directSlot)
|
||
dc.b 0|\ ; slot D
|
||
(1<<hasPRAM)|\
|
||
(1<<canInterrupt)|\
|
||
(1<<directSlot)
|
||
dc.b 0|\ ; slot E -> Physical Slot.
|
||
(1<<hasPRAM)|\
|
||
(1<<canInterrupt)|\
|
||
(1<<hasConnector) ;
|
||
dc.b 0 ; slot F -> End of table (Slot Manager/VM doesn’t use).
|
||
ENDIF ; {hasYMCA} <SM46>
|
||
|
||
IF hasHMC THEN ; <SM46>
|
||
NuBusInfoPDM
|
||
dc.b 0|(1<<hasPRAM)|(1<<canInterrupt) ; slot 0 -> Built-in Video, Ethernet, etc….
|
||
dc.b 0 ; slot 1 -> ???
|
||
dc.b 0 ; slot 2 -> ???
|
||
dc.b 0 ; slot 3 -> ???
|
||
dc.b 0 ; slot 4 -> ???
|
||
dc.b 0 ; slot 5 ->
|
||
dc.b 0|\ ; slot 6 -> ???
|
||
(1<<slotDisabled)|\
|
||
(1<<hasPRAM)
|
||
dc.b 0 ; slot 7 -> ???
|
||
dc.b 0 ; slot 8 -> ???
|
||
dc.b 0|\ ; slot 9 -> Built-in Video PRAM, Ethernet interrupts,
|
||
(1<<slotDisabled)|\ ; 2nd Meg of ROM in 24-bit mode.
|
||
(1<<canInterrupt) ;
|
||
dc.b 0 ; slot A -> ???
|
||
dc.b 0 ; slot B -> ???
|
||
dc.b 0 ; slot C -> ???
|
||
dc.b 0 ; slot D -> ???
|
||
dc.b 0|\ ; slot E -> Physical Slot.
|
||
(1<<hasPRAM)|\ ;
|
||
(1<<canInterrupt)|\ ;
|
||
(1<<hasConnector) ;
|
||
dc.b 0 ; slot F -> End of table (Slot Manager/VM doesn’t use).
|
||
|
||
NuBusInfoCFusion
|
||
dc.b 0|(1<<hasPRAM)|(1<<canInterrupt) ; slot 0 -> Built-in Video, Ethernet, etc….
|
||
dc.b 0 ; slot 1 -> ???
|
||
dc.b 0 ; slot 2 -> ???
|
||
dc.b 0 ; slot 3 -> ???
|
||
dc.b 0 ; slot 4 -> ???
|
||
dc.b 0 ; slot 5 ->
|
||
dc.b 0|\ ; slot 6 -> ???
|
||
(1<<slotDisabled)|\
|
||
(1<<hasPRAM)
|
||
dc.b 0 ; slot 7 -> ???
|
||
dc.b 0 ; slot 8 -> ???
|
||
dc.b 0|\ ; slot 9 -> Built-in Video PRAM, Ethernet interrupts,
|
||
(1<<slotDisabled)|\ ; 2nd Meg of ROM in 24-bit mode.
|
||
(1<<canInterrupt) ;
|
||
dc.b 0 ; slot A -> ???
|
||
dc.b 0|\ ; slot B -> Physical Slot.
|
||
(1<<hasPRAM)|\
|
||
(1<<canInterrupt)|\
|
||
(1<<hasConnector)
|
||
dc.b 0|\ ; slot C -> Physical Slot.
|
||
(1<<hasPRAM)|\
|
||
(1<<canInterrupt)|\
|
||
(1<<hasConnector)
|
||
dc.b 0|\ ; slot D -> Physical Slot.
|
||
(1<<hasPRAM)|\
|
||
(1<<canInterrupt)|\
|
||
(1<<hasConnector)
|
||
dc.b 0|\ ; slot E -> Video Expansion (HPV or Plinaria).
|
||
(1<<hasPRAM)|\ ;
|
||
(1<<canInterrupt)|\ ;
|
||
(1<<hasConnector) ;
|
||
dc.b 0 ; slot F -> End of table (Slot Manager/VM doesn’t use).
|
||
|
||
ENDIF ; {hasHMC} <SM46>
|
||
|
||
IF hasGrandCentral THEN ; <SM46>
|
||
NuBusInfoTNT
|
||
dc.b 0|(1<<hasPRAM)|(1<<canInterrupt) ; slot 0 -> Built-in Video, Ethernet, etc….
|
||
dc.b 0|\ ; slot 1 -> ???
|
||
(1<<slotDisabled)
|
||
dc.b 0|\ ; slot 2 -> ???
|
||
(1<<slotDisabled)
|
||
dc.b 0|\ ; slot 3 -> ???
|
||
(1<<slotDisabled)
|
||
dc.b 0|\ ; slot 4 -> ???
|
||
(1<<slotDisabled)
|
||
dc.b 0|\ ; slot 5 -> ???
|
||
(1<<slotDisabled)
|
||
dc.b 0|\ ; slot 6 -> ???
|
||
(1<<slotDisabled)
|
||
dc.b 0|\ ; slot 7 -> ???
|
||
(1<<slotDisabled)
|
||
dc.b 0|\ ; slot 8 -> ???
|
||
(1<<slotDisabled) ;
|
||
dc.b 0|\ ; slot 9 -> ???
|
||
(1<<slotDisabled) ;
|
||
dc.b 0|\ ; slot A -> ???
|
||
(1<<slotDisabled)
|
||
dc.b 0|\ ; slot B -> ???
|
||
(1<<slotDisabled)
|
||
dc.b 0|\ ; slot C -> ???
|
||
(1<<slotDisabled)|\
|
||
(1<<hasPRAM)
|
||
dc.b 0|\ ; slot D -> ???
|
||
(1<<slotDisabled)|\
|
||
(1<<hasPRAM)
|
||
dc.b 0|\ ; slot E -> ???.
|
||
(1<<slotDisabled)|\
|
||
(1<<hasPRAM)
|
||
dc.b 0 ; slot F -> End of table (Slot Manager/VM doesn’t use).
|
||
|
||
ENDIF ; (hasGrandCentral)
|
||
|
||
|
||
IconTable ; <SM74>
|
||
IF hasOSS THEN
|
||
IconInfo6Slot ; Macintosh II,IIx,IIfx table
|
||
dc.l DisketteIcon-IconInfo6Slot ; drive 1 logical icon,
|
||
dc.l Right6SlotIcon-IconInfo6Slot ; physical icon,
|
||
dc.w $0003 ; primary int removable, 800K Sony
|
||
|
||
dc.l DisketteIcon-IconInfo6Slot ; drive 2 logical icon,
|
||
dc.l Left6SlotIcon-IconInfo6Slot ; physical icon,
|
||
dc.w $0803 ; secondary int removable, 800K Sony
|
||
ENDIF
|
||
|
||
IF hasMDU THEN ;
|
||
IconInfo3Slot ; Macintosh IIcx/Aurora table
|
||
dc.l DisketteIcon-IconInfo3Slot ; drive 1 logical icon,
|
||
dc.l Int3SlotIcon-IconInfo3Slot ; physical icon (small box)
|
||
dc.w $0003 ; primary int removable, 800K Sony
|
||
|
||
dc.l DisketteIcon-IconInfo3Slot ; drive 2 logical icon,
|
||
dc.l Ext3SlotIcon-IconInfo3Slot ; physical icon, (small box)
|
||
dc.w $0103 ; primary ext removable 800K Sony
|
||
|
||
IconInfoMacIIsi ; Macintosh IIsi table
|
||
dc.l DisketteIcon-IconInfoMacIIsi ; drive 1 logical icon,
|
||
dc.l IntMacIIsiIcon-IconInfoMacIIsi ; physical icon (small box)
|
||
dc.w $0003 ; primary int removable, 800K Sony
|
||
|
||
dc.l DisketteIcon-IconInfoMacIIsi ; drive 2 logical icon,
|
||
dc.l ExtMacIIsiIcon-IconInfoMacIIsi ; physical icon, (small box)
|
||
dc.w $0103 ; primary ext removable 800K Sony
|
||
ENDIF
|
||
|
||
IF hasVISADecoder | hasSonora THEN
|
||
IconInfoMacLC ; Macintosh LC Table
|
||
dc.l DisketteIcon-IconInfoMacLC ; drive 1 logical icon,
|
||
dc.l RightMacLCIcon-IconInfoMacLC ; physical icon,
|
||
dc.w $0004 ; primary int removable, SuperDrive
|
||
|
||
dc.l DisketteIcon-IconInfoMacLC ; drive 2 logical icon,
|
||
dc.l LeftMacLCIcon-IconInfoMacLC ; physical icon,
|
||
dc.w $0804 ; secondary int removable, SuperDrive
|
||
ENDIF
|
||
|
||
IF hasOrwell THEN
|
||
IconInfoQuadra700 ; Quadra 700 Table
|
||
dc.l DisketteIcon-IconInfoQuadra700 ; drive 1 logical icon,
|
||
dc.l Quadra700Icon-IconInfoQuadra700 ; physical icon,
|
||
dc.w $0004 ; primary int removable, SuperDrive
|
||
|
||
dc.l DisketteIcon-IconInfoQuadra700 ; drive 2 logical icon,
|
||
dc.l Quadra700Icon-IconInfoQuadra700 ; physical icon,
|
||
dc.w $0104 ; secondary ext removable, SuperDrive (Actually there is none...)
|
||
|
||
IconInfoQuadra900 ; Quadra 900/950 Table
|
||
dc.l DisketteIcon-IconInfoQuadra900 ; drive 1 logical icon,
|
||
dc.l Quadra900Icon-IconInfoQuadra900 ; physical icon,
|
||
dc.w $0004 ; primary int removable, SuperDrive
|
||
|
||
dc.l DisketteIcon-IconInfoQuadra900 ; drive 2 logical icon,
|
||
dc.l Quadra900Icon-IconInfoQuadra900 ; physical icon,
|
||
dc.w $0104 ; secondary ext removable, SuperDrive (Actually there is none...)
|
||
ENDIF
|
||
|
||
IF hasJaws | hasNiagra | hasPratt THEN ;
|
||
IconInfoTim ; Tim Table
|
||
dc.l DisketteIcon-IconInfoTim ; drive 1 logical icon,
|
||
dc.l TimIcon-IconInfoTim ; physical icon,
|
||
dc.w $0004 ; primary int removable, SuperDrive
|
||
|
||
dc.l DisketteIcon-IconInfoTim ; drive 2 logical icon,
|
||
dc.l TimIcon-IconInfoTim ; physical icon,
|
||
dc.w $0104 ; secondary ext removable, SuperDrive (Actually there is none...)
|
||
ENDIF
|
||
|
||
IF hasMSC THEN
|
||
IconInfoDBLite ; DB-Lite table
|
||
dc.l DisketteIcon-IconInfoDBLite ; drive 1 logical icon,
|
||
dc.l DBLiteIcon-IconInfoDBLite ; physical icon,
|
||
dc.w $0104 ; primary ext removable, SuperDrive
|
||
|
||
dc.l DisketteIcon-IconInfoDBLite ; drive 2 logical icon,
|
||
dc.l DBLiteIcon-IconInfoDBLite ; physical icon,
|
||
dc.w $0904 ; secondary ext removable, SuperDrive
|
||
ENDIF
|
||
|
||
IF hasDJMEMC | hasYMCA | hasHMC THEN ;
|
||
IconInfoLego ; Wombat (or others) in a Lego package
|
||
dc.l DisketteIcon-IconInfoLego ; drive 1 logical icon,
|
||
dc.l LegoIcon-IconInfoLego ; physical icon,
|
||
dc.w $0004 ; primary int removable, SuperDrive
|
||
|
||
dc.l DisketteIcon-IconInfoLego ; drive 2 logical icon,
|
||
dc.l LegoIcon-IconInfoLego ; physical icon,
|
||
dc.w $0104 ; secondary ext removable, SuperDrive (Actually there is none...)
|
||
|
||
IconInfoFrigidaire ; Wombat (or others) in a Frigidaire package
|
||
dc.l DisketteIcon-IconInfoFrigidaire ; drive 1 logical icon,
|
||
dc.l FrigidaireIcon-IconInfoFrigidaire ; physical icon,
|
||
dc.w $0004 ; primary int removable, SuperDrive
|
||
|
||
dc.l DisketteIcon-IconInfoFrigidaire ; drive 2 logical icon,
|
||
dc.l FrigidaireIcon-IconInfoFrigidaire ; physical icon,
|
||
dc.w $0104 ; secondary ext removable, SuperDrive (Actually there is none...)
|
||
|
||
IconInfoQFC ; WLCD, PDM (or others) in a QFC package
|
||
dc.l DisketteIcon-IconInfoQFC ; drive 1 logical icon,
|
||
dc.l QFCIcon-IconInfoQFC ; physical icon,
|
||
dc.w $0004 ; primary int removable, SuperDrive
|
||
|
||
dc.l DisketteIcon-IconInfoQFC ; drive 2 logical icon,
|
||
dc.l QFCIcon-IconInfoQFC ; physical icon,
|
||
dc.w $0104 ; secondary ext removable, SuperDrive (Actually there is none...)
|
||
ENDIF ;
|
||
|
||
|
||
|
||
|
||
|
||
DisketteIcon
|
||
dc.w $7FFF,$FFF8,$8100,$0104,$8100,$7102,$8100,$8901
|
||
dc.w $8100,$8901,$8100,$8901,$8100,$8901,$8100,$8901
|
||
dc.w $8100,$7101,$8100,$0101,$80FF,$FE01,$8000,$0001
|
||
dc.w $8000,$0001,$8000,$0001,$8000,$0001,$8000,$0001
|
||
dc.w $8000,$0001,$8000,$0001,$87FF,$FFE1,$8800,$0011
|
||
dc.w $8800,$0011,$8800,$0011,$8800,$0011,$8800,$0011
|
||
dc.w $8800,$0011,$8800,$0011,$8800,$0011,$8800,$0011
|
||
dc.w $8800,$0011,$8800,$0011,$8800,$0011,$7FFF,$FFFE
|
||
dc.w $7FFF,$FFF8,$FFFF,$FFFC,$FFFF,$FFFE,$FFFF,$FFFF
|
||
dc.w $FFFF,$FFFF,$FFFF,$FFFF,$FFFF,$FFFF,$FFFF,$FFFF
|
||
dc.w $FFFF,$FFFF,$FFFF,$FFFF,$FFFF,$FFFF,$FFFF,$FFFF
|
||
dc.w $FFFF,$FFFF,$FFFF,$FFFF,$FFFF,$FFFF,$FFFF,$FFFF
|
||
dc.w $FFFF,$FFFF,$FFFF,$FFFF,$FFFF,$FFFF,$FFFF,$FFFF
|
||
dc.w $FFFF,$FFFF,$FFFF,$FFFF,$FFFF,$FFFF,$FFFF,$FFFF
|
||
dc.w $FFFF,$FFFF,$FFFF,$FFFF,$FFFF,$FFFF,$FFFF,$FFFF
|
||
dc.w $FFFF,$FFFF,$FFFF,$FFFF,$FFFF,$FFFF,$7FFF,$FFFE
|
||
dc.w $0 ;old HD-20 driver drive ID string (null here)
|
||
|
||
_AssumeEq (DisketteIcon-IconTable),((DisketteIcon-IconTable)>>1)<<1
|
||
|
||
|
||
IF hasOSS THEN
|
||
; Mac II Left Sony icon
|
||
|
||
Left6SlotIcon
|
||
dc.w $0000,$0000,$0000,$0000,$0000,$0000,$0000,$0000
|
||
dc.w $0000,$0000,$0000,$0000,$0000,$0000,$0000,$0000
|
||
dc.w $0000,$0000,$0000,$0000,$0000,$0000,$FFFF,$FFFF
|
||
dc.w $8000,$0001,$8000,$0001,$903F,$C7F9,$8000,$0001
|
||
dc.w $8004,$0001,$800E,$0001,$801F,$0001,$8004,$0001
|
||
dc.w $8004,$0001,$8004,$0001,$8000,$0001,$FFFF,$FFFF
|
||
dc.w $0000,$0000,$0000,$0000,$0000,$0000,$0000,$0000
|
||
dc.w $0000,$0000,$0000,$0000,$0000,$0000,$0000,$0000
|
||
dc.w $0000,$0000,$0000,$0000,$0000,$0000,$0000,$0000
|
||
dc.w $0000,$0000,$0000,$0000,$0000,$0000,$0000,$0000
|
||
dc.w $0000,$0000,$0000,$0000,$0000,$0000,$FFFF,$FFFF
|
||
dc.w $FFFF,$FFFF,$FFFF,$FFFF,$FFFF,$FFFF,$FFFF,$FFFF
|
||
dc.w $FFFF,$FFFF,$FFFF,$FFFF,$FFFF,$FFFF,$FFFF,$FFFF
|
||
dc.w $FFFF,$FFFF,$FFFF,$FFFF,$FFFF,$FFFF,$FFFF,$FFFF
|
||
dc.w $0000,$0000,$0000,$0000,$0000,$0000,$0000,$0000
|
||
dc.w $0000,$0000,$0000,$0000,$0000,$0000,$0000,$0000
|
||
dc.w $0 ;old HD-20 driver drive ID string (null here)
|
||
|
||
_AssumeEq (Left6SlotIcon-IconTable),((Left6SlotIcon-IconTable)>>1)<<1
|
||
|
||
; Mac II Right Sony icon
|
||
|
||
Right6SlotIcon
|
||
dc.w $0000,$0000,$0000,$0000,$0000,$0000,$0000,$0000
|
||
dc.w $0000,$0000,$0000,$0000,$0000,$0000,$0000,$0000
|
||
dc.w $0000,$0000,$0000,$0000,$0000,$0000,$FFFF,$FFFF
|
||
dc.w $8000,$0001,$8000,$0001,$903F,$C7F9,$8000,$0001
|
||
dc.w $8000,$0081,$8000,$01C1,$8000,$03E1,$8000,$0081
|
||
dc.w $8000,$0081,$8000,$0081,$8000,$0001,$FFFF,$FFFF
|
||
dc.w $0000,$0000,$0000,$0000,$0000,$0000,$0000,$0000
|
||
dc.w $0000,$0000,$0000,$0000,$0000,$0000,$0000,$0000
|
||
dc.w $0000,$0000,$0000,$0000,$0000,$0000,$0000,$0000
|
||
dc.w $0000,$0000,$0000,$0000,$0000,$0000,$0000,$0000
|
||
dc.w $0000,$0000,$0000,$0000,$0000,$0000,$FFFF,$FFFF
|
||
dc.w $FFFF,$FFFF,$FFFF,$FFFF,$FFFF,$FFFF,$FFFF,$FFFF
|
||
dc.w $FFFF,$FFFF,$FFFF,$FFFF,$FFFF,$FFFF,$FFFF,$FFFF
|
||
dc.w $FFFF,$FFFF,$FFFF,$FFFF,$FFFF,$FFFF,$FFFF,$FFFF
|
||
dc.w $0000,$0000,$0000,$0000,$0000,$0000,$0000,$0000
|
||
dc.w $0000,$0000,$0000,$0000,$0000,$0000,$0000,$0000
|
||
dc.w $0 ;old HD-20 driver drive ID string (null here)
|
||
|
||
_AssumeEq (Right6SlotIcon-IconTable),((Right6SlotIcon-IconTable)>>1)<<1
|
||
ENDIF
|
||
|
||
|
||
IF hasMDU THEN
|
||
; small box Mac II Internal Sony icon
|
||
|
||
Int3SlotIcon
|
||
dc.w $0000,$0000,$0000,$0000,$0000,$0000,$0000,$0000
|
||
dc.w $0000,$0000,$0000,$0080,$0000,$0080,$0000,$0080
|
||
dc.w $0000,$0080,$0000,$03E0,$0000,$01C0,$0000,$0080
|
||
dc.w $0000,$0000,$FFFF,$FFFF,$8000,$0001,$FFFF,$FFFF
|
||
dc.w $8000,$0001,$8000,$0001,$8000,$0001,$FFFF,$FFFF
|
||
dc.w $8000,$0FF9,$8000,$0001,$8000,$0001,$A000,$0001
|
||
dc.w $8000,$0001,$FFFF,$FFFF,$8000,$0001,$FFFF,$FFFF
|
||
dc.w $0000,$0000,$0000,$0000,$0000,$0000,$0000,$0000
|
||
dc.w $0000,$0000,$0000,$0000,$0000,$0000,$0000,$0000
|
||
dc.w $0000,$0000,$0000,$0080,$0000,$0080,$0000,$0080
|
||
dc.w $0000,$0080,$0000,$03E0,$0000,$01C0,$0000,$0080
|
||
dc.w $0000,$0000,$FFFF,$FFFF,$FFFF,$FFFF,$FFFF,$FFFF
|
||
dc.w $FFFF,$FFFF,$FFFF,$FFFF,$FFFF,$FFFF,$FFFF,$FFFF
|
||
dc.w $FFFF,$FFFF,$FFFF,$FFFF,$FFFF,$FFFF,$FFFF,$FFFF
|
||
dc.w $FFFF,$FFFF,$FFFF,$FFFF,$FFFF,$FFFF,$FFFF,$FFFF
|
||
dc.w $0000,$0000,$0000,$0000,$0000,$0000,$0000,$0000
|
||
dc.w $0 ;old HD-20 driver drive ID string (null here)
|
||
|
||
_AssumeEq (Int3SlotIcon-IconTable),((Int3SlotIcon-IconTable)>>1)<<1
|
||
|
||
; small box Mac II External Sony icon
|
||
|
||
Ext3SlotIcon
|
||
dc.w $0000,$0000,$0000,$0000,$0000,$0000,$0000,$0000
|
||
dc.w $0000,$0000,$0000,$0000,$0000,$0000,$0000,$0000
|
||
dc.w $0000,$0000,$0000,$0000,$0000,$0000,$0000,$0010
|
||
dc.w $0000,$0010,$FFFF,$FC10,$8000,$0410,$FFFF,$FC7C
|
||
dc.w $8000,$0438,$FFFF,$FC10,$8001,$F400,$A000,$05FF
|
||
dc.w $8000,$0501,$FFFF,$FD7D,$8000,$0501,$FFFF,$FDFF
|
||
dc.w $0000,$0000,$0000,$0000,$0000,$0000,$0000,$0000
|
||
dc.w $0000,$0000,$0000,$0000,$0000,$0000,$0000,$0000
|
||
dc.w $0000,$0000,$0000,$0000,$0000,$0000,$0000,$0000
|
||
dc.w $0000,$0000,$0000,$0000,$0000,$0000,$0000,$0000
|
||
dc.w $0000,$0000,$0000,$0000,$0000,$0000,$0000,$0010
|
||
dc.w $0000,$0010,$FFFF,$FC10,$FFFF,$FC10,$FFFF,$FC7C
|
||
dc.w $FFFF,$FC38,$FFFF,$FC10,$FFFF,$FC00,$FFFF,$FDFF
|
||
dc.w $FFFF,$FDFF,$FFFF,$FDFF,$FFFF,$FDFF,$FFFF,$FDFF
|
||
dc.w $0000,$0000,$0000,$0000,$0000,$0000,$0000,$0000
|
||
dc.w $0000,$0000,$0000,$0000,$0000,$0000,$0000,$0000
|
||
dc.w $0 ;old HD-20 driver drive ID string (null here)
|
||
|
||
_AssumeEq (Ext3SlotIcon-IconTable),((Ext3SlotIcon-IconTable)>>1)<<1
|
||
|
||
; Macintosh IIsi internal drive icon.
|
||
|
||
IntMacIIsiIcon
|
||
dc.w $0000,$0000,$0000,$0000,$0000,$0000,$0000,$0000
|
||
dc.w $0000,$0000,$0000,$0000,$0000,$0000,$0000,$0000
|
||
dc.w $0000,$0000,$0000,$0400,$0000,$0400,$0000,$0400
|
||
dc.w $0000,$1F00,$0000,$0E00,$0000,$0400,$0000,$0000
|
||
dc.w $1FFF,$FFF8,$1000,$0008,$1000,$7FC8,$1000,$0008
|
||
dc.w $1300,$0008,$1000,$0008,$1FFF,$FFF8,$0800,$0010
|
||
dc.w $0FFF,$FFF0,$0000,$0000,$0000,$0000,$0000,$0000
|
||
dc.w $0000,$0000,$0000,$0000,$0000,$0000,$0000,$0000
|
||
|
||
|
||
dc.w $0000,$0000,$0000,$0000,$0000,$0000,$0000,$0000
|
||
dc.w $0000,$0000,$0000,$0000,$0000,$0000,$0000,$0000
|
||
dc.w $0000,$0000,$0000,$0400,$0000,$0400,$0000,$0400
|
||
dc.w $0000,$1F00,$0000,$0E00,$0000,$0400,$0000,$0000
|
||
dc.w $1FFF,$FFF8,$1FFF,$FFF8,$1FFF,$FFF8,$1FFF,$FFF8
|
||
dc.w $1FFF,$FFF8,$1FFF,$FFF8,$1FFF,$FFF8,$0FFF,$FFF0
|
||
dc.w $0FFF,$FFF0,$0000,$0000,$0000,$0000,$0000,$0000
|
||
dc.w $0000,$0000,$0000,$0000,$0000,$0000,$0000,$0000
|
||
dc.w $0 ;old HD-20 driver drive ID string (null here)
|
||
|
||
_AssumeEq (IntMacIIsiIcon-IconTable),((IntMacIIsiIcon-IconTable)>>1)<<1
|
||
|
||
; Macintosh IIsi external drive icon.
|
||
|
||
ExtMacIIsiIcon
|
||
dc.w $0000,$0000,$0000,$0000,$0000,$0000,$0000,$0000
|
||
dc.w $0000,$0000,$0000,$0000,$0000,$0000,$0000,$0000
|
||
dc.w $0000,$0000,$0000,$0000,$0000,$0000,$0000,$0000
|
||
dc.w $0000,$0010,$0000,$0010,$0000,$0010,$FFFF,$FC7C
|
||
dc.w $8000,$0438,$803F,$E410,$8000,$0400,$A000,$05FF
|
||
dc.w $8000,$0501,$FFFF,$FD7D,$4000,$0901,$7FFF,$F9FF
|
||
dc.w $0000,$0000,$0000,$0000,$0000,$0000,$0000,$0000
|
||
dc.w $0000,$0000,$0000,$0000,$0000,$0000,$0000,$0000
|
||
|
||
|
||
dc.w $0000,$0000,$0000,$0000,$0000,$0000,$0000,$0000
|
||
dc.w $0000,$0000,$0000,$0000,$0000,$0000,$0000,$0000
|
||
dc.w $0000,$0000,$0000,$0000,$0000,$0000,$0000,$0000
|
||
dc.w $0000,$0010,$0000,$0010,$0000,$0010,$FFFF,$FC7C
|
||
dc.w $FFFF,$FC38,$FFFF,$FC10,$FFFF,$FC00,$FFFF,$FDFF
|
||
dc.w $FFFF,$FDFF,$FFFF,$FDFF,$7FFF,$F9FF,$7FFF,$F9FF
|
||
dc.w $0000,$0000,$0000,$0000,$0000,$0000,$0000,$0000
|
||
dc.w $0000,$0000,$0000,$0000,$0000,$0000,$0000,$0000
|
||
dc.w $0 ;old HD-20 driver drive ID string (null here)
|
||
|
||
_AssumeEq (ExtMacIIsiIcon-IconTable),((ExtMacIIsiIcon-IconTable)>>1)<<1
|
||
ENDIF
|
||
|
||
|
||
IF hasVISADecoder | hasSonora THEN
|
||
; Macintosh LC left drive icon.
|
||
|
||
LeftMacLCIcon
|
||
dc.w $0000,$0000,$0080,$0000,$0080,$0000,$0080,$0000
|
||
dc.w $0080,$0000,$03E0,$0000,$01C0,$0000,$0080,$0000
|
||
dc.w $0000,$0000,$FFFF,$FFFF,$8000,$0001,$8FF8,$1FF1
|
||
dc.w $8000,$0001,$8000,$0001,$FFFF,$FFFF,$2000,$0004
|
||
dc.w $3FFF,$FFFC,$0000,$0000,$0000,$0000,$0000,$0000
|
||
dc.w $0000,$0000,$0000,$0000,$0000,$0000,$0000,$0000
|
||
dc.w $0000,$0000,$0000,$0000,$0000,$0000,$0000,$0000
|
||
dc.w $0000,$0000,$0000,$0000,$0000,$0000,$0000,$0000
|
||
|
||
dc.w $01C0,$0000,$01C0,$0000,$01C0,$0000,$01C0,$0000
|
||
dc.w $0FF8,$0000,$07F0,$0000,$03E0,$0000,$01C0,$0000
|
||
dc.w $0080,$0000,$FFFF,$FFFF,$FFFF,$FFFF,$FFFF,$FFFF
|
||
dc.w $FFFF,$FFFF,$FFFF,$FFFF,$FFFF,$FFFF,$3FFF,$FFFC
|
||
dc.w $3FFF,$FFFC,$0000,$0000,$0000,$0000,$0000,$0000
|
||
dc.w $0000,$0000,$0000,$0000,$0000,$0000,$0000,$0000
|
||
dc.w $0000,$0000,$0000,$0000,$0000,$0000,$0000,$0000
|
||
dc.w $0000,$0000,$0000,$0000,$0000,$0000,$0000,$0000
|
||
dc.w $0 ;old HD-20 driver drive ID string (null here)
|
||
|
||
_AssumeEq (LeftMacLCIcon-IconTable),((LeftMacLCIcon-IconTable)>>1)<<1
|
||
|
||
; Macintosh LC right drive icon.
|
||
|
||
RightMacLCIcon
|
||
dc.w $0000,$0000,$0000,$0100,$0000,$0100,$0000,$0100
|
||
dc.w $0000,$0100,$0000,$07C0,$0000,$0380,$0000,$0100
|
||
dc.w $0000,$0000,$FFFF,$FFFF,$8000,$0001,$8000,$1FF1
|
||
dc.w $8000,$0001,$8000,$0001,$FFFF,$FFFF,$2000,$0004
|
||
dc.w $3FFF,$FFFC,$0000,$0000,$0000,$0000,$0000,$0000
|
||
dc.w $0000,$0000,$0000,$0000,$0000,$0000,$0000,$0000
|
||
dc.w $0000,$0000,$0000,$0000,$0000,$0000,$0000,$0000
|
||
dc.w $0000,$0000,$0000,$0000,$0000,$0000,$0000,$0000
|
||
|
||
dc.w $0000,$0380,$0000,$0380,$0000,$0380,$0000,$0380
|
||
dc.w $0000,$1FF0,$0000,$0FE0,$0000,$07C0,$0000,$0380
|
||
dc.w $0000,$0100,$FFFF,$FFFF,$FFFF,$FFFF,$FFFF,$FFFF
|
||
dc.w $FFFF,$FFFF,$FFFF,$FFFF,$FFFF,$FFFF,$3FFF,$FFFC
|
||
dc.w $3FFF,$FFFC,$0000,$0000,$0000,$0000,$0000,$0000
|
||
dc.w $0000,$0000,$0000,$0000,$0000,$0000,$0000,$0000
|
||
dc.w $0000,$0000,$0000,$0000,$0000,$0000,$0000,$0000
|
||
dc.w $0000,$0000,$0000,$0000,$0000,$0000,$0000,$0000
|
||
dc.w $0 ;old HD-20 driver drive ID string (null here)
|
||
|
||
_AssumeEq (RightMacLCIcon-IconTable),((RightMacLCIcon-IconTable)>>1)<<1
|
||
ENDIF
|
||
|
||
|
||
IF hasOrwell THEN
|
||
; Quadra 900 icon.
|
||
|
||
Quadra900Icon
|
||
dc.w $0000,$0000,$0FFF,$F000,$0800,$1000,$08FF,$F000
|
||
dc.w $0880,$1080,$0880,$1180,$08BF,$D3F8,$0880,$1180
|
||
dc.w $0880,$1080,$0880,$1000,$0880,$1000,$0880,$1000
|
||
dc.w $0880,$1000,$0880,$1000,$0880,$1000,$0880,$1000
|
||
dc.w $0880,$1000,$0880,$1000,$0880,$1000,$0880,$1000
|
||
dc.w $0880,$1000,$08BF,$D000,$0880,$1000,$08BF,$D000
|
||
dc.w $0880,$1000,$08BF,$D000,$0880,$1000,$08BF,$D000
|
||
dc.w $0880,$1000,$08BF,$D000,$0880,$1000,$0FFF,$F000
|
||
|
||
dc.w $0000,$0000,$0FFF,$F000,$0FFF,$F000,$0FFF,$F000
|
||
dc.w $0FFF,$F080,$0FFF,$F180,$0FFF,$F3F8,$0FFF,$F180
|
||
dc.w $0FFF,$F080,$0FFF,$F000,$0FFF,$F000,$0FFF,$F000
|
||
dc.w $0FFF,$F000,$0FFF,$F000,$0FFF,$F000,$0FFF,$F000
|
||
dc.w $0FFF,$F000,$0FFF,$F000,$0FFF,$F000,$0FFF,$F000
|
||
dc.w $0FFF,$F000,$0FFF,$F000,$0FFF,$F000,$0FFF,$F000
|
||
dc.w $0FFF,$F000,$0FFF,$F000,$0FFF,$F000,$0FFF,$F000
|
||
dc.w $0FFF,$F000,$0FFF,$F000,$0FFF,$F000,$0FFF,$F000
|
||
dc.w $0 ;old HD-20 driver drive ID string (null here)
|
||
|
||
_AssumeEq (Quadra900Icon-IconTable),((Quadra900Icon-IconTable)>>1)<<1
|
||
|
||
|
||
; Quadra 700 icon.
|
||
|
||
Quadra700Icon
|
||
dc.w $0000,$0000,$0000,$0000,$0000,$0000,$0000,$0000
|
||
dc.w $1FFF,$8000,$1000,$8000,$1000,$8000,$17A0,$8000
|
||
dc.w $1020,$8400,$17A0,$8C00,$1020,$9FC0,$17A0,$8C00
|
||
dc.w $1020,$8400,$17A6,$8000,$1026,$8000,$1780,$8000
|
||
dc.w $1000,$8000,$1780,$8000,$1000,$8000,$1780,$8000
|
||
dc.w $1000,$8000,$1780,$8000,$1000,$8000,$1780,$8000
|
||
dc.w $1000,$8000,$1780,$8000,$1000,$8000,$1782,$8000
|
||
dc.w $1000,$8000,$1782,$8000,$1000,$8000,$1FFF,$8000
|
||
|
||
dc.w $0000,$0000,$0000,$0000,$0000,$0000,$0000,$0000
|
||
dc.w $1FFF,$8000,$1FFF,$8000,$1FFF,$8000,$1FFF,$8000
|
||
dc.w $1FFF,$8400,$1FFF,$8C00,$1FFF,$9FC0,$1FFF,$8C00
|
||
dc.w $1FFF,$8400,$1FFF,$8000,$1FFF,$8000,$1FFF,$8000
|
||
dc.w $1FFF,$8000,$1FFF,$8000,$1FFF,$8000,$1FFF,$8000
|
||
dc.w $1FFF,$8000,$1FFF,$8000,$1FFF,$8000,$1FFF,$8000
|
||
dc.w $1FFF,$8000,$1FFF,$8000,$1FFF,$8000,$1FFF,$8000
|
||
dc.w $1FFF,$8000,$1FFF,$8000,$1FFF,$8000,$1FFF,$8000
|
||
dc.w $0 ;old HD-20 driver drive ID string (null here)
|
||
|
||
_AssumeEq (Quadra700Icon-IconTable),((Quadra700Icon-IconTable)>>1)<<1
|
||
ENDIF
|
||
|
||
|
||
IF hasJaws | hasNiagra | hasPratt THEN
|
||
; PowerBook 140/170, Dartanian/Dartanian LC icon.
|
||
|
||
TimIcon
|
||
dc.w $0000,$0000,$0000,$0000,$0000,$0000,$0000,$0000
|
||
dc.w $0000,$0000,$0000,$0000,$0000,$0000,$0000,$0000
|
||
dc.w $0000,$0000,$0000,$0000,$0000,$0000,$0000,$0000
|
||
dc.w $0000,$0000,$0000,$0002,$0000,$0005,$0000,$0009
|
||
dc.w $0000,$0012,$0000,$0024,$0000,$0048,$0000,$0090
|
||
dc.w $0000,$0120,$0000,$0240,$0000,$0480,$0000,$0900
|
||
dc.w $0000,$0E00,$0000,$1C00,$00DB,$7E00,$01FF,$C210
|
||
dc.w $7F00,$4230,$803F,$427F,$8000,$4230,$FFFF,$FC10
|
||
|
||
dc.w $0000,$0000,$0000,$0000,$0000,$0000,$0000,$0000
|
||
dc.w $0000,$0000,$0000,$0000,$0000,$0000,$0000,$0000
|
||
dc.w $0000,$0000,$0000,$0000,$0000,$0000,$0000,$0000
|
||
dc.w $0000,$0000,$0000,$0002,$0000,$0007,$0000,$000F
|
||
dc.w $0000,$001E,$0000,$003C,$0000,$0078,$0000,$00F0
|
||
dc.w $0000,$01E0,$0000,$03C0,$0000,$0780,$0000,$0F00
|
||
dc.w $0000,$0E00,$0000,$1C00,$00DB,$7E00,$01FF,$FE10
|
||
dc.w $7FFF,$FE30,$FFFF,$FE7F,$FFFF,$FE30,$FFFF,$FC10
|
||
dc.w $0 ;old HD-20 driver drive ID string (null here)
|
||
|
||
_AssumeEq (TimIcon-IconTable),((TimIcon-IconTable)>>1)<<1
|
||
ENDIF
|
||
|
||
|
||
IF hasMSC THEN
|
||
; DBLite icon.
|
||
|
||
DBLiteIcon dc.w $0000,$0000,$0000,$0000,$0000,$0000,$0000,$0002
|
||
dc.w $0000,$0005,$0000,$0009,$0000,$0012,$0000,$0024
|
||
dc.w $0000,$0048,$0000,$0090,$0000,$0120,$0000,$0240
|
||
dc.w $0000,$0480,$0000,$0900,$0000,$1E00,$006D,$9C00
|
||
dc.w $7FFF,$FE00,$8000,$0200,$8000,$0200,$7FFF,$FC00
|
||
dc.w $0000,$0000,$0000,$0000,$003F,$FE20,$0020,$0260
|
||
dc.w $0027,$F2FE,$0020,$0260,$003F,$FE20,$0000,$0000
|
||
dc.w $0000,$0000,$0000,$0000,$0000,$0000,$0000,$0000
|
||
|
||
dc.w $0000,$0000,$0000,$0000,$0000,$0000,$0000,$0002
|
||
dc.w $0000,$0007,$0000,$000F,$0000,$001E,$0000,$003C
|
||
dc.w $0000,$0078,$0000,$00F0,$0000,$01E0,$0000,$03C0
|
||
dc.w $0000,$0780,$0000,$0F00,$0000,$1E00,$006D,$9C00
|
||
dc.w $7FFF,$FE00,$FFFF,$FE00,$FFFF,$FE00,$7FFF,$FC00
|
||
dc.w $0000,$0000,$0000,$0000,$003F,$FE20,$003F,$FE60
|
||
dc.w $003F,$FEFE,$003F,$FE60,$003F,$FE20,$0000,$0000
|
||
dc.w $0000,$0000,$0000,$0000,$0000,$0000,$0000,$0000
|
||
dc.w $0 ;old HD-20 driver drive ID string (null here)
|
||
|
||
_AssumeEq (DBLiteIcon-IconTable),((DBLiteIcon-IconTable)>>1)<<1
|
||
ENDIF
|
||
|
||
|
||
IF hasDJMEMC | hasYMCA | hasHMC THEN
|
||
; Lego icon
|
||
|
||
LegoIcon
|
||
DC.W $0000,$0000,$0000,$0000,$0000,$0000,$0000,$0000
|
||
DC.W $0000,$0000,$0000,$0000,$0000,$0000,$0000,$0000
|
||
DC.W $0000,$0080,$0000,$0080,$0000,$0080,$0000,$0080
|
||
DC.W $0000,$03E0,$0000,$01C0,$0000,$0080,$0000,$0000
|
||
DC.W $0000,$0000,$7FFF,$FFFE,$4000,$0002,$5800,$0FF2
|
||
DC.W $5800,$0002,$4000,$0002,$7FFF,$FFFE,$4004,$0002
|
||
DC.W $5554,$0002,$4004,$0002,$5554,$0002,$4004,$0002
|
||
DC.W $7FFF,$FFFE,$4000,$0002,$4000,$0002,$7FFF,$FFFE
|
||
|
||
DC.W $0000,$0000,$0000,$0000,$0000,$0000,$0000,$0000
|
||
DC.W $0000,$0000,$0000,$0000,$0000,$0000,$0000,$01C0
|
||
DC.W $0000,$01C0,$0000,$01C0,$0000,$01C0,$0000,$07F0
|
||
DC.W $0000,$07F0,$0000,$03E0,$0000,$01C0,$0000,$0080
|
||
DC.W $0000,$0000,$7FFF,$FFFE,$7FFF,$FFFE,$7FFF,$FFFE
|
||
DC.W $7FFF,$FFFE,$7FFF,$FFFE,$7FFF,$FFFE,$7FFF,$FFFE
|
||
DC.W $7FFF,$FFFE,$7FFF,$FFFE,$7FFF,$FFFE,$7FFF,$FFFE
|
||
DC.W $7FFF,$FFFE,$7FFF,$FFFE,$7FFF,$FFFE,$7FFF,$FFFE
|
||
DC.W $0 ;old HD-20 driver drive ID string (null here)
|
||
|
||
_AssumeEq (LegoIcon-IconTable),((LegoIcon-IconTable)>>1)<<1
|
||
|
||
|
||
; Fridgidaire Sony icon
|
||
|
||
FrigidaireIcon
|
||
DC.W $0000,$0000,$0000,$0000,$000F,$FFC0,$0010,$0120
|
||
DC.W $0010,$0120,$0010,$0120,$0010,$0120,$021F,$FF20
|
||
DC.W $0310,$0120,$3F93,$F920,$0310,$0120,$021F,$FF20
|
||
DC.W $0010,$0120,$0010,$0120,$0010,$0120,$0010,$0120
|
||
DC.W $001F,$FF20,$0010,$0120,$0010,$0120,$0010,$0120
|
||
DC.W $0010,$0120,$0010,$0120,$0010,$0120,$0030,$01B0
|
||
DC.W $0030,$0130,$0030,$61B0,$0030,$6130,$0030,$01B0
|
||
DC.W $0030,$0130,$003F,$FFF0,$003E,$01F0,$0000,$0000
|
||
|
||
DC.W $0000,$0000,$0000,$0000,$000F,$FFC0,$001F,$FFE0
|
||
DC.W $001F,$FFE0,$001F,$FFE0,$061F,$FFE0,$071F,$FFE0
|
||
DC.W $7F9F,$FFE0,$7FDF,$FFE0,$7F9F,$FFE0,$071F,$FFE0
|
||
DC.W $061F,$FFE0,$001F,$FFE0,$001F,$FFE0,$001F,$FFE0
|
||
DC.W $001F,$FFE0,$001F,$FFE0,$001F,$FFE0,$001F,$FFE0
|
||
DC.W $001F,$FFE0,$001F,$FFE0,$001F,$FFE0,$003F,$FFF0
|
||
DC.W $003F,$FFF0,$003F,$FFF0,$003F,$FFF0,$003F,$FFF0
|
||
DC.W $003F,$FFF0,$003F,$FFF0,$003E,$01F0,$0000,$0000
|
||
DC.W $0 ;old HD-20 driver drive ID string (null here)
|
||
|
||
_AssumeEq (FrigidaireIcon-IconTable),((FrigidaireIcon-IconTable)>>1)<<1
|
||
|
||
|
||
; QFC Sony icon
|
||
|
||
QFCIcon
|
||
DC.W $0000,$0000,$0000,$0000,$0000,$0000,$0000,$0000
|
||
DC.W $0000,$0000,$0000,$0000,$0000,$0000,$0000,$0000
|
||
DC.W $0000,$0000,$0000,$0000,$0000,$0000,$0000,$0000
|
||
DC.W $0000,$0000,$0000,$0000,$0000,$0000,$0000,$0040
|
||
DC.W $0000,$0040,$0000,$0040,$0000,$0040,$0000,$01F0
|
||
DC.W $0000,$00E0,$0000,$0040,$0000,$0000,$0000,$0000
|
||
DC.W $7FFF,$FFFE,$4020,$0802,$5820,$0BFA,$5820,$0802
|
||
DC.W $4020,$0802,$4820,$081A,$7FFF,$FFE6,$3FFF,$FFFC
|
||
|
||
DC.W $0000,$0000,$0000,$0000,$0000,$0000,$0000,$0000
|
||
DC.W $0000,$0000,$0000,$0000,$0000,$0000,$0000,$0000
|
||
DC.W $0000,$0000,$0000,$0000,$0000,$0000,$0000,$0000
|
||
DC.W $0000,$0000,$0000,$0000,$0000,$0000,$0000,$0000
|
||
DC.W $0000,$0000,$0000,$0000,$0000,$0000,$0000,$0000
|
||
DC.W $0000,$0000,$0000,$0000,$0000,$0000,$0000,$0000
|
||
DC.W $7FFF,$FFFE,$7FFF,$FFFE,$7FFF,$FFFE,$7FFF,$FFFE
|
||
DC.W $7FFF,$FFFE,$7FFF,$FFFE,$7FFF,$FFFE,$7FFF,$FFFE
|
||
DC.W $0 ;old HD-20 driver drive ID string (null here)
|
||
|
||
_AssumeEq (QFCIcon-IconTable),((QFCIcon-IconTable)>>1)<<1
|
||
ENDIF
|
||
|
||
|
||
|
||
|
||
|
||
|
||
|
||
;———————————————————————————————————————————————————————————————————————————————————————————————
|
||
;
|
||
; VIA Initialization Value Tables
|
||
;
|
||
;———————————————————————————————————————————————————————————————————————————————————————————————
|
||
|
||
dINPUT EQU 0
|
||
dOUTPUT EQU 1
|
||
|
||
|
||
IF hasVISADecoder | hasMDU THEN
|
||
VIA1InitMacIIsi
|
||
VIA1InitMacLC
|
||
dc.b \ ; vBufA initial value <9>
|
||
(6)|\ ; sound volume level initially 1
|
||
(0<<vSync)|\ ; Synchronous modem disabled (active high)
|
||
(0<<vCpuId2)|\ ; CPU Identification bit 2 is an input
|
||
(1<<vHeadSel)|\ ; head select line is an output
|
||
(0<<vCpuId3)|\ ; CPU Identification bit 3 is an input
|
||
(0<<vSCCWrReq) ; SCC write/request line is an input
|
||
|
||
dc.b \ ; vDIRA initial value
|
||
(vSound)|\ ; sound volume bits are outputs
|
||
(dOUTPUT<<vSync)|\ ; Synchronous modem is an output
|
||
(dINPUT<<vCpuId2)|\ ; CPU Identification bit 2 is an input
|
||
(dOUTPUT<<vHeadSel)|\ ; head select line is an output
|
||
(dINPUT<<vCpuId3)|\ ; CPU Identification bit 3 is an input
|
||
(dINPUT<<vSCCWrReq) ; SCC write/request line is an input
|
||
|
||
dc.b \ ; vBufB initial value
|
||
(1<<vXcvrSesBit)|\ ; Egret interrupt (xcvr session)
|
||
(0<<vViaFullBit)|\ ; Egret via full
|
||
(0<<vSysSesbit)|\ ; Egret system session
|
||
(1<<vPGCEnb) ; Parity Checking is initially disabled
|
||
|
||
dc.b \ ; vDIRB initial value
|
||
(dINPUT<<vXcvrSesBit)|\ ; xcvr session is an input
|
||
(dOUTPUT<<vViaFullBit)|\ ; viafull is an output
|
||
(dOUTPUT<<vSysSesbit) ; system session is an output
|
||
|
||
dc.b \ ; vPCR initial value
|
||
(%0<<0)|\ ; CA1 input neg active edge (60Hz interrupt)
|
||
(%000<<1)|\ ; CA2 (no connection)
|
||
(%0<<4)|\ ; CB1 input neg active edge (ADB clock)
|
||
(%000<<5) ; CB2 input neg active edge (ADB data)
|
||
|
||
dc.b \ ; vACR initial value
|
||
(%0<<0)|\ ; PA latch disable
|
||
(%0<<1)|\ ; PB latch disable
|
||
(%111<<2)|\ ; SR enabled for Egret
|
||
(%0<<5)|\ ; T2 timed interrupt
|
||
(%00<<6) ; T1 timed interrupt, PB7 disabled
|
||
ENDIF ; {hasVISADecoder | hasMDU}
|
||
|
||
|
||
|
||
IF hasOrwell THEN
|
||
VIA1InitQuadra700
|
||
dc.b \ ; vBufA initial value
|
||
(0<<vCpuId0)|\ ; CPU Identification bit 0 is an input
|
||
(0<<vCpuId1)|\ ; CPU Identification bit 1 is an input
|
||
(0<<vSync)|\ ; Synchronous modem disabled (active high)
|
||
(0<<vCpuId2)|\ ; CPU Identification bit 2 is an input
|
||
(1<<vHeadSel)|\ ; head select line is an output
|
||
(0<<vCpuId3)|\ ; CPU Identification bit 3 is an input
|
||
(0<<vSCCWrReq) ; SCC write/request line is an input
|
||
|
||
dc.b \ ; vDIRA initial value
|
||
(dINPUT<<vCpuId0)|\ ; CPU Identification bit 0 is an input
|
||
(dINPUT<<vCpuId1)|\ ; CPU Identification bit 1 is an input
|
||
(dOUTPUT<<vSync)|\ ; Synchronous modem is an output
|
||
(dINPUT<<vCpuId2)|\ ; CPU Identification bit 2 is an input
|
||
(dOUTPUT<<vHeadSel)|\ ; head select line is an output
|
||
(dINPUT<<vCpuId3)|\ ; CPU Identification bit 3 is an input
|
||
(dINPUT<<vSCCWrReq) ; SCC write/request line is an input
|
||
|
||
dc.b \ ; vBufB initial value
|
||
(1<<vRTCData)|\ ; real time clock data is one
|
||
(1<<vRTCClk)|\ ; real time clock clock is high
|
||
(1<<vRTCEnb)|\ ; clock initially disabled
|
||
(0<<vFDBInt)|\ ; Front Desk bus interrupt is an input
|
||
(1<<vFDesk1)|\ ; FDB state bit 0 is initially state 3
|
||
(1<<vFDesk2)|\ ; FDB state bit 1 is initially state 3
|
||
(1<<vAUXIntEnb)|\ ; switch to AUX interrupt priority scheme is active-low
|
||
(1<<vSWInt) ; software interrupt is active-low
|
||
|
||
dc.b \ ; vDIRB initial value
|
||
(dOUTPUT<<vRTCData)|\ ; real time clock data initially an output
|
||
(dOUTPUT<<vRTCClk)|\ ; real time clock clock is an output
|
||
(dOUTPUT<<vRTCEnb)|\ ; clock enable is an output
|
||
(dINPUT<<vFDBInt)|\ ; Front Desk bus interrupt is an input
|
||
(dOUTPUT<<vFDesk1)|\ ; FDB state bit 0 is an output
|
||
(dOUTPUT<<vFDesk2)|\ ; FDB state bit 1 is an output
|
||
(dOUTPUT<<vSWInt)|\ ; software interrupt is an output
|
||
(dOUTPUT<<vAUXIntEnb) ; switch to AUX interrupt scheme is an output
|
||
|
||
dc.b \ ; vPCR initial value
|
||
(%0<<0)|\ ; CA1 input neg active edge (60Hz interrupt)
|
||
(%001<<1)|\ ; CA2 ??? ind input neg active edge (keyswitch in "Secure"' sense line) <t32>
|
||
(%0<<4)|\ ; CB1 input neg active edge (ADB clock)
|
||
(%001<<5) ; CB2 ind input neg active edge (ADB data) <t32>
|
||
|
||
dc.b \ ; vACR initial value
|
||
(%0<<0)|\ ; PA latch disable
|
||
(%0<<1)|\ ; PB latch disable
|
||
(%000<<2)|\ ; SR disabled
|
||
(%0<<5)|\ ; T2 timed interrupt
|
||
(%00<<6) ; T1 timed interrupt, PB7 disabled
|
||
|
||
VIA1InitQuadra900
|
||
dc.b \ ; vBufA initial value
|
||
(0<<vCpuId0)|\ ; CPU Identification bit 0 is an input
|
||
(0<<vCpuId1)|\ ; CPU Identification bit 1 is an input
|
||
(0<<vCpuId2)|\ ; CPU Identification bit 2 is an input
|
||
(0<<vCpuId3) ; CPU Identification bit 3 is an input
|
||
|
||
dc.b \ ; vDIRA initial value
|
||
(dINPUT<<vCpuId0)|\ ; CPU Identification bit 0 is an input
|
||
(dINPUT<<vCpuId1)|\ ; CPU Identification bit 1 is an input
|
||
(dINPUT<<vCpuId2)|\ ; CPU Identification bit 2 is an input
|
||
(dINPUT<<vCpuId3) ; CPU Identification bit 3 is an input
|
||
|
||
dc.b \ ; vBufB initial value
|
||
(1<<vEclipseLED)|\ ; turn Eclipse LED on just for show <47>
|
||
(1<<vXcvrsesbit)|\ ; Egret interrupt (xcvr session) <47>
|
||
(0<<vViafullbit)|\ ; Egret VIA full <47>
|
||
(0<<vSysSesbit)|\ ; Egret system session <47>
|
||
(1<<vSWInt)|\ ; software interrupt is active-low
|
||
(1<<vAUXIntEnb) ; switch to AUX interrupt priority scheme is active-low
|
||
|
||
dc.b \ ; vDIRB initial value
|
||
(dOUTPUT<<vEclipseLED)|\ ; LED is an output <47>
|
||
(dINPUT<<vXcvrsesbit)|\ ; xcvr session is an input <47>
|
||
(dOUTPUT<<vViafullbit)|\ ; VIA full is an output <47>
|
||
(dOUTPUT<<vSysSesbit)|\ ; system session is an output <47>
|
||
(dOUTPUT<<vSWInt)|\ ; software interrupt is an output
|
||
(dOUTPUT<<vAUXIntEnb) ; switch to AUX interrupt scheme is an output
|
||
|
||
dc.b \ ; vPCR initial value
|
||
(%0<<0)|\ ; CA1 input neg active edge (60Hz interrupt)
|
||
(%001<<1)|\ ; CA2 ??? ind input neg active edge (keyswitch in "Secure"' sense line) <t32>
|
||
(%0<<4)|\ ; CB1 input neg active edge (ADB clock) <47>
|
||
(%001<<5) ; CB2 ind input neg active edge (ADB data) <t32>
|
||
|
||
dc.b \ ; vACR initial value
|
||
(%0<<0)|\ ; PA latch disable
|
||
(%0<<1)|\ ; PB latch disable
|
||
(%111<<2)|\ ; SR enabled for Egret <47>
|
||
(%0<<5)|\ ; T2 timed interrupt
|
||
(%00<<6) ; T1 timed interrupt, PB7 disabled
|
||
|
||
VIA2InitQuadra700 ; <T7>
|
||
dc.b \ ; vBufA initial value
|
||
(0<<v2EnetIRQ)|\ ; on-board ethernet interrupt
|
||
(0<<v2IRQ2)|\ ; no Slot A
|
||
(0<<v2IRQ3)|\ ; no slot B
|
||
(0<<v2IRQ4)|\ ; no slot C
|
||
(0<<v2IRQ5)|\ ; slot D interrupt
|
||
(0<<v2IRQ6)|\ ; slot E interrupt
|
||
(0<<v2VideoIRQ)|\ ; on-board video interrupt
|
||
(1<<v2SyncOnGreen) ; default to putting sync signal on green <T35>
|
||
|
||
dc.b \ ; vDIRA initial value
|
||
(dINPUT<<v2EnetIRQ)|\ ; on-board ethernet interrupt is an input
|
||
(dINPUT<<v2IRQ2)|\ ; no Slot A (but leave as inputs anyway)
|
||
(dINPUT<<v2IRQ3)|\ ; no slot B
|
||
(dINPUT<<v2IRQ4)|\ ; no slot C
|
||
(dINPUT<<v2IRQ5)|\ ; slot D interrupt is an input
|
||
(dINPUT<<v2IRQ6)|\ ; slot E interrupt is an input
|
||
(dINPUT<<v2VideoIRQ)|\ ; on-board video interrupt is an input
|
||
(dOutput<<v2SyncOnGreen) ; for enabling/disabling Sync-on-Green <T35>
|
||
|
||
dc.b \ ; vBufB initial value
|
||
(0<<v2ConfigLE)|\ ; DFAC latch enable is an output <T17>
|
||
(1<<v2BusLk)|\ ; Bus unlocked (input when not in use)
|
||
(1<<v2PowerOff)|\ ; Power Off is an input when not in use <T17>
|
||
(0<<v2ConfigData)|\ ; DFAC config data is an output <T17>
|
||
(0<<v2ConfigClk)|\ ; DFAC clock <T17>
|
||
(0<<v2Speed)|\ ; 25/33 Mhz input
|
||
(0<<v2VBL) ; 60Hz pseudo VBL output
|
||
|
||
dc.b \ ; vDIRB initial value
|
||
(dOUTPUT<<v2ConfigLE)|\ ; DFAC latch enable is an output <T17>
|
||
(dINPUT<<v2BusLk)|\ ; Bus unlocked
|
||
(dINPUT<<v2PowerOff)|\ ; Power Off is an input when not in use <T17>
|
||
(dOUTPUT<<v2ConfigData)|\ ; DFAC config data is an output <T17>
|
||
(dOUTPUT<<v2ConfigClk)|\ ; DFAC clock <T17>
|
||
(dINPUT<<v2Speed)|\ ; 25/33 Mhz input
|
||
(dOUTPUT<<v2VBL) ; 60Hz pseudo VBL output
|
||
|
||
dc.b \ ; vPCR initial value [CA2, CB2 reversed from 4Square]
|
||
(%0<<0)|\ ; CA1 input neg active edge (Any Slot interrupt)
|
||
(%001<<1)|\ ; CA2 ind input neg active edge (SWIM IOP) <t32>
|
||
(%0<<4)|\ ; CB1 input neg active edge (ASC interrupt)
|
||
(%001<<5) ; CB2 ind input neg active edge (SCSI DMA IRQ interrupt) <t32>
|
||
|
||
dc.b \ ; vACR initial value
|
||
(%0<<0)|\ ; PA latch disable
|
||
(%0<<1)|\ ; PB latch disable
|
||
(%000<<2)|\ ; SR disabled
|
||
(%0<<5)|\ ; T2 timed interrupt
|
||
(%11<<6) ; T1 continuous interrupt, square wave output
|
||
|
||
VIA2InitQuadra900 ; <13>
|
||
dc.b \ ; vBufA initial value
|
||
(0<<v2EnetIRQ)|\ ; on-board ethernet interrupt is an input <47>
|
||
(0<<v2IRQ2)|\ ; slot A interrupt is an input
|
||
(0<<v2IRQ3)|\ ; slot B interrupt is an input
|
||
(0<<v2IRQ4)|\ ; slot C interrupt is an input
|
||
(0<<v2IRQ5)|\ ; slot D interrupt is an input
|
||
(0<<v2IRQ6)|\ ; slot E interrupt is an input
|
||
(0<<v2VideoIRQ)|\ ; on-board video interrupt is/will be an input
|
||
(1<<v2SyncOnGreen) ; default to putting sync signal on green <T35>
|
||
|
||
dc.b \ ; vDIRA initial value
|
||
(dINPUT<<v2EnetIRQ)|\ ; on-board ethernet interrupt is an input <47>
|
||
(dINPUT<<v2IRQ2)|\ ; slot A interrupt is an input
|
||
(dINPUT<<v2IRQ3)|\ ; slot B interrupt is an input
|
||
(dINPUT<<v2IRQ4)|\ ; slot C interrupt is an input
|
||
(dINPUT<<v2IRQ5)|\ ; slot D interrupt is an input
|
||
(dINPUT<<v2IRQ6)|\ ; slot E interrupt is an input
|
||
(dINPUT<<v2VideoIRQ)|\ ; on-board video interrupt is an input
|
||
(dOutput<<v2SyncOnGreen) ; for enabling/disabling Sync-on-Green <T35>
|
||
|
||
dc.b \ ; vBufB initial value
|
||
(1<<v2Keyswitch)|\ ; initial value is ON (=1, 0=SECURE) <T24><T27>
|
||
(1<<v2BusLk)|\ ; Bus unlocked (input when not in use)
|
||
(0<<v2Speed)|\ ; 25/33 Mhz input
|
||
(0<<v2VBL) ; 60Hz pseudo VBL output
|
||
|
||
dc.b \ ; vDIRB initial value
|
||
(dINPUT<<v2Keyswitch)|\ ; now connected as an INPUT from the keyswitch <T24><T27><T29>
|
||
(dINPUT<<v2PowerOff)|\ ; now connected as an INPUT from the keyswitch <T24><T27><T29>
|
||
(dINPUT<<v2BusLk)|\ ; Bus unlocked
|
||
(dOUTPUT<<v2SndInSel0)|\ ; sound input select bit 0 (pb3) is an output <t32>
|
||
(dINPUT<<v2Speed)|\ ; 25/33 Mhz input
|
||
(dOUTPUT<<v2SndInSel1)|\ ; sound input select bit 1 (pb6) is an output <t32>
|
||
(dOUTPUT<<v2VBL) ; 60Hz pseudo VBL output
|
||
|
||
dc.b \ ; vPCR initial value [CA2, CB2 reversed from 4Square]
|
||
(%0<<0)|\ ; CA1 input neg active edge (Any Slot interrupt)
|
||
(%001<<1)|\ ; CA2 ind input neg active edge (SWIM IOP) <t32>
|
||
(%0<<4)|\ ; CB1 input neg active edge (ASC interrupt)
|
||
(%001<<5) ; CB2 ind input neg active edge (SCSI DMA IRQ interrupt) <t32>
|
||
|
||
dc.b \ ; vACR initial value
|
||
(%0<<0)|\ ; PA latch disable
|
||
(%0<<1)|\ ; PB latch disable
|
||
(%000<<2)|\ ; SR disabled
|
||
(%0<<5)|\ ; T2 timed interrupt
|
||
(%11<<6) ; T1 continuous interrupt, square wave output
|
||
ENDIF ; {hasOrwell}
|
||
|
||
IF hasJaws | hasNiagra THEN
|
||
VIA1InitNiagra
|
||
VIA1InitJaws ; <8> HJR
|
||
dc.b \ ; vBufA initial value <25>
|
||
(1)|\ ; 0 via test
|
||
(0<<vCpuId0)|\ ; 1 CPU Identification bit 0 is an input
|
||
(0<<vCpuId1)|\ ; 2 CPU Identification bit 1 is an input
|
||
(0<<vSync)|\ ; Synchronous modem disabled (active high)
|
||
(0<<vCpuId2)|\ ; 4 CPU Identification bit 2 is an input
|
||
(1<<vHeadSel)|\ ; 5 head select line is an output
|
||
(0<<vCpuId3)|\ ; 6 CPU Identification bit 3 is an input
|
||
(0<<vSCCWrReq) ; 7 SCC write/request line is an input
|
||
|
||
dc.b \ ; vDIRA initial value
|
||
(dINPUT<< 0)|\ ; 0 via test
|
||
(dINPUT<<vCpuId0)|\ ; 1 CPU Identification bit 0 is an input
|
||
(dINPUT<<vCpuId1)|\ ; 2 CPU Identification bit 1 is an input
|
||
(dOUTPUT<<vSync)|\ ; Synchronous modem is an output
|
||
(dINPUT<<vCpuId2)|\ ; 4 CPU Identification bit 2 is an input
|
||
(dOUTPUT<<vHeadSel)|\ ; 5 head select line is an output
|
||
(dINPUT<<vCpuId3)|\ ; 6 CPU Identification bit 3 is an input
|
||
(dINPUT<<vSCCWrReq) ; 7 SCC write/request line is an input
|
||
|
||
|
||
dc.b \ ; vBufB initial value
|
||
(1<<vRTCData)|\ ; 0 real time clock data is one
|
||
(1<<vRTCClk)|\ ; 1 real time clock clock is high
|
||
(1<<vRTCEnb)|\ ; 2 clock initially disabled
|
||
(1<<vSndEnb) ; sound is disabled
|
||
|
||
dc.b \ ; vDIRB initial value
|
||
(dOUTPUT<<vRTCData)|\ ; 0 real time clock data initially an output
|
||
(dOUTPUT<<vRTCClk)|\ ; 1 real time clock clock is an output
|
||
(dOUTPUT<<vRTCEnb)|\ ; 2 clock enable is an output
|
||
(dOUTPUT<<vSndEnb) ; sound enable is an output
|
||
|
||
|
||
dc.b \ ; vPCR initial value
|
||
(%0<<0)|\ ; CA1 input neg active edge (60Hz interrupt)
|
||
(%001<<1)|\ ; CA2 ind input neg active edge (1 sec interrupt) <t32>
|
||
(%0<<4)|\ ; CB1 input neg active edge (PwrMgr interrupt)
|
||
(%001<<5) ; CB2 ind input neg active edge (modem snd enable) <t32>
|
||
|
||
dc.b \ ; vACR initial value
|
||
(%0<<0)|\ ; PA latch disable
|
||
(%0<<1)|\ ; PB latch disable
|
||
(%000<<2)|\ ; SR disabled
|
||
(%0<<5)|\ ; T2 timed interrupt
|
||
(%00<<6) ; T1 timed interrupt, PB7 disabled
|
||
|
||
VIA2InitNiagra
|
||
VIA2InitJaws ; <8> HJR
|
||
dc.b $00 ; vBufA initial value (all zeros)
|
||
dc.b $00 ; vDIRA initial value (all inputs)
|
||
|
||
dc.b \ ; vBufB initial value
|
||
(0<<v2ConfigLE)|\ ; DFAC latch enable is an output <25>
|
||
(1<<v2PMack)|\ ; 1 Power mgr handshake acknowledge is an input
|
||
(1<<v2PMreq)|\ ; 2 Power mgr handshake not requesting
|
||
(0<<v2ConfigData)|\ ; 3 DFAC config data is an output <25>
|
||
(0<<v2ConfigClk)|\ ; 4 DFAC clock <25>
|
||
(1<<v2HMMU)|\ ; 5 HMMU <25>
|
||
(1<<v2CDis2)|\ ; 6 CDIS cache enabled <25>
|
||
(1<< v2ModemRST ) ; 7 modem reset <25>
|
||
|
||
dc.b \ ; vDIRB initial value
|
||
(dOUTPUT<<v2ConfigLE)|\ ; DFAC latch enable is an output <25>
|
||
(dINPUT<<v2PMack)|\ ; 1 Power mgr handshake acknowledge is an input
|
||
(dOUTPUT<<v2PMreq)|\ ; 2 Power mgr handshake request is an output
|
||
(dOUTPUT<<v2ConfigData)|\ ; 3 DFAC config data is an output <25>
|
||
(dOUTPUT<<v2ConfigClk)|\ ; 4 DFAC clock <25>
|
||
(dOUTPUT<< v2HMMU )|\ ; 5 HMMU <25>
|
||
(dINPUT<<v2CDis2)|\ ; 6 CDIS <25>
|
||
(dOUTPUT<<v2ModemRST ) ; 7 modem reset <25>
|
||
|
||
dc.b \ ; vPCR initial value
|
||
(%0<<0)|\ ; CA1 input neg active edge (Any Slot interrupt)
|
||
(%001<<1)|\ ; CA2 ind input neg active edge (SCSI DRQ interrupt)<t32>
|
||
(%0<<4)|\ ; CB1 input neg active edge (ASC interrupt)
|
||
(%001<<5) ; CB2 ind input neg active edge (SCSI IRQ interrupt)<t32>
|
||
|
||
dc.b \ ; vACR initial value
|
||
(%0<<0)|\ ; PA latch disable
|
||
(%0<<1)|\ ; PB latch disable
|
||
(%000<<2)|\ ; SR disabled
|
||
(%0<<5)|\ ; T2 timed interrupt
|
||
(%00<<6) ; T1 timed interrupt, PB7 disabled
|
||
ENDIF ; {hasJaws | hasNiagra}
|
||
|
||
IF hasMSC THEN
|
||
VIA1InitMSC ; via1 initialization
|
||
dc.b 0 ; vBufA initial value (all bits are inputs)
|
||
|
||
dc.b 0 ; vDIRA initial value (all bits are inputs)
|
||
|
||
dc.b 0 ; vBufB initial value (all bits are inputs)
|
||
|
||
dc.b 0 ; vDIRB initial value (all bits are inputs)
|
||
|
||
dc.b \ ; vPCR initial value
|
||
(%0<<0)|\ ; CA1 input neg active edge (60Hz interrupt)
|
||
(%001<<1)|\ ; CA2 (PG&E interrupt)
|
||
(%0<<4)|\ ; CB1 (no connection)
|
||
(%000<<5) ; CB2 (no connection)
|
||
|
||
dc.b \ ; vACR initial value
|
||
(%0<<0)|\ ; PA latch disable
|
||
(%0<<1)|\ ; PB latch disable
|
||
(%111<<2)|\ ; SR shifts out with CB1 (external clock) -> PMGR
|
||
(%0<<5)|\ ; T2 timed interrupt
|
||
(%00<<6) ; T1 timed interrupt, PB7 disabled
|
||
ENDIF ; {hasMSC}
|
||
|
||
IF hasPratt THEN
|
||
VIA1InitPratt
|
||
dc.b \ ; vBufA initial value <SM39>
|
||
(0<<vSync)|\ ; Synchronous modem disabled
|
||
(1<<vHeadSel)|\ ; SCC write/request line is an input
|
||
(0<<vSCCWrReq) ; 7 SCC write/request line is an input
|
||
|
||
dc.b \ ; vDIRA initial value
|
||
(dOUTPUT<<vSync)|\ ; Synchronous modem is an output
|
||
(dOUTPUT<<vHeadSel)|\ ; head select line is an output
|
||
(dINPUT<<vSCCWrReq) ; 7 SCC write/request line is an input
|
||
|
||
|
||
dc.b \ ; vBufB initial value
|
||
(1<<vENetIDClk)|\ ; 0 Ethernet ID ROM clock is high
|
||
(1<<vSndEnb) ; sound is disabled
|
||
|
||
dc.b \ ; vDIRB initial value
|
||
(dOUTPUT<<vENetIDClk)|\ ; 0 EthernetID ROM clock is an output
|
||
(dINPUT<<vENetIDData)|\ ; 1 EthernetID ROM data is an input
|
||
(dINPUT<<vSDMCable)|\ ; 3 SCSI Disk Mode sense is an input
|
||
(dINPUT<<vSDMDiskID)|\ ; 4-6 SCSI Disk Mode ID bit are input
|
||
(dOUTPUT<<vSndEnb) ; sound enable is an output
|
||
|
||
|
||
dc.b \ ; vPCR initial value
|
||
(%0<<0)|\ ; CA1 input neg active edge (60Hz interrupt)
|
||
(%001<<1)|\ ; CA2 ind input neg active edge (1 sec interrupt)
|
||
(%0<<4)|\ ; CB1 input neg active edge (PwrMgr interrupt)
|
||
(%001<<5) ; CB2 ind input neg active edge (modem snd enable)
|
||
|
||
dc.b \ ; vACR initial value
|
||
(%0<<0)|\ ; PA latch disable
|
||
(%0<<1)|\ ; PB latch disable
|
||
(%111<<2)|\ ; SR shifts out with CB1 (external clock) -> PMGR
|
||
(%0<<5)|\ ; T2 timed interrupt
|
||
(%00<<6) ; T1 timed interrupt, PB7 disabled
|
||
|
||
VIA2InitPratt
|
||
dc.b \ ; vBufA initial value
|
||
(0<<v2EnetIRQ)|\ ; on-board ethernet interrupt
|
||
(0<<v2IRQ2)|\ ; no Slot A
|
||
(0<<v2IRQ3)|\ ; no slot B
|
||
(0<<v2IRQ4)|\ ; no Slot C
|
||
(0<<v2IRQ5)|\ ; no Slot D
|
||
(0<<v2IRQ6)|\ ; slot E interrupt
|
||
(0<<v2VideoIRQ) ; on-board video interrupt
|
||
|
||
dc.b \ ; vDIRA initial value
|
||
(%00000000)|\ ; hard-coded (@reset) values in the chip
|
||
(dINPUT<<v2EnetIRQ)|\ ; on-board ethernet interrupt is an input
|
||
(dINPUT<<v2IRQ6)|\ ; slot E interrupt is an input
|
||
(dINPUT<<v2VideoIRQ) ; on-board video interrupt is an input
|
||
|
||
; the only changeable bits are BusLock (1), FC3 (3) and PowerSaver (4)
|
||
; (the rest are hard-coded in the chip.
|
||
dc.b \ ; vBufB initial value
|
||
(1<<v2PMack)|\ ; slot E interrupt
|
||
(1<<v2PMreq) ; on-board video interrupt
|
||
|
||
dc.b \ ; vDIRB initial value
|
||
(%00000000) ; hard-coded in the chip
|
||
|
||
; the only active/changeable bit in PCR is bit 6.
|
||
dc.b \ ; vPCR initial value
|
||
(%00000000)
|
||
|
||
; there are no changeable bits in the ACR
|
||
dc.b \ ; vACR initial value
|
||
(%00000000) ; hard-coded values in the chip
|
||
|
||
ENDIF ; {hasPratt}
|
||
|
||
|
||
IF hasSonora THEN
|
||
VIA1InitVail
|
||
dc.b \ ; vBufA initial value <9>
|
||
(0<<vSync)|\ ; Synchronous modem disabled (active high)
|
||
(1<<vHeadSel) ; SCC write/request line is an input
|
||
|
||
dc.b \ ; vDIRA initial value
|
||
(dINPUT<<vTestJ)|\ ; Factory Burn-in is an input <H7>
|
||
(dOUTPUT<<vSync)|\ ; Synchronous modem is an output
|
||
(dOUTPUT<<vHeadSel)|\ ; head select line is an output
|
||
(dINPUT<<vSCCWrReq) ; SCC write/request line is an input
|
||
|
||
dc.b \ ; vBufB initial value
|
||
(1<<vXcvrsesbit)|\ ; Egret interrupt (xcvr session)
|
||
(0<<vViafullbit)|\ ; Egret via full
|
||
(0<<vSysSesbit)|\ ; Egret system session
|
||
(1<<vSndEnb) ; sound is disabled <H7>
|
||
|
||
dc.b \ ; vDIRB initial value
|
||
(dINPUT<<vXcvrsesbit)|\ ; xcvr session is an input
|
||
(dOUTPUT<<vViafullbit)|\ ; viafull is an output
|
||
(dOUTPUT<<vSysSesbit)|\ ; system session is an output
|
||
(dOUTPUT<<vSndEnb) ; sound reset is an output
|
||
|
||
dc.b \ ; vPCR initial value
|
||
(%0<<0)|\ ; CA1 input neg active edge (60Hz interrupt)
|
||
(%000<<1)|\ ; CA2 (no connection)
|
||
(%0<<4)|\ ; CB1 input neg active edge (Egret clock)
|
||
(%001<<5) ; CB2 input neg active edge (Egret data)
|
||
|
||
dc.b \ ; vACR initial value
|
||
(%0<<0)|\ ; PA latch disable
|
||
(%0<<1)|\ ; PB latch disable
|
||
(%111<<2)|\ ; SR enabled for Egret
|
||
(%0<<5)|\ ; T2 timed interrupt
|
||
(%00<<6) ; T1 timed interrupt, PB7 disabled
|
||
ENDIF ; {hasSonora}
|
||
|
||
|
||
IF hasDJMEMC THEN
|
||
VIA1InitWombat
|
||
dc.b \ ; vBufA initial value
|
||
(0<<vCpuId0)|\ ; CPU Identification bit 0 is an input
|
||
(0<<vCpuId1)|\ ; CPU Identification bit 1 is an input
|
||
(0<<vSync)|\ ; Synchronous modem disabled (active high)
|
||
(0<<vCpuId2)|\ ; CPU Identification bit 2 is an input
|
||
(1<<vHeadSel)|\ ; head select line is an output
|
||
(0<<vCpuId3)|\ ; CPU Identification bit 3 is an input <SM29>
|
||
(0<<vSCCWrReq) ; SCC write/request line is an input
|
||
|
||
dc.b \ ; vDIRA initial value
|
||
(dINPUT<<vCpuId0)|\ ; CPU Identification bit 0 is an input
|
||
(dINPUT<<vCpuId1)|\ ; CPU Identification bit 1 is an input
|
||
(dOUTPUT<<vSync)|\ ; Synchronous modem is an output
|
||
(dINPUT<<vCpuId2)|\ ; CPU Identification bit 2 is an input
|
||
(dOUTPUT<<vHeadSel)|\ ; head select line is an output
|
||
(dINPUT<<vCpuId3)|\ ; CPU Identification bit 3 is an input <H48><SM29>
|
||
(dINPUT<<vSCCWrReq) ; SCC write/request line is an input
|
||
|
||
dc.b \ ; vBufB initial value
|
||
(1<<vRTCData)|\ ; real time clock data is one
|
||
(1<<vRTCClk)|\ ; real time clock clock is high
|
||
(1<<vRTCEnb)|\ ; clock initially disabled
|
||
(0<<vFDBInt)|\ ; Front Desk bus interrupt is an input
|
||
(1<<vFDesk1)|\ ; FDB state bit 0 is initially state 3
|
||
(1<<vFDesk2)|\ ; FDB state bit 1 is initially state 3
|
||
(1<<vAUXIntEnb)|\ ; switch to AUX interrupt priority scheme is active-low
|
||
(1<<vSWInt) ; software interrupt is active-low
|
||
|
||
dc.b \ ; vDIRB initial value
|
||
(dOUTPUT<<vRTCData)|\ ; real time clock data initially an output
|
||
(dOUTPUT<<vRTCClk)|\ ; real time clock clock is an output
|
||
(dOUTPUT<<vRTCEnb)|\ ; clock enable is an output
|
||
(dINPUT<<vFDBInt)|\ ; Front Desk bus interrupt is an input
|
||
(dOUTPUT<<vFDesk1)|\ ; FDB state bit 0 is an output
|
||
(dOUTPUT<<vFDesk2)|\ ; FDB state bit 1 is an output
|
||
(dOUTPUT<<vSWInt)|\ ; software interrupt is an output
|
||
(dOUTPUT<<vAUXIntEnb) ; switch to AUX interrupt scheme is an output
|
||
|
||
dc.b \ ; vPCR initial value
|
||
(%0<<0)|\ ; CA1 input neg active edge (60Hz interrupt)
|
||
(%001<<1)|\ ; CA2 ??? ind input neg active edge (keyswitch in "Secure"' sense line) <t32>
|
||
(%0<<4)|\ ; CB1 input neg active edge (ADB clock)
|
||
(%001<<5) ; CB2 ind input neg active edge (ADB data) <t32>
|
||
|
||
; This is here because the Proto1&2 VIA cell in BIOS does not correctly
|
||
; deal with writes to Port{A,B} before the direction bits for the that
|
||
; port are set correctly (output enables, that is).
|
||
; IF forWombat THEN
|
||
; dc.b \ ; vACR initial value
|
||
; (%0<<0)|\ ; PA latch disable
|
||
; (%0<<1)|\ ; PB latch disable
|
||
; (%111<<2)|\ ; SR disabled
|
||
; (%0<<5)|\ ; T2 timed interrupt
|
||
; (%00<<6) ; T1 timed interrupt, PB7 disabled
|
||
; ELSE
|
||
dc.b \ ; vACR initial value
|
||
(%0<<0)|\ ; PA latch disable
|
||
(%0<<1)|\ ; PB latch disable
|
||
(%000<<2)|\ ; SR disabled
|
||
(%0<<5)|\ ; T2 timed interrupt
|
||
(%00<<6) ; T1 timed interrupt, PB7 disabled
|
||
; ENDIF
|
||
|
||
VIA2InitWombat
|
||
dc.b \ ; vBufA initial value
|
||
(0<<v2EnetIRQ)|\ ; on-board ethernet interrupt
|
||
(0<<v2IRQ2)|\ ; no Slot A
|
||
(0<<v2IRQ3)|\ ; no slot B
|
||
(0<<v2IRQ4)|\ ; slot C interrupt
|
||
(0<<v2IRQ5)|\ ; slot D interrupt
|
||
(0<<v2IRQ6)|\ ; slot E interrupt
|
||
(0<<v2VideoIRQ) ; on-board video interrupt
|
||
|
||
dc.b \ ; vDIRA initial value
|
||
(dINPUT<<v2EnetIRQ)|\ ; on-board ethernet interrupt is an input
|
||
(dINPUT<<v2IRQ2)|\ ; no Slot A (but leave as inputs anyway)
|
||
(dINPUT<<v2IRQ3)|\ ; no slot B
|
||
(dINPUT<<v2IRQ4)|\ ; slot C interrupt is an input
|
||
(dINPUT<<v2IRQ5)|\ ; slot D interrupt is an input
|
||
(dINPUT<<v2IRQ6)|\ ; slot E interrupt is an input
|
||
(dINPUT<<v2VideoIRQ) ; on-board video interrupt is an input
|
||
|
||
dc.b \ ; vBufB initial value
|
||
(0<<v2ConfigLE)|\ ; DFAC latch enable is an output
|
||
(1<<v2BusLk)|\ ; Bus unlocked (input when not in use)
|
||
(1<<v2PowerOff)|\ ; Power Off is an input when not in use
|
||
(0<<v2ConfigData)|\ ; DFAC config data is an output
|
||
(0<<v2ConfigClk)|\ ; DFAC clock
|
||
(0<<v2MicCtl)|\ ; microphone control input
|
||
(0<<v2VBL) ; 60Hz pseudo VBL output
|
||
|
||
dc.b \ ; vDIRB initial value
|
||
(dOUTPUT<<v2ConfigLE)|\ ; DFAC latch enable is an output
|
||
(dINPUT<<v2BusLk)|\ ; Bus unlocked
|
||
(dINPUT<<v2PowerOff)|\ ; Power Off is an input when not in use
|
||
(dOUTPUT<<v2ConfigData)|\ ; DFAC config data is an output
|
||
(dOUTPUT<<v2ConfigClk)|\ ; DFAC clock
|
||
(dINPUT<<v2MicCtl)|\ ; microphone control
|
||
(dOUTPUT<<v2VBL) ; 60Hz pseudo VBL output
|
||
|
||
dc.b \ ; vPCR initial value [CA2, CB2 same as Q700/Q900]
|
||
(%0<<0)|\ ; CA1 input neg active edge (Any Slot interrupt)
|
||
(%001<<1)|\ ; CA2 ind input pos active level (SCSI DRQ)
|
||
(%0<<4)|\ ; CB1 input neg active edge (ASC interrupt)
|
||
(%001<<5) ; CB2 ind input neg active edge (SCSI IRQ interrupt)
|
||
|
||
dc.b \ ; vACR initial value
|
||
(%0<<0)|\ ; PA latch disable
|
||
(%0<<1)|\ ; PB latch disable
|
||
(%000<<2)|\ ; SR disabled
|
||
(%0<<5)|\ ; T2 timed interrupt
|
||
(%11<<6) ; T1 continuous interrupt, square wave output <H41>
|
||
ENDIF ; {hasDJMEMC}
|
||
|
||
|
||
IF hasYMCA THEN ; <SM46>
|
||
|
||
; Initialize the VIA1 Direction Register before the Data Register
|
||
|
||
VIA1InitCyclone
|
||
|
||
; PSC VIA1 vDirA/vBufA Notes:
|
||
;
|
||
; Because ReqA and ReqB are really used for DMA, they are not wire-ORed to the vSCCWrReq bit
|
||
; as on most Macintoshes. This bit instead reads the logical OR of ReqA and ReqB, either of
|
||
; which can be masked. This allows WReqA to be used in the traditional sense even while WReqB
|
||
; is indicating DMA activity.
|
||
;
|
||
; NOTE: PSC revisions earlier than 343S1100-a do not support masking!
|
||
; For these revisions, vSCCWrReq should be reprogrammed as an ouput and latched with
|
||
; a "1" so that polling does not occur on port A due to DMA activity on port B.
|
||
|
||
dc.b \ ; vDIRA initial value <P9>
|
||
(dOUTPUT<<vSync)|\ ; Synchronous modem is an output
|
||
(dOUTPUT<<vReqBEnable)|\ ; enable for ReqB term of SCCWReq function <LW5>
|
||
(dOUTPUT<<vReqAEnable)|\ ; enable for ReqA term of SCCWReq function <LW5>
|
||
(dINPUT<<vSCCWrReq) ; SCC wait/request line is an input <LW5>
|
||
|
||
dc.b \ ; vBufA initial value <P9> <P3>
|
||
(0<<vSync)|\ ; disable external SCC BRG clock
|
||
(0<<vReqBEnable)|\ ; disable ReqB term of SCCWReq function <LW5>
|
||
(1<<vReqAEnable) ; enable ReqA term of SCCWReq function <LW5>
|
||
|
||
dc.b \ ; vDIRB initial value <P9>
|
||
(dOUTPUT<<vRMP0)|\ ; Wink is an output.
|
||
(dOUTPUT<<vRMP1)|\ ; Wink is an output.
|
||
(dOUTPUT<<vRMP2)|\ ; Wink is an output.
|
||
(dINPUT<<vCudaTREQ)|\ ; Cuda transaction request is an input.
|
||
(dOUTPUT<<vCudaBYTEACK)|\ ; Cuda byte acknowledge is an output.
|
||
(dOUTPUT<<vCudaTIP)|\ ; Cuda interface transaction in progress is an output
|
||
(dOUTPUT<<vJMPDude6)|\ ; Hmmm is an output.
|
||
(dOUTPUT<<vJMPDude7) ; Hmmm is an output.
|
||
|
||
dc.b \ ; vBufB initial value <P9>
|
||
(0<<vRMP0)|\ ; Reserved for RMP.
|
||
(0<<vRMP1)|\ ; Reserved for RMP.
|
||
(0<<vRMP2)|\ ; Reserved for RMP.
|
||
(1<<vCudaTREQ)|\ ; Cuda transaction request
|
||
(1<<vCudaBYTEACK)|\ ; Cuda byte acknowledge <P6>
|
||
(1<<vCudaTIP)|\ ; Cuda interface transaction in progress <P6>
|
||
(0<<vJMPDude6)|\ ; Reserved for JMP.
|
||
(0<<vJMPDude7) ; Reserved for JMP.
|
||
|
||
dc.b \ ; vPCR initial value
|
||
(%0<<0)|\ ; CA1 input neg active edge (60Hz interrupt)
|
||
(%000<<1)|\ ; CA2 (no connection)
|
||
(%0<<4)|\ ; CB1 input neg active edge (Cuda clock)
|
||
(%000<<5) ; CB2 input neg active edge (Cuda data)
|
||
|
||
dc.b \ ; vACR initial value
|
||
(%0<<0)|\ ; PA latch disable
|
||
(%0<<1)|\ ; PB latch disable
|
||
(%111<<2)|\ ; SR enabled for Cuda
|
||
(%0<<5)|\ ; T2 timed interrupt
|
||
(%00<<6) ; T1 timed interrupt, PB7 disabled
|
||
|
||
VIA2InitCyclone ; <T7>
|
||
dc.b \ ; vBufA initial value
|
||
(0<<v2IRQ2)|\ ; no Slot A
|
||
(0<<v2IRQ3)|\ ; no slot B
|
||
(0<<v2IRQ4)|\ ; slot C interrupt
|
||
(0<<v2IRQ5)|\ ; slot D interrupt
|
||
(0<<v2IRQ6)|\ ; slot E interrupt
|
||
(0<<v2VideoIRQ) ; built-in video interrupt
|
||
|
||
dc.b 0 ; align to word boundary
|
||
ENDIF ; {hasYMCA} <SM46>
|
||
|
||
|
||
IF hasHMC THEN ; <SM46>
|
||
VIA1InitPDM ; <SM21>
|
||
dc.b \ ; vBufA initial value
|
||
(0<<vSync)|\ ; Synchronous modem disabled (active high)
|
||
(1<<vHeadSel)|\ ; set head select line high
|
||
(0<<vSCCWrReq) ; set SCC write/request line low
|
||
|
||
dc.b \ ; vDIRA initial value
|
||
(dOUTPUT<<vSync)|\ ; Synchronous modem is an output
|
||
(dOUTPUT<<vHeadSel)|\ ; head select line is an output
|
||
(dINPUT<<vSCCWrReq) ; SCC write/request line is an input
|
||
|
||
dc.b \ ; vBufB initial value
|
||
(1<<vCudaTREQ)|\ ; Cuda transaction request
|
||
(1<<vCudaBYTEACK)|\ ; Cuda byte acknowledge <P6>
|
||
(1<<vCudaTIP)|\ ; Cuda interface transaction in progress <P6>
|
||
(1<<vSndEnb) ; sound is disabled <H7>
|
||
|
||
dc.b \ ; vDIRB initial value
|
||
(dINPUT<<vCudaTREQ)|\ ; Cuda transaction request is an input.
|
||
(dOUTPUT<<vCudaBYTEACK)|\ ; Cuda byte acknowledge is an output.
|
||
(dOUTPUT<<vCudaTIP)|\ ; Cuda interface transaction in progress is an output
|
||
(dOUTPUT<<vSndEnb) ; sound reset is an output
|
||
|
||
dc.b \ ; vPCR initial value
|
||
(%0<<0)|\ ; CA1 input neg active edge (60Hz interrupt)
|
||
(%000<<1)|\ ; CA2 (no connection)
|
||
(%0<<4)|\ ; CB1 input neg active edge (Cuda clock)
|
||
(%000<<5) ; CB2 input neg active edge (Cuda data)
|
||
|
||
dc.b \ ; vACR initial value
|
||
(%0<<0)|\ ; PA latch disable
|
||
(%0<<1)|\ ; PB latch disable
|
||
(%111<<2)|\ ; SR enabled for Egret
|
||
(%0<<5)|\ ; T2 timed interrupt
|
||
(%00<<6) ; T1 timed interrupt, PB7 disabled
|
||
ENDIF ; {hasHMC} <SM46>
|
||
|
||
IF hasGrandCentral THEN ; <SM46>
|
||
VIA1InitTNT ; <SM21>
|
||
dc.b \ ; vBufA initial value
|
||
(0<<vSync)|\ ; Synchronous modem disabled (active high)
|
||
(0<<vReqBEnable)|\ ; disable ReqB term of SCCWReq function <LW5>
|
||
(1<<vReqAEnable) ; enable ReqA term of SCCWReq function <LW5>
|
||
|
||
dc.b \ ; vDIRA initial value
|
||
(dOUTPUT<<vSync)|\ ; Synchronous modem is an output
|
||
(dOUTPUT<<vReqBEnable)|\ ; enable for ReqB term of SCCWReq function <LW5>
|
||
(dOUTPUT<<vReqAEnable)|\ ; enable for ReqA term of SCCWReq function <LW5>
|
||
(dINPUT<<vSCCWrReq) ; SCC write/request line is an input
|
||
|
||
dc.b \ ; vBufB initial value
|
||
(1<<vCudaTREQ)|\ ; Cuda transaction request
|
||
(1<<vCudaBYTEACK)|\ ; Cuda byte acknowledge <P6>
|
||
(1<<vCudaTIP) ; Cuda interface transaction in progress <P6>
|
||
|
||
dc.b \ ; vDIRB initial value
|
||
(dINPUT<<vCudaTREQ)|\ ; Cuda transaction request is an input.
|
||
(dOUTPUT<<vCudaBYTEACK)|\ ; Cuda byte acknowledge is an output.
|
||
(dOUTPUT<<vCudaTIP) ; Cuda interface transaction in progress is an output
|
||
|
||
dc.b \ ; vPCR initial value
|
||
(%0<<0)|\ ; CA1 input neg active edge (60Hz interrupt)
|
||
(%000<<1)|\ ; CA2 (no connection)
|
||
(%0<<4)|\ ; CB1 input neg active edge (Cuda clock)
|
||
(%000<<5) ; CB2 input neg active edge (Cuda data)
|
||
|
||
dc.b \ ; vACR initial value
|
||
(%0<<0)|\ ; PA latch disable
|
||
(%0<<1)|\ ; PB latch disable
|
||
(%111<<2)|\ ; SR enabled for Egret
|
||
(%0<<5)|\ ; T2 timed interrupt
|
||
(%00<<6) ; T1 timed interrupt, PB7 disabled
|
||
ENDIF ; {hasGrandCentral} <SM46>
|
||
|
||
|
||
IF hasMDU THEN ; <SM46>
|
||
|
||
IMPORT SndCntlMacIIsi ;
|
||
ALIGN 4
|
||
InfoMacIIsi
|
||
dc.l MDUTable-InfoMacIIsi ; offset to decoder info
|
||
dc.l RAMInfo2Bank1Meg-InfoMacIIsi ; offset to ram bank info
|
||
dc.l VideoInfoMacIIsi-InfoMacIIsi ; offset to video info
|
||
dc.l NuBusInfoMacIIsi-InfoMacIIsi ; offset to NuBus info
|
||
dc.w 0|\ ; hwCfgFlags
|
||
(1<<hwCbSCSI)|\ ; SCSI port present
|
||
(1<<hwCbClock)|\ ; New clock chip present
|
||
(1<<hwCbFPU)|\ ; FPU chip present.
|
||
(1<<hwCbMMU)|\ ; Some kind of MMU present (see MMUType for what kind).
|
||
(1<<hwCbADB) ; Apple Desktop Bus present.
|
||
dc.b BoxMacIIsi ; product kind <49>
|
||
dc.b MDUDecoder ; decoder kind
|
||
dc.w $3FFF ; ROM85, New ROMs, Power Off ability.
|
||
dc.b 4 ; default ROM Resource configuration
|
||
dc.b ProductInfoVersion ; ProductInfo version
|
||
BitVector32 \ ; Flags for valid base addresses 0-31
|
||
ROMExists,\ ; ROMAddr is valid
|
||
DiagROMExists,\ ; DiagROMAddr is valid
|
||
VIA1Exists,\ ; VIA1Addr is valid
|
||
SCCRdExists,\ ; SCCRdAddr is valid
|
||
SCCWrExists,\ ; SCCWrAddr is valid
|
||
IWMExists,\ ; IWMAddr is valid
|
||
SCSIExists,\ ; SCSIAddr is valid
|
||
SCSIDackExists,\ ; SCSIDackAddr is valid
|
||
SCSIHskExists,\ ; SCSIHskAddr is valid
|
||
ASCExists,\ ; ASCAddr is valid
|
||
RBVExists,\ ; RBVAddr is valid
|
||
VDACExists ; VDACAddr is valid
|
||
BitVector32 ; Flags for valid base addresses 32-63
|
||
BitVector32 ; Flags for valid base addresses 64-95
|
||
dc.l \ ; Flags for valid ext feature flags 0-31
|
||
(ClockEgret)|\ ; Has Egret clock/pram
|
||
(ADBEgret)|\ ; Egret ADB
|
||
(Egret8)|\ ; Egret Eight firmware <SM4><P1>
|
||
(SoundHasSoundIn)|\ ; Has 8-bit mono sound input <23><LW7>
|
||
(SoundStereoOut)|\ ; has stereo output <H13>
|
||
(SoundPlayAndRecord)|\ ; can Play and Record simultaneously <H24>
|
||
(SoundStereoMixing) ; has stereo mixing <H13>
|
||
dc.l 0 ; Flags for valid ext feature flags 32-63
|
||
dc.l 0 ; Flags for valid ext feature flags 64-95
|
||
dc.b $56,$00,$00,$00 ; Check VIA1 PA6, PA4, PA2, PA1
|
||
dc.b $16,$00,$00,$00 ; VIA1 PA6 = 0, PA4 = 1, PA2 = 1, PA1 = 1
|
||
dc.l VIA1InitMacIIsi-InfoMacIIsi ; VIA1 init info
|
||
dc.l 0 ; no VIA2 init info
|
||
dc.l SndCntlMacIIsi-InfoMacIIsi ; sound control vector table <SM53> PN
|
||
dc.l EgretClockPRAM-InfoMacIIsi ; clock/PRAM vector table <H4>
|
||
dc.l EgretADBTable-InfoMacIIsi ; ADB/DebugUtil vector table <H14>
|
||
dc.l 0 ; no Power Manager primitives <SM33>
|
||
dc.l RBVEgretIntTbl-InfoMacIIsi ; interrupt handlers table <SM53> PN
|
||
dc.w 0 ; no CPU ID register
|
||
dc.w 0 ; spare
|
||
dc.l IconInfoMacIIsi-InfoMacIIsi ; offset to ICON info <SM74>
|
||
|
||
|
||
|
||
ALIGN 4
|
||
IMPORT CheckForMDU
|
||
|
||
BitVector32 \ ; Default valid addresses 0-31
|
||
ROMExists,\ ; ROMAddr is valid
|
||
DiagROMExists,\ ; DiagROMAddr is valid
|
||
VIA1Exists,\ ; VIA1Addr is valid
|
||
SCCRdExists,\ ; SCCRdAddr is valid
|
||
SCCWrExists,\ ; SCCWrAddr is valid
|
||
IWMExists,\ ; IWMAddr is valid
|
||
SCSIExists,\ ; SCSIAddr is valid
|
||
SCSIDackExists,\ ; SCSIDackAddr is valid
|
||
SCSIHskExists,\ ; SCSIHskAddr is valid
|
||
VIA2Exists,\ ; VIA2Addr is valid
|
||
ASCExists,\ ; ASCAddr is valid
|
||
RBVExists,\ ; RBVAddr is valid
|
||
VDACExists ; VDACAddr is valid
|
||
BitVector32 ; Default valid addresses 32-63
|
||
BitVector32 ; Default valid addresses 64-95
|
||
dc.l \ ; Default ext features 0-31
|
||
(ClockRTC)|\ ; Has RTC clock/pram
|
||
(ADBXcvr) ; transceiver ADB
|
||
dc.l 0 ; Default ext features 32-63
|
||
dc.l 0 ; Default ext features 64-95
|
||
dc.b $00,$00,$00,$00 ; no special VIA bits to avoid changing
|
||
dc.l CheckForMDU-MDUtable ; routine to identify this map
|
||
dc.b MDUDecoder
|
||
dc.b DecoderInfoVersion ; DecoderInfo version
|
||
dcb.b 2,0
|
||
dc.l $FFFFFFFF ; No Base Address for this decoder
|
||
MDUtable
|
||
dc.l $40800000 ; ROM - valid
|
||
dc.l $58000000 ; DiagROM - valid
|
||
dc.l $50F00000 ; VIA1 - valid
|
||
dc.l $50F04000 ; SCC read - optional
|
||
dc.l $50F04000 ; SCC write - optional
|
||
dc.l $50F16000 ; IWM - optional
|
||
dc.l $00000000 ; PWM - unused
|
||
dc.l $00000000 ; Sound - unused
|
||
dc.l $50F10000 ; SCSI - optional
|
||
dc.l $50F12000 ; SCSIDack - optional
|
||
dc.l $50F06000 ; SCSIHsk - optional
|
||
dc.l $50F02000 ; VIA2 - optional
|
||
dc.l $50F14000 ; ASC - valid
|
||
dc.l $50F26000 ; RBV - optional
|
||
dc.l $50F24000 ; VDAC - optional
|
||
dc.l $50F18000 ; SCSIDMA - optional
|
||
dc.l $50F1E020 ; SWIMIOP - optional
|
||
dc.l $50F0C020 ; SCCIOP - optional
|
||
dc.l $00000000 ; OSS - unused
|
||
dc.l $00000000 ; FMC - unused
|
||
dc.l $00000000 ; RPU - unused
|
||
dc.l $00000000 ; unused 21 <SM10>
|
||
dc.l $00000000 ; JAWS - unused <25>
|
||
dc.l $00000000 ; Sonic - unused <45>
|
||
dc.l $00000000 ; 1st (internal) SCSI96 - unused
|
||
dc.l $00000000 ; 2nd (external) SCSI96 - unused
|
||
dc.l $00000000 ; DAFB - unused
|
||
dc.l $00000000 ; unused 27
|
||
dc.l $00000000 ; ROMPhysAddr - unused
|
||
dc.l $00000000 ; unused 29
|
||
dc.l $00000000 ; unused 30
|
||
dc.l $00000000 ; unused 31
|
||
|
||
|
||
VideoInfoMDU
|
||
dc.l 0 ; Physical base address of screen
|
||
dc.l $FBB08000 ; Logical 32 bit base address of screen
|
||
dc.l $FBB08000 ; Logical 24 bit base address of screen
|
||
dc.b $0B ; Slot number to use for PRAM storage
|
||
dc.b SmPRAMTop+(($0B-$09)*sizeSPRAMRec) ; PRAM address for RBV slot zero
|
||
dc.b sRsrcBFBasedDir ; Use the BoxFlag-based sRsrc directory directory. <H22>
|
||
dc.b 0 ; Use boxFlag to identify board sRsrc. <H11>
|
||
|
||
VideoInfoMacIIsi ; <33>
|
||
dc.l 0 ; Physical base address of screen <33>
|
||
dc.l $FEE08000 ; Logical 32 bit base address of screen <33>
|
||
dc.l $FEE08000 ; Logical 24 bit base address of screen <40>
|
||
dc.b $0E ; Slot number to use for PRAM storage <33>
|
||
dc.b SmPRAMTop+(($0E-$09)*\ ; PRAM address for RBV slot zero <33>
|
||
sizeSPRAMRec)
|
||
dc.b sRsrcBFBasedDir ; Use the BoxFlag-based sRsrc directory directory. <H22>
|
||
dc.b 0 ; Use boxFlag to identify board sRsrc. <H11>
|
||
|
||
NuBusInfoMacIIsi ; slot info for Macintosh IIsi <24>
|
||
dc.b 0|(1<<hasPRAM)|(1<<canInterrupt) ; slot 0
|
||
dc.b 0 ; slot 1
|
||
dc.b 0 ; slot 2
|
||
dc.b 0 ; slot 3
|
||
dc.b 0 ; slot 4
|
||
dc.b 0 ; slot 5
|
||
dc.b 0 ; slot 6
|
||
dc.b 0 ; slot 7
|
||
dc.b 0 ; slot 8
|
||
dc.b 0|\ ; slot 9
|
||
(1<<hasPRAM)|\
|
||
(1<<canInterrupt)|\
|
||
(1<<directSlot)
|
||
dc.b 0|\ ; slot A
|
||
(1<<hasPRAM)|\
|
||
(1<<canInterrupt)|\
|
||
(1<<directSlot)
|
||
dc.b 0|\ ; slot B
|
||
(1<<hasPRAM)|\
|
||
(1<<canInterrupt)|\
|
||
(1<<directSlot)
|
||
dc.b 0|(1<<hasPRAM) ; slot C
|
||
dc.b 0|(1<<hasPRAM) ; slot D
|
||
dc.b 0|(1<<slotDisabled) ; slot E
|
||
dc.b 0 ; slot F
|
||
|
||
VIA1InitMDU
|
||
dc.b \ ; vBufA initial value
|
||
(1)|\ ; sound volume level initially 1
|
||
(0<<vSync)|\ ; Synchronous modem disabled (active high)
|
||
(0<<vCpuId2)|\ ; CPU Identification bit 2 is an input
|
||
(1<<vHeadSel)|\ ; head select line is an output
|
||
(0<<vCpuId3)|\ ; CPU Identification bit 3 is an input
|
||
(0<<vSCCWrReq) ; SCC write/request line is an input
|
||
|
||
dc.b \ ; vDIRA initial value
|
||
(vSound)|\ ; sound volume bits are outputs
|
||
(dOUTPUT<<vSync)|\ ; Synchronous modem is an output
|
||
(dINPUT<<vCpuId2)|\ ; CPU Identification bit 2 is an input
|
||
(dOUTPUT<<vHeadSel)|\ ; head select line is an output
|
||
(dINPUT<<vCpuId3)|\ ; CPU Identification bit 3 is an input
|
||
(dINPUT<<vSCCWrReq) ; SCC write/request line is an input
|
||
|
||
dc.b \ ; vBufB initial value
|
||
(1<<vRTCData)|\ ; real time clock data is one
|
||
(1<<vRTCClk)|\ ; real time clock clock is high
|
||
(1<<vRTCEnb)|\ ; clock initially disabled
|
||
(0<<vFDBInt)|\ ; Front Desk bus interrupt is an input
|
||
(1<<vFDesk1)|\ ; FDB state bit 0 is initially state 3
|
||
(1<<vFDesk2)|\ ; FDB state bit 1 is initially state 3
|
||
(1<<vPGCEnb)|\ ; Parity Checking is initially disabled
|
||
(1<<vSndEnb) ; sound is disabled
|
||
|
||
dc.b \ ; vDIRB initial value
|
||
(dOUTPUT<<vRTCData)|\ ; real time clock data initially an output
|
||
(dOUTPUT<<vRTCClk)|\ ; real time clock clock is an output
|
||
(dOUTPUT<<vRTCEnb)|\ ; clock enable is an output
|
||
(dINPUT<<vFDBInt)|\ ; Front Desk bus interrupt is an input
|
||
(dOUTPUT<<vFDesk1)|\ ; FDB state bit 0 is an output
|
||
(dOUTPUT<<vFDesk2)|\ ; FDB state bit 1 is an output
|
||
(dOUTPUT<<vPGCEnb)|\ ; PGC enable is an output
|
||
(dOUTPUT<<vSndEnb) ; sound enable is an output
|
||
|
||
dc.b \ ; vPCR initial value
|
||
(%0<<0)|\ ; CA1 input neg active edge (60Hz interrupt)
|
||
(%000<<1)|\ ; CA2 input neg active edge (1 sec interrupt)
|
||
(%0<<4)|\ ; CB1 input neg active edge (ADB clock)
|
||
(%000<<5) ; CB2 input neg active edge (ADB data)
|
||
|
||
dc.b \ ; vACR initial value
|
||
(%0<<0)|\ ; PA latch disable
|
||
(%0<<1)|\ ; PB latch disable
|
||
(%000<<2)|\ ; SR disabled
|
||
(%0<<5)|\ ; T2 timed interrupt
|
||
(%00<<6) ; T1 timed interrupt, PB7 disabled
|
||
|
||
|
||
ENDIF ; <SM46>
|
||
|
||
|
||
|
||
IF 0 THEN ; <SM33>
|
||
;••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••
|
||
;• •
|
||
;• This is the old CPU graveyard. All of the universal tables for the old CPUs will be put here until •
|
||
;• it's decided that they'll never be used again, at which point, they can be removed entirely. •
|
||
;• •
|
||
;••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••
|
||
|
||
ProductLookup
|
||
IF hasMDU THEN
|
||
dc.l InfoMacIIci-* ; Macintosh IIci
|
||
dc.l InfoMacIIciPGC-* ; Macintosh IIci, PGC installed
|
||
ENDIF
|
||
IF hasOSS THEN
|
||
dc.l InfoMacIIfx-* ; Macintosh IIfx
|
||
ENDIF
|
||
IF hasMDU THEN
|
||
dc.l InfoMDUUnknown-* ; unknown MDU based machine
|
||
ENDIF
|
||
IF hasOss THEN
|
||
dc.l InfoOSSUnknown-* ; unknown OSS based machine
|
||
ENDIF
|
||
DC.L 0
|
||
|
||
|
||
DecoderLookup
|
||
IF hasOSS THEN
|
||
dc.l OSSFMCtable-* ; check for OSS/FMC decoder
|
||
ENDIF
|
||
DC.L 0
|
||
|
||
|
||
IF hasMDU THEN
|
||
|
||
ALIGN 4
|
||
InfoMacIIci dc.l MDUTable-InfoMacIIci ; offset to decoder info
|
||
dc.l RAMInfo2Bank1Meg-InfoMacIIci ; offset to ram bank info
|
||
dc.l VideoInfoMDU-InfoMacIIci ; offset to video info
|
||
dc.l NuBusInfoMacIIci-InfoMacIIci ; offset to NuBus info
|
||
dc.w 0|\ ; hwCfgFlags
|
||
(1<<hwCbSCSI)|\ ; SCSI port present
|
||
(1<<hwCbClock)|\ ; New clock chip present
|
||
(1<<hwCbFPU)|\ ; FPU chip present.
|
||
(1<<hwCbMMU)|\ ; Some kind of MMU present (see MMUType for what kind).
|
||
(1<<hwCbADB) ; Apple Desktop Bus present.
|
||
dc.b BoxMacIIci ; product kind (same boxFlag, with or without PGC)
|
||
dc.b MDUDecoder ; decoder kind
|
||
dc.w $3FFF ; ROM85, New ROMs, Power Off ability.
|
||
dc.b 1 ; default ROM Resource configuration
|
||
dc.b ProductInfoVersion ; ProductInfo version
|
||
BitVector32 \ ; Flags for valid base addresses 0-31
|
||
ROMExists,\ ; ROMAddr is valid
|
||
DiagROMExists,\ ; DiagROMAddr is valid
|
||
VIA1Exists,\ ; VIA1Addr is valid
|
||
SCCRdExists,\ ; SCCRdAddr is valid
|
||
SCCWrExists,\ ; SCCWrAddr is valid
|
||
IWMExists,\ ; IWMAddr is valid
|
||
SCSIExists,\ ; SCSIAddr is valid
|
||
SCSIDackExists,\ ; SCSIDackAddr is valid
|
||
SCSIHskExists,\ ; SCSIHskAddr is valid
|
||
ASCExists,\ ; ASCAddr is valid
|
||
RBVExists,\ ; RBVAddr is valid
|
||
VDACExists ; VDACAddr is valid
|
||
BitVector32 ; Flags for valid base addresses 32-63
|
||
BitVector32 ; Flags for valid base addresses 64-95
|
||
dc.l \ ; Flags for valid ext feature flags 0-31
|
||
(0<<PGCInstalled)|\ ; the optional PGC chip is NOT installed
|
||
(ClockRTC)|\ ; Has RTC clock/pram
|
||
(ADBXcvr) ; transceiver ADB
|
||
dc.l 0 ; Flags for valid ext feature flags 32-63
|
||
dc.l 0 ; Flags for valid ext feature flags 64-95
|
||
dc.b $56,$00,$00,$00 ; Check VIA1 PA6, PA4, PA2, PA1
|
||
dc.b $46,$00,$00,$00 ; VIA1 PA6 = 1, PA4 = 0, PA2 = 1, PA1 = 1
|
||
dc.l VIA1InitMDU-InfoMacIIci ; VIA1 init info
|
||
dc.l 0 ; no VIA2 to init
|
||
dc.l 0 ; no sound control vector table
|
||
dc.l RTCClockPRAM-InfoMacIIci ; clock/PRAM vector table <H4>
|
||
dc.l ViaADBTable-InfoMacIIci ; ADB/DebugUtil vector table <H14>
|
||
dc.l 0 ; no Power Manager primitives <SM33>
|
||
dc.w 0 ; no CPU ID register
|
||
dc.w 0 ; allow room for expansion
|
||
dc.l IconInfo3Slot-InfoMacIIci ; offset to ICON info <SM74>
|
||
|
||
|
||
ALIGN 4
|
||
InfoMacIIciPGC
|
||
dc.l MDUTable-InfoMacIIciPGC ; offset to decoder info
|
||
dc.l RAMInfo2Bank1Meg-InfoMacIIciPGC ; offset to ram bank info
|
||
dc.l VideoInfoMDU-InfoMacIIciPGC ; offset to video info
|
||
dc.l NuBusInfoMacIIci-InfoMacIIciPGC ; offset to NuBus info
|
||
dc.w 0|\ ; hwCfgFlags
|
||
(1<<hwCbSCSI)|\ ; SCSI port present
|
||
(1<<hwCbClock)|\ ; New clock chip present
|
||
(1<<hwCbFPU)|\ ; FPU chip present.
|
||
(1<<hwCbMMU)|\ ; Some kind of MMU present (see MMUType for what kind).
|
||
(1<<hwCbADB) ; Apple Desktop Bus present.
|
||
dc.b BoxMacIIci ; product kind (same boxFlag, with or without PGC)
|
||
dc.b MDUDecoder ; decoder kind
|
||
dc.w $3FFF ; ROM85, New ROMs, Power Off ability.
|
||
dc.b 1 ; default ROM Resource configuration
|
||
dc.b ProductInfoVersion ; ProductInfo version
|
||
BitVector32 \ ; Flags for valid base addresses 0-31
|
||
ROMExists,\ ; ROMAddr is valid
|
||
DiagROMExists,\ ; DiagROMAddr is valid
|
||
VIA1Exists,\ ; VIA1Addr is valid
|
||
SCCRdExists,\ ; SCCRdAddr is valid
|
||
SCCWrExists,\ ; SCCWrAddr is valid
|
||
IWMExists,\ ; IWMAddr is valid
|
||
SCSIExists,\ ; SCSIAddr is valid
|
||
SCSIDackExists,\ ; SCSIDackAddr is valid
|
||
SCSIHskExists,\ ; SCSIHskAddr is valid
|
||
ASCExists,\ ; ASCAddr is valid
|
||
RBVExists,\ ; RBVAddr is valid
|
||
VDACExists ; VDACAddr is valid
|
||
BitVector32 ; Flags for valid base addresses 32-63
|
||
BitVector32 ; Flags for valid base addresses 64-95
|
||
dc.l \ ; Flags for valid ext feature flags 0-31
|
||
(1<<PGCInstalled)|\ ; the optional PGC chip is installed
|
||
(ClockRTC)|\ ; Has RTC clock/pram
|
||
(ADBXcvr) ; transceiver ADB
|
||
dc.l 0 ; Flags for valid ext feature flags 32-63
|
||
dc.l 0 ; Flags for valid ext feature flags 64-95
|
||
dc.b $56,$00,$00,$00 ; Check VIA1 PA6, PA4, PA2, PA1
|
||
dc.b $56,$00,$00,$00 ; VIA1 PA6 = 1, PA4 = 1, PA2 = 1, PA1 = 1
|
||
dc.l VIA1InitMDU-InfoMacIIciPGC ; VIA1 init info
|
||
dc.l 0 ; no VIA2 init info
|
||
dc.l 0 ; no sound control vector table
|
||
dc.l RTCClockPRAM-InfoMacIIciPGC ; clock/PRAM vector table <H4>
|
||
dc.l ViaADBTable-InfoMacIIciPGC ; ADB/DebugUtil vector table <H14>
|
||
dc.l 0 ; no Power Manager primitives <SM33>
|
||
dc.w 0 ; no CPU ID register
|
||
dc.w 0 ; spare
|
||
dc.l IconInfo3Slot-InfoMacIIciPGC ; offset to ICON info <SM74>
|
||
|
||
|
||
ALIGN 4
|
||
InfoMDUUnknown
|
||
dc.l MDUTable-InfoMDUUnknown ; offset to decoder info
|
||
dc.l RAMInfo2Bank1Meg-InfoMDUUnknown ; offset to ram bank info
|
||
dc.l VideoInfoMDU-InfoMDUUnknown ; offset to video info
|
||
dc.l NuBusInfoSixSlotNoVid-InfoMDUUnknown; offset to NuBus info
|
||
dc.w 0|\ ; hwCfgFlags
|
||
(1<<hwCbSCSI)|\ ; SCSI port present
|
||
(1<<hwCbClock)|\ ; New clock chip present
|
||
(1<<hwCbFPU)|\ ; FPU chip present.
|
||
(1<<hwCbMMU)|\ ; Some kind of MMU present (see MMUType for what kind).
|
||
(1<<hwCbADB) ; Apple Desktop Bus present.
|
||
dc.b BoxUnknown ; product kind
|
||
dc.b MDUDecoder ; decoder kind
|
||
dc.w $3FFF ; ROM85, New ROMs, Power Off ability.
|
||
dc.b 1 ; default ROM Resource configuration
|
||
dc.b ProductInfoVersion ; ProductInfo version
|
||
BitVector32 ; use default bases for this decoder
|
||
BitVector32 ; Flags for valid base addresses 32-63
|
||
BitVector32 ; Flags for valid base addresses 64-95
|
||
dc.l 0 ; use default external features for this decoder
|
||
dc.l 0 ; Flags for valid ext feature flags 32-63
|
||
dc.l 0 ; Flags for valid ext feature flags 64-95
|
||
dc.b $00,$00,$00,$00 ; don't check any VIA bits
|
||
dc.b $00,$00,$00,$00 ; anything with this decoder matches
|
||
dc.l VIA1InitMDU-InfoMDUUnknown ; VIA1 init info
|
||
dc.l VIA2InitMDUUnknown-InfoMDUUnknown ; VIA2 init info
|
||
dc.l 0 ; no sound control vector table
|
||
dc.l RTCClockPRAM-InfoMDUUnknown ; clock/PRAM vector table <H4>
|
||
dc.l ViaADBTable-InfoMDUUnknown ; ADB/DebugUtil vector table <H14>
|
||
dc.l 0 ; no Power Manager primitives <SM33>
|
||
dc.w 0 ; no CPU ID register
|
||
dc.w 0 ; spare
|
||
dc.l IconInfo3Slot-InfoMDUUnknown ; offset to ICON info <SM74>
|
||
|
||
|
||
|
||
NuBusInfoMacIIci
|
||
dc.b 0|(1<<hasPRAM)|(1<<canInterrupt) ; slot 0
|
||
dc.b 0 ; slot 1
|
||
dc.b 0 ; slot 2
|
||
dc.b 0 ; slot 3
|
||
dc.b 0 ; slot 4
|
||
dc.b 0 ; slot 5
|
||
dc.b 0 ; slot 6
|
||
dc.b 0 ; slot 7
|
||
dc.b 0 ; slot 8
|
||
dc.b 0|(1<<hasPRAM) ; slot 9
|
||
dc.b 0|(1<<hasPRAM) ; slot A
|
||
dc.b 0|(1<<slotDisabled) ; slot B
|
||
dc.b 0|\ ; slot C
|
||
(1<<hasPRAM)|\
|
||
(1<<canInterrupt)|\
|
||
(1<<hasConnector)
|
||
dc.b 0|\ ; slot D
|
||
(1<<hasPRAM)|\
|
||
(1<<canInterrupt)|\
|
||
(1<<hasConnector)
|
||
dc.b 0|\ ; slot E
|
||
(1<<hasPRAM)|\
|
||
(1<<canInterrupt)|\
|
||
(1<<hasConnector)
|
||
dc.b 0 ; slot F
|
||
|
||
|
||
VIA2InitMDUUnknown
|
||
dc.b \ ; vBufA initial value
|
||
(0<<v2IRQ1)|\ ; slot 1 interrupt is an input
|
||
(0<<v2IRQ2)|\ ; slot 2 interrupt is an input
|
||
(0<<v2IRQ3)|\ ; slot 3 interrupt is an input
|
||
(0<<v2IRQ4)|\ ; slot 4 interrupt is an input
|
||
(0<<v2IRQ5)|\ ; slot 5 interrupt is an input
|
||
(0<<v2IRQ6)|\ ; slot 6 interrupt is an input
|
||
(0<<v2RAM0)|\ ; or ram size bit 0 with 0
|
||
(0<<v2RAM1) ; or ram size bit 1 with 0
|
||
|
||
dc.b \ ; vDIRA initial value
|
||
(dINPUT<<v2IRQ1)|\ ; slot 1 interrupt is an input
|
||
(dINPUT<<v2IRQ2)|\ ; slot 2 interrupt is an input
|
||
(dINPUT<<v2IRQ3)|\ ; slot 3 interrupt is an input
|
||
(dINPUT<<v2IRQ4)|\ ; slot 4 interrupt is an input
|
||
(dINPUT<<v2IRQ5)|\ ; slot 5 interrupt is an input
|
||
(dINPUT<<v2IRQ6)|\ ; slot 6 interrupt is an input
|
||
(dOUTPUT<<v2RAM0)|\ ; ram size bit 0 is an output
|
||
(dOUTPUT<<v2RAM1) ; ram size bit 1 is an output
|
||
|
||
dc.b \ ; vBufB initial value
|
||
(1<<v2CDis)|\ ; cache disabled
|
||
(1<<v2BusLk)|\ ; Bus unlocked (input when not in use)
|
||
(1<<v2PowerOff)|\ ; Power on (input when not in use)
|
||
(1<<vFC3)|\ ; don't flush cache
|
||
(0<<v2TM1A)|\ ; NuBus timeout bits are inputs
|
||
(0<<v2TM0A)|\ ; NuBus timeout bits are inputs
|
||
(0<<v2SndExt)|\ ; sound/speaker mode is an input
|
||
(0<<v2VBL) ; 60Hz pseudo VBL output
|
||
|
||
dc.b \ ; vDIRB initial value
|
||
(dOUTPUT<<v2CDis)|\ ; cache disabled
|
||
(dINPUT<<v2BusLk)|\ ; Bus unlocked
|
||
(dINPUT<<v2PowerOff)|\ ; Power on
|
||
(dOUTPUT<<vFC3)|\ ; don't flush cache
|
||
(dINPUT<<v2TM1A)|\ ; NuBus timeout bits are inputs
|
||
(dINPUT<<v2TM0A)|\ ; NuBus timeout bits are inputs
|
||
(dINPUT<<v2SndExt)|\ ; sound/speaker mode is an input
|
||
(dOUTPUT<<v2VBL) ; 60Hz pseudo VBL output
|
||
|
||
dc.b \ ; vPCR initial value
|
||
(%0<<0)|\ ; CA1 input neg active edge (Any Slot interrupt)
|
||
(%000<<1)|\ ; CA2 input neg active edge (SCSI DMA IRQ interrupt)
|
||
(%0<<4)|\ ; CB1 input neg active edge (ASC interrupt)
|
||
(%000<<5) ; CB2 input neg active edge (SWIM IOP)
|
||
|
||
dc.b \ ; vACR initial value
|
||
(%0<<0)|\ ; PA latch disable
|
||
(%0<<1)|\ ; PB latch disable
|
||
(%000<<2)|\ ; SR disabled
|
||
(%0<<5)|\ ; T2 timed interrupt
|
||
(%11<<6) ; T1 continuous interrupt, square wave output
|
||
|
||
ENDIF ; {hasMDU}
|
||
|
||
IF hasOSS THEN
|
||
|
||
ALIGN 4
|
||
InfoMacIIfx
|
||
dc.l OSSFMCTable-InfoMacIIfx ; offset to decoder info
|
||
dc.l RAMInfo2Bank1Meg-InfoMacIIfx ; offset to ram bank info
|
||
dc.l 0 ; no built in video
|
||
dc.l NuBusInfoSixSlotNoVid-InfoMacIIfx ; offset to NuBus info
|
||
dc.w 0|\ ; hwCfgFlags
|
||
(1<<hwCbSCSI)|\ ; SCSI port present
|
||
(1<<hwCbClock)|\ ; New clock chip present
|
||
(1<<hwCbFPU)|\ ; FPU chip present.
|
||
(1<<hwCbMMU)|\ ; Some kind of MMU present (see MMUType for what kind).
|
||
(1<<hwCbADB) ; Apple Desktop Bus present.
|
||
dc.b boxMacIIfx ; product kind
|
||
dc.b OSSFMCDecoder ; decoder kind
|
||
dc.w $3FFF ; ROM85, New ROMs, Power Off ability.
|
||
dc.b 2 ; default ROM Resource configuration
|
||
dc.b ProductInfoVersion ; ProductInfo version
|
||
BitVector32 \ ; Flags for valid base addresses 0-31
|
||
ROMExists,\ ; ROMAddr is valid
|
||
DiagROMExists,\ ; DiagROMAddr is valid
|
||
VIA1Exists,\ ; VIA1Addr is valid
|
||
SCCRdExists,\ ; SCCRdAddr is valid
|
||
SCCWrExists,\ ; SCCWrAddr is valid
|
||
IWMExists,\ ; IWMAddr is valid
|
||
SCSIExists,\ ; SCSIAddr is valid
|
||
SCSIDackExists,\ ; SCSIDackAddr is valid
|
||
SCSIHskExists,\ ; SCSIHskAddr is valid
|
||
ASCExists,\ ; ASCAddr is valid
|
||
RBVExists,\ ; RBVAddr is valid
|
||
VDACExists ; VDACAddr is valid
|
||
BitVector32 ; Use default base addrs for this machine
|
||
BitVector32 ; Flags for valid base addresses 32-63
|
||
BitVector32 ; Flags for valid base addresses 64-95
|
||
dc.l \ ; Flags for valid ext feature flags 0-31
|
||
(ClockRTC)|\ ; Has RTC clock/pram
|
||
(ADBIop) ; Has IOP ADB
|
||
dc.l 0 ; Flags for valid ext feature flags 32-63
|
||
dc.l 0 ; Flags for valid ext feature flags 64-95
|
||
dc.b $56,$00,$00,$00 ; Check VIA1 PA6, PA4, PA2, PA1
|
||
dc.b $52,$00,$00,$00 ; VIA1 PA6 = 1, PA4 = 1, PA2 = 0, PA1 = 1
|
||
dc.l VIA1InitOSS-InfoMacIIfx ; VIA1 init info
|
||
dc.l 0 ; no VIA2 init info
|
||
dc.l 0 ; no sound control vector table
|
||
dc.l RTCClockPRAM-InfoMacIIfx ; clock/PRAM vector table <H4>
|
||
dc.l IOPADBTable-InfoMacIIfx ; ADB/DebugUtil vector table <H14>
|
||
dc.l 0 ; no Power Manager primitives <SM33>
|
||
dc.w 0 ; no CPU ID register
|
||
dc.w 0 ; allow room for expansion
|
||
dc.l IconInfo6Slot-InfoMacIIfx ; offset to ICON info <SM74>
|
||
|
||
|
||
ALIGN 4
|
||
InfoOSSUnknown
|
||
dc.l OSSFMCTable-InfoOSSUnknown ; offset to decoder info
|
||
dc.l RAMInfo2Bank1Meg-InfoOSSUnknown ; offset to ram bank info
|
||
dc.l 0 ; no built in video
|
||
dc.l NuBusInfoSixSlotNoVid-InfoOSSUnknown; offset to NuBus info
|
||
dc.w 0|\ ; hwCfgFlags
|
||
(1<<hwCbSCSI)|\ ; SCSI port present
|
||
(1<<hwCbClock)|\ ; New clock chip present
|
||
(1<<hwCbFPU)|\ ; FPU chip present.
|
||
(1<<hwCbMMU)|\ ; Some kind of MMU present (see MMUType for what kind).
|
||
(1<<hwCbADB) ; Apple Desktop Bus present.
|
||
dc.b BoxUnknown ; product kind
|
||
dc.b OSSFMCDecoder ; decoder kind
|
||
dc.w $3FFF ; ROM85, New ROMs, Power Off ability.
|
||
dc.b 2 ; default ROM Resource configuration
|
||
dc.b ProductInfoVersion ; ProductInfo version
|
||
BitVector32 ; use default bases for this decoder
|
||
BitVector32 ; Flags for valid base addresses 32-63
|
||
BitVector32 ; Flags for valid base addresses 64-95
|
||
dc.l 0 ; use default external features for this decoder
|
||
dc.l 0 ; Flags for valid ext feature flags 32-63
|
||
dc.l 0 ; Flags for valid ext feature flags 64-95
|
||
dc.b $00,$00,$00,$00 ; don't check any VIA bits
|
||
dc.b $00,$00,$00,$00 ; anything with this decoder matches
|
||
dc.l VIA1InitOSS-InfoOSSUnknown ; VIA1 init info
|
||
dc.l 0 ; no VIA2 init info
|
||
dc.l 0 ; no sound control vector table
|
||
dc.l RTCClockPRAM-InfoOSSUnknown ; clock/PRAM vector table <H4>
|
||
dc.l IOPADBTable-InfoOSSUnknown ; ADB/DebugUtil vector table <H14>
|
||
dc.l 0 ; no Power Manager primitives <SM33>
|
||
dc.w 0 ; no CPU ID register
|
||
dc.w 0 ; spare
|
||
dc.l IconInfo6Slot-InfoOSSUnknown ; offset to ICON info <SM74>
|
||
|
||
|
||
ALIGN 4
|
||
IMPORT CheckForOSSFMC
|
||
|
||
BitVector32 \ ; Default valid addresses 0-31
|
||
ROMExists,\ ; ROMAddr is valid
|
||
DiagROMExists,\ ; DiagROMAddr is valid
|
||
VIA1Exists,\ ; VIA1Addr is valid
|
||
ASCExists,\ ; ASCAddr is valid
|
||
SCSIDMAExists,\ ; SCSIDMAAddr is valid
|
||
SWIMIOPExists,\ ; SWIMIOPAddr is valid
|
||
SCCIOPExists,\ ; SCCIOPAddr is valid
|
||
OSSExists,\ ; OSSAddr is valid
|
||
FMCExists,\ ; FMCAddr is valid
|
||
RPUExists ; RPUAddr is valid
|
||
BitVector32 ; Default valid addresses 32-63
|
||
BitVector32 ; Default valid addresses 64-95
|
||
dc.l \ ; Default ext features 0-31
|
||
(ClockRTC)|\ ; Has RTC clock/pram
|
||
(ADBIop) ; Has IOP ADB
|
||
dc.l 0 ; Default ext features 32-63
|
||
dc.l 0 ; Default ext features 64-95
|
||
dc.b $00,$00,$00,$00 ; no special VIA bits to avoid changing
|
||
dc.l CheckForOSSFMC-OSSFMCtable ; routine to identify this map
|
||
dc.b OSSFMCDecoder
|
||
dc.b DecoderInfoVersion ; DecoderInfo version
|
||
dcb.b 2,0
|
||
dc.l $50F1C000 ; FMC Base Address
|
||
OSSFMCtable dc.l $40800000 ; ROM - valid
|
||
dc.l $58000000 ; DiagROM - valid
|
||
dc.l $50F00000 ; VIA1 - valid
|
||
dc.l $00000000 ; SCC read - unused
|
||
dc.l $00000000 ; SCC write - unused
|
||
dc.l $00000000 ; IWM - unused
|
||
dc.l $00000000 ; PWM - unused
|
||
dc.l $00000000 ; Sound - unused
|
||
dc.l $00000000 ; SCSI - unused
|
||
dc.l $00000000 ; SCSIDack - unused
|
||
dc.l $00000000 ; SCSIHsk - unused
|
||
dc.l $00000000 ; VIA2 - unused
|
||
dc.l $50F10000 ; ASC - valid
|
||
dc.l $00000000 ; RBV - unused
|
||
dc.l $00000000 ; VDAC - unused
|
||
dc.l $50F08000 ; SCSIDMA - valid
|
||
dc.l $50F12020 ; SWIMIOP - valid
|
||
dc.l $50F04020 ; SCCIOP - valid
|
||
dc.l $50F1A000 ; OSS - valid
|
||
dc.l $50F1C000 ; FMC - valid
|
||
dc.l $50F1E000 ; RPU - (optional)
|
||
dc.l $00000000 ; unused 21 <SM10>
|
||
dc.l $00000000 ; JAWS - unused <25>
|
||
dc.l $00000000 ; Sonic - unused <45>
|
||
dc.l $00000000 ; 1st (internal) SCSI96 - unused
|
||
dc.l $00000000 ; 2nd (external) SCSI96 - unused
|
||
dc.l $00000000 ; DAFB - unused
|
||
dc.l $00000000 ; unused 27
|
||
dc.l $00000000 ; ROMPhysAddr - unused
|
||
dc.l $00000000 ; unused 29
|
||
dc.l $00000000 ; unused 30
|
||
dc.l $00000000 ; unused 31
|
||
|
||
|
||
VIA1InitOSS
|
||
dc.b \ ; vBufA initial value
|
||
(1)|\ ; sound volume level initially 1
|
||
(0<<vCpuId2)|\ ; CPU Identification bit 2 is an input
|
||
(0<<vCpuId3) ; CPU Identification bit 3 is an input
|
||
|
||
dc.b \ ; vDIRA initial value
|
||
(vSound)|\ ; sound volume bits are outputs
|
||
(dINPUT<<vCpuId2)|\ ; CPU Identification bit 2 is an input
|
||
(dINPUT<<vCpuId3) ; CPU Identification bit 3 is an input
|
||
|
||
dc.b \ ; vBufB initial value
|
||
(1<<vRTCData)|\ ; real time clock data is one
|
||
(1<<vRTCClk)|\ ; real time clock clock is high
|
||
(1<<vRTCEnb)|\ ; clock initially disabled
|
||
(1<<vSndEnb) ; sound is disabled
|
||
|
||
dc.b \ ; vDIRB initial value
|
||
(dOUTPUT<<vRTCData)|\ ; real time clock data initially an output
|
||
(dOUTPUT<<vRTCClk)|\ ; real time clock clock is an output
|
||
(dOUTPUT<<vRTCEnb)|\ ; clock enable is an output
|
||
(dOUTPUT<<vSndEnb) ; sound enable is an output
|
||
|
||
dc.b \ ; vPCR initial value
|
||
(%0<<0)|\ ; CA1 input neg active edge (unused)
|
||
(%000<<1)|\ ; CA2 input neg active edge (1 sec interrupt)
|
||
(%0<<4)|\ ; CB1 input neg active edge (unused)
|
||
(%000<<5) ; CB2 input neg active edge (unused)
|
||
|
||
dc.b \ ; vACR initial value
|
||
(%0<<0)|\ ; PA latch disable
|
||
(%0<<1)|\ ; PB latch disable
|
||
(%000<<2)|\ ; SR disabled
|
||
(%0<<5)|\ ; T2 timed interrupt
|
||
(%00<<6) ; T1 timed interrupt, PB7 disabled
|
||
|
||
ENDIF ; {hasOSS}
|
||
|
||
|
||
NuBusInfoSixSlotNoVid
|
||
dc.b 0 ; slot 0
|
||
dc.b 0 ; slot 1
|
||
dc.b 0 ; slot 2
|
||
dc.b 0 ; slot 3
|
||
dc.b 0 ; slot 4
|
||
dc.b 0 ; slot 5
|
||
dc.b 0 ; slot 6
|
||
dc.b 0 ; slot 7
|
||
dc.b 0 ; slot 8
|
||
dc.b 0|\ ; slot 9
|
||
(1<<hasPRAM)|\
|
||
(1<<canInterrupt)|\
|
||
(1<<hasConnector)
|
||
dc.b 0|\ ; slot A
|
||
(1<<hasPRAM)|\
|
||
(1<<canInterrupt)|\
|
||
(1<<hasConnector)
|
||
dc.b 0|\ ; slot B
|
||
(1<<hasPRAM)|\
|
||
(1<<canInterrupt)|\
|
||
(1<<hasConnector)
|
||
dc.b 0|\ ; slot C
|
||
(1<<hasPRAM)|\
|
||
(1<<canInterrupt)|\
|
||
(1<<hasConnector)
|
||
dc.b 0|\ ; slot D
|
||
(1<<hasPRAM)|\
|
||
(1<<canInterrupt)|\
|
||
(1<<hasConnector)
|
||
dc.b 0|\ ; slot E
|
||
(1<<hasPRAM)|\
|
||
(1<<canInterrupt)|\
|
||
(1<<hasConnector)
|
||
dc.b 0 ; slot F
|
||
|
||
|
||
ENDIF ; obsolete tables ••••••••••••••••••••••••••••••••• <SM33>
|
||
|
||
|
||
|
||
ENDWITH ; {DecoderKinds,DecoderInfo,ProductInfo,NuBusInfo}
|
||
|
||
EndProc
|
||
|
||
End
|