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309 lines
11 KiB
Plaintext
309 lines
11 KiB
Plaintext
;
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; File: GrandCentralPriv.a
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;
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; Contains: private headers for use with the Grand Central I/O Controller
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;
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; Written by: Craig Prouse
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;
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; Copyright: © 1993 by Apple Computer, Inc., all rights reserved.
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;
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; Change History (most recent first):
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;
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; <SM3> 12/1/93 chp Add serialization primitives to ensure correct operation of
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; interrupt enable/disable/clear macros.
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; <SM2> 11/19/93 chp Roll back part of <SMG4>. _GCRegisterHandler and
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; _GCUnregisterHandler work better with a parameter in D0.
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; <SM1> 11/10/93 fau first checked in
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; <SMG6> 10/26/93 chp File beautification.
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; <SMG5> 9/29/93 chp Fix up conditional inclusion.
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; <SMG4> 9/22/93 chp Redesign the macro interfaces. Bit field instructions are no
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; longer used in macro implementations because they do not
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; guarantee 32-bit memory accesses to I/O locations.
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; <SMG3> 8/30/93 chp Add more macros and use nested macro substitution to make the
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; macros more readable. Add a reserved field to the dispatch table
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; structure to achieve more natural data alignment.
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; <SMG2> 8/26/93 chp Add macros for maintaining the Grand Central interrupt dispatch
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; table, and for enabling and disabling Grand Central interrupt
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; sources.
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;
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;
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IF (&TYPE('__INCLUDINGGRANDCENTRALPRIV__') = 'UNDEFINED') THEN
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__INCLUDINGGRANDCENTRALPRIV__ SET 1
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IF (&TYPE('__INCLUDINGSYSEQU__') = 'UNDEFINED') THEN
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include 'SysEqu.a'
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ENDIF
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IF (&TYPE('__INCLUDINGSYSPRIVATEEQU__') = 'UNDEFINED') THEN
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include 'SysPrivateEqu.a'
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ENDIF
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; Grand Central controller register mappings
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gcInterruptEvents equ $00020 ; offset from Grand Central base address
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gcInterruptMask equ $00024
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gcInterruptClear equ $00028
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gcInterruptLevels equ $0002C
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; Grand Central interrupt flags
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;
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; Grand Central is a little-endian device. These constants correspond to 680x0 bit positions
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; within a 32-bit Grand Central register, adjusted to avoid any need for byte swapping. For
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; example, gcifIntMode is the most significant bit of the InterruptMask register, but it
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; appears to the 680x0 emulator in bit 7.
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gcifDmaSCSI0 equ 24 ; level 4
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gcifDmaFloppy equ 25 ; level 4
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gcifDmaEthTx equ 26 ; level 4
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gcifDmaEthRx equ 27 ; level 4
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gcifDmaSccATx equ 28 ; level 4
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gcifDmaSccARx equ 29 ; level 4
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gcifDmaSccBTx equ 30 ; level 4
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gcifDmaSccBRx equ 31 ; level 4
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gcifDmaAudOut equ 16 ; level 4
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gcifDmaAudIn equ 17 ; level 4
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gcifDmaSCSI1 equ 18 ; level 4
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gcifDevSCSI0 equ 19 ; level 2
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gcifDevSCSI1 equ 20 ; level 2
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gcifDevMACE equ 21 ; level 3
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gcifDevSccA equ 23 ; level 4
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gcifDevSccB equ 8 ; level 4
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gcifDevAudio equ 9 ; level 2
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gcifDevVia equ 10 ; level 1
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gcifDevSwim3 equ 11 ; level 2
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gcifExtNMI equ 12 ; level 7
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gcifExtPci0 equ 13 ; level 2
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gcifExtPci1 equ 14 ; level 2
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gcifExtSlot0 equ 15 ; level 2
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gcifExtSlot1 equ 0 ; level 2
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gcifExtSlot2 equ 1 ; level 2
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gcifExtSwatch0 equ 2 ; level 2
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gcifExtSwatch1 equ 3 ; level 2
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gcifExtJivi equ 4 ; level 2
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gcifExtGotham equ 5 ; level 2
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gcifExtSpare equ 6 ; level 2
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gcifIntMode equ 7 ; valid only in InterruptMask register
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gcifMode1Clear equ 7 ; valid only in InterruptClear register
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; Grand Central DMA channel register mappings (refer to DB-DMA documentation)
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kGCDMAChannelRegisterSpace equ $08000 ; offset from Grand Central base address
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; indexes into DB-DMA channel register array
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gcChannelSCSI0 equ $0
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gcChannelFloppy equ $1
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gcChannelEnetTx equ $2
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gcChannelEnetRx equ $3
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gcChannelSCCATx equ $4
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gcChannelSCCARx equ $5
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gcChannelSCCBTx equ $6
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gcChannelSCCBRx equ $7
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gcChannelAudioOut equ $8
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gcChannelAudioIn equ $9
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gcChannelSCSI1 equ $A
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; Grand Central device register mappings (refer to device-specific documentation)
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kGCDeviceRegisterSpace equ $10000 ; offset from Grand Central base address
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; indexes into DB-DMA device register array
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gcDeviceSCSI0 equ $0
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gcDeviceMACE equ $1
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gcDeviceV0SCC equ $2 ; traditional SCC register mapping
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gcDeviceV1SCC equ $3 ; MacRISC SCC register mapping
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gcDeviceAudio equ $4
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gcDeviceSWIM3 equ $5
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gcDeviceVIA equ $6 ; VIA uses the address space of two devices
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gcDeviceSCSI1 equ $8
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gcDeviceEnetPROM equ $9
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gcDeviceGBus1 equ $A
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gcDeviceGBus2 equ $B
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gcDeviceGBus3 equ $C
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gcDeviceGBus4 equ $D
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gcDeviceGBus5 equ $E
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gcDeviceGBus6 equ $F
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; Grand Central interrupt dispatch table (for 680x0 interrupt emulation only)
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GCInterruptDispatchTable record 0
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gcBaseAddr ds.l 1
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reserved ds.l 1
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gcVector ds.l 1
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gcRefCon ds.l 1
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; additional vector/refcon tuples -- 32 pairs in all
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org * + 31 * 8
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size equ *
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endr
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; ……………………………………………………………………………………………………………………………………………………………………………………………………………………
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; Macro: _GCBaseAddr
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;
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; Function: Returns the base address of the Grand Central I/O controller, which
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; is cached in the interrupt dispatch table when the table is created.
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;
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; Inputs: none
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;
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; Outputs: A0.L base address of the Grand Central I/O controller
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;
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; Trashes: none
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; ……………………………………………………………………………………………………………………………………………………………………………………………………………………
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macro
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_GCBaseAddr
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with ExpandMemRec, GCInterruptDispatchTable
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movea.l ([ExpandMem],emDMADispatchGlobals),a0
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movea.l gcBaseAddr(a0),a0
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endwith
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endm
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; ……………………………………………………………………………………………………………………………………………………………………………………………………………………
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; Macro: _GCRegisterHandler
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;
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; Function: Registers an interrupt handler and a reference constant to be
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; passed to the interrupt handler when it is called. This abstraction
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; allows the programmer to remain largely ignorant of the internal
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; structure of the Grand Central interrupt dispatch mechanism.
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;
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; Inputs: D0.L interrupt flag specifying interrupt source for handler
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; A0.L address of interrupt handler
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; A1.L reference constant for interrupt handler
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;
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; Outputs: none
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;
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; Trashes: none
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; ……………………………………………………………………………………………………………………………………………………………………………………………………………………
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macro
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_GCRegisterHandler
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with ExpandMemRec, GCInterruptDispatchTable
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move.l a2,-(sp)
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movea.l ([ExpandMem],emDMADispatchGlobals),a2
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move.l a0,gcVector(a2,d0.l*8)
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move.l a1,gcRefCon(a2,d0.l*8)
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movea.l (sp)+,a2
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endwith
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endm
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; ……………………………………………………………………………………………………………………………………………………………………………………………………………………
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; Macro: _GCUnregisterHandler
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;
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; Function: Removes any previously registered Grand Central interrupt handler
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; by replacing it with the spurious interrupt vector and zeroing
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; the handler’s reference constant.
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;
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; Inputs: D0.L interrupt flag specifying interrupt source for handler
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;
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; Outputs: none
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;
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; Trashes: none
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; ……………………………………………………………………………………………………………………………………………………………………………………………………………………
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macro
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_GCUnregisterHandler
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with ExpandMemRec, GCInterruptDispatchTable
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move.l a2,-(sp)
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movea.l ([ExpandMem],emDMADispatchGlobals),a2
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move.l BadIntVector,gcVector(a2,d0.l*8)
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clr.l gcRefCon(a2,d0.l*8)
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movea.l (sp)+,a2
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endwith
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endm
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; ……………………………………………………………………………………………………………………………………………………………………………………………………………………
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; Macro: _GCEnableInterruptSource <intSource>
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;
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; Function: Enable the specified interrupt source in the Grand Central
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; InterruptMask register.
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;
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; Inputs: interrupt flag specifying interrupt source for handler
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;
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; Outputs: none
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;
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; Trashes: A0
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; ……………………………………………………………………………………………………………………………………………………………………………………………………………………
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macro
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_GCEnableInterruptSource &intSource
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_GCBaseAddr ; get Grand Central base address in A0
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ori.l #(1 << (&intSource)),gcInterruptMask(a0)
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nop
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endm
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; ……………………………………………………………………………………………………………………………………………………………………………………………………………………
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; Macro: _GCDisableInterruptSource <intSource>
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;
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; Function: Disable the specified interrupt source in the Grand Central
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; InterruptMask register.
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;
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; Inputs: interrupt flag specifying interrupt source for handler
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;
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; Outputs: none
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;
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; Trashes: A0
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; ……………………………………………………………………………………………………………………………………………………………………………………………………………………
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macro
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_GCDisableInterruptSource &intSource
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_GCBaseAddr ; get Grand Central base address in A0
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andi.l #~(1 << (&intSource)),gcInterruptMask(a0)
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nop
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endm
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; ……………………………………………………………………………………………………………………………………………………………………………………………………………………
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; Macro: _GCClearInterruptSource <intSource>
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;
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; Function: Clear the specified interrupt source using the Grand Central
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; InterruptClear register.
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;
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; Inputs: interrupt flag specifying interrupt source for handler
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;
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; Outputs: none
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;
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; Trashes: A0
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;
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; Notes: In 68K emulation, this macro is used only to clear DMA interrupts.
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; Other interrupts (devices or external) must be cleared at the source.
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; ……………………………………………………………………………………………………………………………………………………………………………………………………………………
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macro
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_GCClearInterruptSource &intSource
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_GCBaseAddr ; get Grand Central base address in A0
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ori.l #(1 << (&intSource)),gcInterruptClear(a0)
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nop
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endm
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ENDIF ; __INCLUDINGGRANDCENTRALPRIV__
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