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179 lines
6.7 KiB
Plaintext
179 lines
6.7 KiB
Plaintext
;__________________________________________________________________________________________________
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;
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; File: SCSIMgrInit96BIOS.a
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;
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; Contains: SCSI Manager BIOS based 53c96 initialization routines
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;
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; Written by: James Blair
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;
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; Copyright: © 1992-1993 by Apple Computer, Inc., All rights reserved.
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;
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; Change History (most recent first):
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;
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; <SM2> 11/17/93 KW load scsibase into a3 before using
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; <SM1> 2/5/93 CSS Checkin from Horror.
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; <1> 9/6/92 jab first checked in
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;__________________________________________________________________________________________________
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BLANKS ON ; assembler accepts spaces & tabs in operand field
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STRING ASIS ; generate string as specified
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PRINT OFF ; do not send subsequent lines to the listing file
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; don't print includes
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LOAD 'StandardEqu.d' ; from StandardEqu.a and for building ROMs
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INCLUDE 'SCSI.a' ; <SM1> CSS
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INCLUDE 'HardwareEqu.a'
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INCLUDE 'SCSIPriv.a'
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INCLUDE 'UniversalEqu.a' ; for TestFor
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INCLUDE 'SCSIEqu96.a'
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PRINT ON ; do send subsequent lines to the listing files
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SCSIInit96BIOS PROC EXPORT ;
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EXPORT InitMgr_SCSI96_BIOS
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; From SCSIMgr96.a ---
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; From SCSIMgr96BIOS.a ---
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IMPORT SCSIMgr_96_BIOS, DoSCSIMsgIn_96_BIOS
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IMPORT SCSIErr_96_BIOS, DoSCSIReset_96_BIOS
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IMPORT Unimplemented_96_BIOS, DoSCSIGet_96_BIOS
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IMPORT DoSCSICmd_96_BIOS, DoSCSIComplete_96_BIOS
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IMPORT DoSCSISelect_S96_BIOS, DoSCSISelAtn_S96_BIOS ;
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IMPORT DoSCSIStat_96_BIOS, CyclePhase_96_BIOS ;
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IMPORT DoSCSIReset_96_BIOS, DoSCSIMsgOut_96_BIOS
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IMPORT NewSCSIRead_96_BIOS, NewSCSIWrite_96_BIOS
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IMPORT NewSCSIWBlind_96_BIOS, NewSCSIRBlind_96_BIOS
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; From SCSIMgrHW96.a ---
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; From SCSIMgrHW96BIOS.a ---
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IMPORT BusErrHandler_96_BIOS, ResetBus_96_BIOS
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IMPORT SlowRead_96_BIOS, Transfer_96_BIOS
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IMPORT SlowWrite_96_BIOS, SlowComp_96_BIOS
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IMPORT FastRead_96_BIOS, FastWrite_96_BIOS
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IMPORT InitHW_SCSI96_BIOS, FastComp_96_BIOS
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WITH scsiGlobalRecord
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;-------------------------------------------------------------
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;
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; Initialization code for the SCSI Manager 5394/5396
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InitMgr_SCSI96_BIOS
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movem.l intrRegs, -(sp) ; save all registers, for convenience
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moveq.l #0, zeroReg ; initialize "zeroReg"
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movea.l SCSIGlobals, a4 ; get ptr to structure
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moveq.l #numSelectors-1, d1 ; loop count
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lea.l SCSIMgr_96_BIOS, a1 ; get start of SCSI Mgr code
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move.l a1, d0 ; remember base address
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lea OffsetTbl96_BIOS, a1 ; address of offset table
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movea.l a4, a0 ; point to base of old SCSI Mgr jump table
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@MakeJmpTbl
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moveq.l #0, d2 ; clear high word
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move.w (a1)+, d2 ; get the next offset
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add.l d0, d2 ; compute the address
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move.l d2, (a0)+ ; install it in the jump table
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dbra d1, @MakeJmpTbl ; loop for all vectors
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lea.l Transfer_96_BIOS, a1 ;
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move.l a1, jvTransfer(a4) ; use this Transfer routine
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lea.l CyclePhase_96_BIOS, a1 ;
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move.l a1, jvCyclePhase(a4) ; use this CyclePhase routine
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lea.l ResetBus_96_BIOS, a1
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move.l a1, jvResetBus(a4) ; use this Bus Reset routine
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lea.l BusErrHandler_96_BIOS, a1 ;
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move.l a1, jvBusErr(a4) ; use this SCSI Bus Error handler
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lea.l SlowRead_96_BIOS, a1
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move.l a1, jvVSRO(a4) ; use this Slow Read routine
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lea.l SlowWrite_96_BIOS, a1
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move.l a1, jvVSWO(a4) ; use this Slow Write routine
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lea.l FastRead_96_BIOS, a1
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move.l a1, jvVFRO(a4) ; use this Fast Read routine
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lea.l FastWrite_96_BIOS, a1
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move.l a1, jvVFWO(a4) ; use this Fast Write routine
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lea.l SlowComp_96_BIOS, a1 ;
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move.l a1, jvCSO(a4) ; use this Slow Compare routine
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lea.l FastComp_96_BIOS, a1
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move.l a1, jvCFO(a4) ; use this Fast Compare routine
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lea.l SCSIErr_96_BIOS, a1
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move.l a1, jvErr(a4) ; use this Error routine
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lea.l Unimplemented_96_BIOS, a1
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move.l a1, jvSel15(a4) ; Selector 15 routine
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move.l a1, jvSel16(a4) ; Selector 16 routine
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move.l a1, jvSel17(a4) ; Selector 17 routine
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move.l zeroReg, d0 ; disable SCSI interrupts
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movea.l jvDisEnable(a4), a0 ; addr of interrupt enable/disable routine
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jsr (a0) ; disable interrupts
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clr.l G_IntrpStat(a4) ; clear our Intrp Status
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clr.l G_FakeStat(a4) ; clear fake stat
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clr.l G_State96(a4) ; clear our indicators of 53c96 state
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clr.l G_SCSIDevMap0(a4) ; initialize SCSI Device Map 0
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clr.l G_SCSIDevMap1(a4) ; initialize SCSI Device Map 1
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clr.l base539x1(a4) ; init second SCSI base address
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clr.l G_SCSIDREQ(a4) ; initialize SCSI DREQ regr
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; All this time we've been using a default host ID = 7. Just in case that ever changes
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; load whatever SCSIMgrInit got from PRAM as our host ID.
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move.b G_ID(a4), d1 ; get SCSI host ID mask
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move.b #7, d0 ; load shift count
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@1
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lsl.b #1, d1 ; shift out mask bit until all 0's
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dbeq d0, @1 ; remaining count in d0 will be SCSI ID
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ori.b #initCF1, d0 ; use this our designated SCSI host ID
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move.l SCSIBase, a3 ; load addr of first SCSI chip
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move.b d0, rCF1(a3) ; use this new config regr. value, hopefully
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; nobody has changed the setting since HW init time NOT!!!
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move.l SCSIBase, base539x0(a4) ; load addr of first SCSI chip
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move.b #bDREQ_BIOS,G_bitDREQ(a4) ; setup bit location of DREQ check
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move.l #SCSI0_DREQ_BIOS,pdma5380(a4) ; setup DREQ location
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@InitDone
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move.b #mgrVersion2, state2(a4) ; save the version number
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movem.l (sp)+, intrRegs ; restore registers
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rts
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;-------------------------------------------------------------
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;
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OffsetTbl96_BIOS
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DC.W DoSCSIReset_96_BIOS-SCSIMgr_96_BIOS ; 0: SCSIReset
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DC.W DoSCSIGet_96_BIOS-SCSIMgr_96_BIOS ; 1: SCSIGet
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DC.W DoSCSISelect_S96_BIOS-SCSIMgr_96_BIOS ; 2: SCSISelect <T2>
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DC.W DoSCSICmd_96_BIOS-SCSIMgr_96_BIOS ; 3: SCSICmd
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DC.W DoSCSIComplete_96_BIOS-SCSIMgr_96_BIOS ; 4: SCSIComplete
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DC.W NewSCSIRead_96_BIOS-SCSIMgr_96_BIOS ; 5: SCSIRead
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DC.W NewSCSIWrite_96_BIOS-SCSIMgr_96_BIOS ; 6: SCSIWrite
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DC.W Unimplemented_96_BIOS-SCSIMgr_96_BIOS ; 7: Was SCSIInstall
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DC.W NewSCSIRBlind_96_BIOS-SCSIMgr_96_BIOS ; 8: SCSIRBlind
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DC.W NewSCSIWBlind_96_BIOS-SCSIMgr_96_BIOS ; 9: SCSIWBlind
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DC.W DoSCSIStat_96_BIOS-SCSIMgr_96_BIOS ; 10: SCSIStat
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DC.W DoSCSISelAtn_S96_BIOS-SCSIMgr_96_BIOS ; 11: SCSISelAtn <T2>
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DC.W DoSCSIMsgIn_96_BIOS-SCSIMgr_96_BIOS ; 12: SCSIMsgIn
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DC.W DoSCSIMsgOut_96_BIOS-SCSIMgr_96_BIOS ; 13: SCSIMsgOut
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;==========================================================================
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ENDWITH
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END
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