2012-03-26 19:18:29 +00:00
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/* COFF information for the Intel i860.
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2015-08-28 15:32:19 +00:00
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Copyright (C) 2001-2014 Free Software Foundation, Inc.
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2012-03-26 19:18:29 +00:00
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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2014-09-12 22:14:23 +00:00
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the Free Software Foundation; either version 3 of the License, or
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2012-03-26 19:18:29 +00:00
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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2014-09-12 22:14:23 +00:00
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Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
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MA 02110-1301, USA. */
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2012-03-26 19:18:29 +00:00
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/* This file was hacked from i386.h [dolan@ssd.intel.com] */
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#define L_LNNO_SIZE 2
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#include "coff/external.h"
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/* Bits for f_flags:
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F_RELFLG relocation info stripped from file
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F_EXEC file is executable (no unresolved external references)
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F_LNNO line numbers stripped from file
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F_LSYMS local symbols stripped from file
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F_AR32WR file has byte ordering of an AR32WR machine (e.g. vax). */
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#define F_RELFLG (0x0001)
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#define F_EXEC (0x0002)
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#define F_LNNO (0x0004)
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#define F_LSYMS (0x0008)
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#define I860MAGIC 0x14d
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#define I860BADMAG(x) ((x).f_magic != I860MAGIC)
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#undef AOUTSZ
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#define AOUTSZ 36
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/* FIXME: What are the a.out magic numbers? */
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#define _ETEXT "etext"
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/********************** RELOCATION DIRECTIVES **********************/
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struct external_reloc
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{
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char r_vaddr[4];
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char r_symndx[4];
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char r_type[2];
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};
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#define RELOC struct external_reloc
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#define RELSZ 10
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/* The relocation directory entry types.
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2014-09-12 22:14:23 +00:00
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PAIR : The low half that follows relates to the preceding HIGH[ADJ].
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2012-03-26 19:18:29 +00:00
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HIGH : The high half of a 32-bit constant.
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LOWn : The low half, insn bits 15..(n-1), 2^n-byte aligned.
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SPLITn : The low half, insn bits 20..16 and 10..(n-1), 2^n-byte aligned.
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HIGHADJ: Similar to HIGH, but with adjustment.
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BRADDR : 26-bit branch displacement.
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Note: The Intel assembler manual lists LOW4 as one of the
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relocation types, but it appears to be useless for the i860.
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We will recognize it anyway, just in case it actually appears in
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any object files. */
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enum {
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COFF860_R_PAIR = 0x1c,
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COFF860_R_HIGH = 0x1e,
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COFF860_R_LOW0 = 0x1f,
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COFF860_R_LOW1 = 0x20,
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COFF860_R_LOW2 = 0x21,
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COFF860_R_LOW3 = 0x22,
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COFF860_R_LOW4 = 0x23,
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COFF860_R_SPLIT0 = 0x24,
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COFF860_R_SPLIT1 = 0x25,
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COFF860_R_SPLIT2 = 0x26,
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COFF860_R_HIGHADJ = 0x27,
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COFF860_R_BRADDR = 0x28
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};
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