2012-03-27 23:13:14 +00:00
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/* Assembly functions for libgcc2.
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2017-10-07 00:16:47 +00:00
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Copyright (C) 2001-2017 Free Software Foundation, Inc.
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2012-03-27 23:13:14 +00:00
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Contributed by Bob Wilson (bwilson@tensilica.com) at Tensilica.
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This file is part of GCC.
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GCC is free software; you can redistribute it and/or modify it under
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the terms of the GNU General Public License as published by the Free
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Software Foundation; either version 3, or (at your option) any later
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version.
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GCC is distributed in the hope that it will be useful, but WITHOUT ANY
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WARRANTY; without even the implied warranty of MERCHANTABILITY or
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FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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for more details.
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Under Section 7 of GPL version 3, you are granted additional
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permissions described in the GCC Runtime Library Exception, version
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3.1, as published by the Free Software Foundation.
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You should have received a copy of the GNU General Public License and
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a copy of the GCC Runtime Library Exception along with this program;
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see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
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<http://www.gnu.org/licenses/>. */
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#include "xtensa-config.h"
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/* __xtensa_libgcc_window_spill: This function flushes out all but the
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current register window. This is used to set up the stack so that
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arbitrary frames can be accessed. */
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2015-08-28 15:33:40 +00:00
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#if XCHAL_HAVE_WINDOWED && !__XTENSA_CALL0_ABI__
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2012-03-27 23:13:14 +00:00
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.align 4
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.global __xtensa_libgcc_window_spill
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.type __xtensa_libgcc_window_spill,@function
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__xtensa_libgcc_window_spill:
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2017-04-10 11:32:00 +00:00
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entry sp, 48
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#if XCHAL_NUM_AREGS > 16
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call12 1f
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retw
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.align 4
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1:
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.rept (XCHAL_NUM_AREGS - 24) / 12
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_entry sp, 48
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mov a12, a0
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.endr
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_entry sp, 16
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#if XCHAL_NUM_AREGS % 12 == 0
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mov a4, a4
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#elif XCHAL_NUM_AREGS % 12 == 4
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mov a8, a8
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#elif XCHAL_NUM_AREGS % 12 == 8
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mov a12, a12
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#endif
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retw
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#else
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mov a8, a8
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2012-03-27 23:13:14 +00:00
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retw
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2017-04-10 11:32:00 +00:00
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#endif
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2012-03-27 23:13:14 +00:00
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.size __xtensa_libgcc_window_spill, .-__xtensa_libgcc_window_spill
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2015-08-28 15:33:40 +00:00
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#endif
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2012-03-27 23:13:14 +00:00
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/* __xtensa_nonlocal_goto: This code does all the hard work of a
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nonlocal goto on Xtensa. It is here in the library to avoid the
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code size bloat of generating it in-line. There are two
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arguments:
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a2 = frame pointer for the procedure containing the label
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a3 = goto handler address
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This function never returns to its caller but instead goes directly
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to the address of the specified goto handler. */
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2015-08-28 15:33:40 +00:00
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#if XCHAL_HAVE_WINDOWED && !__XTENSA_CALL0_ABI__
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2012-03-27 23:13:14 +00:00
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.align 4
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.global __xtensa_nonlocal_goto
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.type __xtensa_nonlocal_goto,@function
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__xtensa_nonlocal_goto:
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entry sp, 32
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/* Flush registers. */
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2017-04-10 11:32:00 +00:00
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call8 __xtensa_libgcc_window_spill
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2012-03-27 23:13:14 +00:00
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/* Because the save area for a0-a3 is stored one frame below
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the one identified by a2, the only way to restore those
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registers is to unwind the stack. If alloca() were never
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called, we could just unwind until finding the sp value
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matching a2. However, a2 is a frame pointer, not a stack
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pointer, and may not be encountered during the unwinding.
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The solution is to unwind until going _past_ the value
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given by a2. This involves keeping three stack pointer
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values during the unwinding:
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next = sp of frame N-1
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cur = sp of frame N
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prev = sp of frame N+1
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When next > a2, the desired save area is stored relative
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to prev. At this point, cur will be the same as a2
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except in the alloca() case.
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Besides finding the values to be restored to a0-a3, we also
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need to find the current window size for the target
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function. This can be extracted from the high bits of the
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return address, initially in a0. As the unwinding
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proceeds, the window size is taken from the value of a0
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saved _two_ frames below the current frame. */
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addi a5, sp, -16 /* a5 = prev - save area */
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l32i a6, a5, 4
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addi a6, a6, -16 /* a6 = cur - save area */
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mov a8, a0 /* a8 = return address (for window size) */
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j .Lfirstframe
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.Lnextframe:
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l32i a8, a5, 0 /* next return address (for window size) */
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mov a5, a6 /* advance prev */
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addi a6, a7, -16 /* advance cur */
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.Lfirstframe:
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l32i a7, a6, 4 /* a7 = next */
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bgeu a2, a7, .Lnextframe
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/* At this point, prev (a5) points to the save area with the saved
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values of a0-a3. Copy those values into the save area at the
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current sp so they will be reloaded when the return from this
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function underflows. We don't have to worry about exceptions
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while updating the current save area, because the windows have
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already been flushed. */
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addi a4, sp, -16 /* a4 = save area of this function */
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l32i a6, a5, 0
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l32i a7, a5, 4
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s32i a6, a4, 0
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s32i a7, a4, 4
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l32i a6, a5, 8
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l32i a7, a5, 12
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s32i a6, a4, 8
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s32i a7, a4, 12
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/* Set return address to goto handler. Use the window size bits
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from the return address two frames below the target. */
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extui a8, a8, 30, 2 /* get window size from return addr. */
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slli a3, a3, 2 /* get goto handler addr. << 2 */
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ssai 2
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src a0, a8, a3 /* combine them with a funnel shift */
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retw
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.size __xtensa_nonlocal_goto, .-__xtensa_nonlocal_goto
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2015-08-28 15:33:40 +00:00
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#endif
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2012-03-27 23:13:14 +00:00
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/* __xtensa_sync_caches: This function is called after writing a trampoline
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on the stack to force all the data writes to memory and invalidate the
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instruction cache. a2 is the address of the new trampoline.
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After the trampoline data is written out, it must be flushed out of
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the data cache into memory. We use DHWB in case we have a writeback
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cache. At least one DHWB instruction is needed for each data cache
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line which may be touched by the trampoline. An ISYNC instruction
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must follow the DHWBs.
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We have to flush the i-cache to make sure that the new values get used.
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At least one IHI instruction is needed for each i-cache line which may
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be touched by the trampoline. An ISYNC instruction is also needed to
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make sure that the modified instructions are loaded into the instruction
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fetch buffer. */
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/* Use the maximum trampoline size. Flushing a bit extra is OK. */
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#define TRAMPOLINE_SIZE 60
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.text
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.align 4
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.global __xtensa_sync_caches
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.type __xtensa_sync_caches,@function
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__xtensa_sync_caches:
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2015-08-28 15:33:40 +00:00
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#if XCHAL_HAVE_WINDOWED && !__XTENSA_CALL0_ABI__
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2012-03-27 23:13:14 +00:00
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entry sp, 32
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2015-08-28 15:33:40 +00:00
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#endif
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2012-03-27 23:13:14 +00:00
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#if XCHAL_DCACHE_SIZE > 0
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/* Flush the trampoline from the data cache. */
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extui a4, a2, 0, XCHAL_DCACHE_LINEWIDTH
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addi a4, a4, TRAMPOLINE_SIZE
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addi a4, a4, (1 << XCHAL_DCACHE_LINEWIDTH) - 1
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srli a4, a4, XCHAL_DCACHE_LINEWIDTH
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mov a3, a2
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.Ldcache_loop:
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dhwb a3, 0
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addi a3, a3, (1 << XCHAL_DCACHE_LINEWIDTH)
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addi a4, a4, -1
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bnez a4, .Ldcache_loop
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isync
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#endif
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#if XCHAL_ICACHE_SIZE > 0
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/* Invalidate the corresponding lines in the instruction cache. */
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extui a4, a2, 0, XCHAL_ICACHE_LINEWIDTH
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addi a4, a4, TRAMPOLINE_SIZE
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addi a4, a4, (1 << XCHAL_ICACHE_LINEWIDTH) - 1
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srli a4, a4, XCHAL_ICACHE_LINEWIDTH
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.Licache_loop:
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ihi a2, 0
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addi a2, a2, (1 << XCHAL_ICACHE_LINEWIDTH)
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addi a4, a4, -1
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bnez a4, .Licache_loop
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#endif
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isync
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2015-08-28 15:33:40 +00:00
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#if XCHAL_HAVE_WINDOWED && !__XTENSA_CALL0_ABI__
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2012-03-27 23:13:14 +00:00
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retw
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2015-08-28 15:33:40 +00:00
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#else
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ret
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#endif
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2012-03-27 23:13:14 +00:00
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.size __xtensa_sync_caches, .-__xtensa_sync_caches
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