2012-03-26 19:18:29 +00:00
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/* tc-microblaze.c -- Assemble code for Xilinx MicroBlaze
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2022-10-27 18:45:45 +00:00
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Copyright (C) 2009-2022 Free Software Foundation, Inc.
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2012-03-26 19:18:29 +00:00
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This file is part of GAS, the GNU Assembler.
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GAS is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3, or (at your option)
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any later version.
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GAS is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with GAS; see the file COPYING. If not, write to the Free
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Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
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02110-1301, USA. */
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#include "as.h"
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2014-09-12 22:14:23 +00:00
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#include <stdio.h>
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2012-03-26 19:18:29 +00:00
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#include "bfd.h"
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#include "subsegs.h"
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#define DEFINE_TABLE
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#include "../opcodes/microblaze-opc.h"
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#include "../opcodes/microblaze-opcm.h"
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#include "safe-ctype.h"
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#include <string.h>
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#include <dwarf2dbg.h>
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#include "aout/stab_gnu.h"
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#ifndef streq
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#define streq(a,b) (strcmp (a, b) == 0)
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#endif
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2014-09-12 22:14:23 +00:00
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#define OPTION_EB (OPTION_MD_BASE + 0)
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#define OPTION_EL (OPTION_MD_BASE + 1)
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2012-03-26 19:18:29 +00:00
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void microblaze_generate_symbol (char *sym);
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2022-10-27 18:45:45 +00:00
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static bool check_spl_reg (unsigned *);
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2012-03-26 19:18:29 +00:00
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/* Several places in this file insert raw instructions into the
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object. They should generate the instruction
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and then use these four macros to crack the instruction value into
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the appropriate byte values. */
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#define INST_BYTE0(x) (target_big_endian ? (((x) >> 24) & 0xFF) : ((x) & 0xFF))
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#define INST_BYTE1(x) (target_big_endian ? (((x) >> 16) & 0xFF) : (((x) >> 8) & 0xFF))
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#define INST_BYTE2(x) (target_big_endian ? (((x) >> 8) & 0xFF) : (((x) >> 16) & 0xFF))
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#define INST_BYTE3(x) (target_big_endian ? ((x) & 0xFF) : (((x) >> 24) & 0xFF))
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/* This array holds the chars that always start a comment. If the
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pre-processor is disabled, these aren't very useful. */
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const char comment_chars[] = "#";
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const char line_separator_chars[] = ";";
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/* This array holds the chars that only start a comment at the beginning of
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a line. */
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const char line_comment_chars[] = "#";
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const int md_reloc_size = 8; /* Size of relocation record. */
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/* Chars that can be used to separate mant
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from exp in floating point numbers. */
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const char EXP_CHARS[] = "eE";
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/* Chars that mean this number is a floating point constant
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As in 0f12.456
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or 0d1.2345e12. */
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const char FLT_CHARS[] = "rRsSfFdDxXpP";
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/* INST_PC_OFFSET and INST_NO_OFFSET are 0 and 1. */
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#define UNDEFINED_PC_OFFSET 2
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#define DEFINED_ABS_SEGMENT 3
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#define DEFINED_PC_OFFSET 4
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#define DEFINED_RO_SEGMENT 5
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#define DEFINED_RW_SEGMENT 6
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#define LARGE_DEFINED_PC_OFFSET 7
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#define GOT_OFFSET 8
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#define PLT_OFFSET 9
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#define GOTOFF_OFFSET 10
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2014-09-12 22:14:23 +00:00
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#define TLSGD_OFFSET 11
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#define TLSLD_OFFSET 12
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#define TLSDTPMOD_OFFSET 13
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#define TLSDTPREL_OFFSET 14
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#define TLSGOTTPREL_OFFSET 15
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#define TLSTPREL_OFFSET 16
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2018-12-28 15:25:28 +00:00
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#define TEXT_OFFSET 17
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#define TEXT_PC_OFFSET 18
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2012-03-26 19:18:29 +00:00
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/* Initialize the relax table. */
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const relax_typeS md_relax_table[] =
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{
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{ 1, 1, 0, 0 }, /* 0: Unused. */
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{ 1, 1, 0, 0 }, /* 1: Unused. */
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{ 1, 1, 0, 0 }, /* 2: Unused. */
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{ 1, 1, 0, 0 }, /* 3: Unused. */
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{ 32767, -32768, INST_WORD_SIZE, LARGE_DEFINED_PC_OFFSET }, /* 4: DEFINED_PC_OFFSET. */
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{ 1, 1, 0, 0 }, /* 5: Unused. */
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{ 1, 1, 0, 0 }, /* 6: Unused. */
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{ 0x7fffffff, 0x80000000, INST_WORD_SIZE*2, 0 }, /* 7: LARGE_DEFINED_PC_OFFSET. */
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{ 0x7fffffff, 0x80000000, INST_WORD_SIZE*2, 0 }, /* 8: GOT_OFFSET. */
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{ 0x7fffffff, 0x80000000, INST_WORD_SIZE*2, 0 }, /* 9: PLT_OFFSET. */
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{ 0x7fffffff, 0x80000000, INST_WORD_SIZE*2, 0 }, /* 10: GOTOFF_OFFSET. */
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2014-09-12 22:14:23 +00:00
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{ 0x7fffffff, 0x80000000, INST_WORD_SIZE*2, 0 }, /* 11: TLSGD_OFFSET. */
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{ 0x7fffffff, 0x80000000, INST_WORD_SIZE*2, 0 }, /* 12: TLSLD_OFFSET. */
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{ 0x7fffffff, 0x80000000, INST_WORD_SIZE*1, 0 }, /* 13: TLSDTPMOD_OFFSET. */
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{ 0x7fffffff, 0x80000000, INST_WORD_SIZE*2, 0 }, /* 14: TLSDTPREL_OFFSET. */
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{ 0x7fffffff, 0x80000000, INST_WORD_SIZE*2, 0 }, /* 15: TLSGOTTPREL_OFFSET. */
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2018-12-28 15:25:28 +00:00
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{ 0x7fffffff, 0x80000000, INST_WORD_SIZE*2, 0 }, /* 16: TLSTPREL_OFFSET. */
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{ 0x7fffffff, 0x80000000, INST_WORD_SIZE*2, 0 }, /* 17: TEXT_OFFSET. */
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{ 0x7fffffff, 0x80000000, INST_WORD_SIZE*2, 0 } /* 18: TEXT_PC_OFFSET. */
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2012-03-26 19:18:29 +00:00
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};
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2022-10-27 18:45:45 +00:00
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static htab_t opcode_hash_control; /* Opcode mnemonics. */
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2012-03-26 19:18:29 +00:00
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static segT sbss_segment = 0; /* Small bss section. */
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static segT sbss2_segment = 0; /* Section not used. */
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static segT sdata_segment = 0; /* Small data section. */
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static segT sdata2_segment = 0; /* Small read-only section. */
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static segT rodata_segment = 0; /* read-only section. */
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/* Generate a symbol for stabs information. */
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void
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microblaze_generate_symbol (char *sym)
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{
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#define MICROBLAZE_FAKE_LABEL_NAME "XL0\001"
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static int microblaze_label_count;
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sprintf (sym, "%sL%d", MICROBLAZE_FAKE_LABEL_NAME, microblaze_label_count);
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++microblaze_label_count;
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}
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/* Handle the section changing pseudo-ops. */
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static void
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microblaze_s_text (int ignore ATTRIBUTE_UNUSED)
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{
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#ifdef OBJ_ELF
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obj_elf_text (ignore);
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#else
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s_text (ignore);
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#endif
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}
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static void
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microblaze_s_data (int ignore ATTRIBUTE_UNUSED)
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{
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#ifdef OBJ_ELF
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2022-10-27 18:45:45 +00:00
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obj_elf_change_section (".data", SHT_PROGBITS, SHF_ALLOC+SHF_WRITE,
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2017-10-07 00:16:47 +00:00
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0, 0, 0, 0);
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2012-03-26 19:18:29 +00:00
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#else
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s_data (ignore);
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#endif
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}
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/* Things in the .sdata segment are always considered to be in the small data section. */
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static void
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microblaze_s_sdata (int ignore ATTRIBUTE_UNUSED)
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{
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#ifdef OBJ_ELF
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2022-10-27 18:45:45 +00:00
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obj_elf_change_section (".sdata", SHT_PROGBITS, SHF_ALLOC+SHF_WRITE,
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2017-10-07 00:16:47 +00:00
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0, 0, 0, 0);
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2012-03-26 19:18:29 +00:00
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#else
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s_data (ignore);
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#endif
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}
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/* Pseudo op to make file scope bss items. */
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static void
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microblaze_s_lcomm (int xxx ATTRIBUTE_UNUSED)
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{
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char *name;
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char c;
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char *p;
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offsetT size;
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symbolS *symbolP;
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offsetT align;
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char *pfrag;
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int align2;
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segT current_seg = now_seg;
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subsegT current_subseg = now_subseg;
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2017-04-10 11:32:00 +00:00
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c = get_symbol_name (&name);
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2012-03-26 19:18:29 +00:00
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/* Just after name is now '\0'. */
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p = input_line_pointer;
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2017-04-10 11:32:00 +00:00
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(void) restore_line_pointer (c);
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2012-03-26 19:18:29 +00:00
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SKIP_WHITESPACE ();
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if (*input_line_pointer != ',')
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{
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as_bad (_("Expected comma after symbol-name: rest of line ignored."));
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ignore_rest_of_line ();
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return;
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}
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input_line_pointer++; /* skip ',' */
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if ((size = get_absolute_expression ()) < 0)
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{
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as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) size);
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ignore_rest_of_line ();
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return;
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}
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/* The third argument to .lcomm is the alignment. */
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if (*input_line_pointer != ',')
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align = 8;
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else
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{
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++input_line_pointer;
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align = get_absolute_expression ();
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if (align <= 0)
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{
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as_warn (_("ignoring bad alignment"));
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align = 8;
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}
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}
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*p = 0;
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symbolP = symbol_find_or_make (name);
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*p = c;
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if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP))
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{
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as_bad (_("Ignoring attempt to re-define symbol `%s'."),
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S_GET_NAME (symbolP));
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ignore_rest_of_line ();
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return;
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}
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if (S_GET_VALUE (symbolP) && S_GET_VALUE (symbolP) != (valueT) size)
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{
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as_bad (_("Length of .lcomm \"%s\" is already %ld. Not changed to %ld."),
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S_GET_NAME (symbolP),
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(long) S_GET_VALUE (symbolP),
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(long) size);
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ignore_rest_of_line ();
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return;
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}
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/* Allocate_bss. */
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if (align)
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{
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/* Convert to a power of 2 alignment. */
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for (align2 = 0; (align & 1) == 0; align >>= 1, ++align2);
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if (align != 1)
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{
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as_bad (_("Common alignment not a power of 2"));
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ignore_rest_of_line ();
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return;
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}
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}
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else
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align2 = 0;
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record_alignment (current_seg, align2);
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subseg_set (current_seg, current_subseg);
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if (align2)
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frag_align (align2, 0, 0);
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if (S_GET_SEGMENT (symbolP) == current_seg)
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symbol_get_frag (symbolP)->fr_symbol = 0;
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symbol_set_frag (symbolP, frag_now);
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pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, symbolP, size,
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(char *) 0);
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*pfrag = 0;
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S_SET_SIZE (symbolP, size);
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S_SET_SEGMENT (symbolP, current_seg);
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subseg_set (current_seg, current_subseg);
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demand_empty_rest_of_line ();
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}
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static void
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microblaze_s_rdata (int localvar)
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{
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#ifdef OBJ_ELF
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if (localvar == 0)
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{
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/* rodata. */
|
2022-10-27 18:45:45 +00:00
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obj_elf_change_section (".rodata", SHT_PROGBITS, SHF_ALLOC,
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2017-10-07 00:16:47 +00:00
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0, 0, 0, 0);
|
2012-03-26 19:18:29 +00:00
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if (rodata_segment == 0)
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rodata_segment = subseg_new (".rodata", 0);
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}
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else
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{
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/* 1 .sdata2. */
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2022-10-27 18:45:45 +00:00
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obj_elf_change_section (".sdata2", SHT_PROGBITS, SHF_ALLOC,
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2017-10-07 00:16:47 +00:00
|
|
|
|
0, 0, 0, 0);
|
2012-03-26 19:18:29 +00:00
|
|
|
|
}
|
|
|
|
|
#else
|
|
|
|
|
s_data (ignore);
|
|
|
|
|
#endif
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static void
|
|
|
|
|
microblaze_s_bss (int localvar)
|
|
|
|
|
{
|
|
|
|
|
#ifdef OBJ_ELF
|
|
|
|
|
if (localvar == 0) /* bss. */
|
2022-10-27 18:45:45 +00:00
|
|
|
|
obj_elf_change_section (".bss", SHT_NOBITS, SHF_ALLOC+SHF_WRITE,
|
2017-10-07 00:16:47 +00:00
|
|
|
|
0, 0, 0, 0);
|
2012-03-26 19:18:29 +00:00
|
|
|
|
else if (localvar == 1)
|
|
|
|
|
{
|
|
|
|
|
/* sbss. */
|
2022-10-27 18:45:45 +00:00
|
|
|
|
obj_elf_change_section (".sbss", SHT_NOBITS, SHF_ALLOC+SHF_WRITE,
|
2017-10-07 00:16:47 +00:00
|
|
|
|
0, 0, 0, 0);
|
2012-03-26 19:18:29 +00:00
|
|
|
|
if (sbss_segment == 0)
|
|
|
|
|
sbss_segment = subseg_new (".sbss", 0);
|
|
|
|
|
}
|
|
|
|
|
#else
|
|
|
|
|
s_data (ignore);
|
|
|
|
|
#endif
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* endp_p is always 1 as this func is called only for .end <funcname>
|
|
|
|
|
This func consumes the <funcname> and calls regular processing
|
|
|
|
|
s_func(1) with arg 1 (1 for end). */
|
|
|
|
|
|
|
|
|
|
static void
|
|
|
|
|
microblaze_s_func (int end_p ATTRIBUTE_UNUSED)
|
|
|
|
|
{
|
2017-04-10 11:32:00 +00:00
|
|
|
|
char *name;
|
|
|
|
|
restore_line_pointer (get_symbol_name (&name));
|
2012-03-26 19:18:29 +00:00
|
|
|
|
s_func (1);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Handle the .weakext pseudo-op as defined in Kane and Heinrich. */
|
|
|
|
|
|
|
|
|
|
static void
|
|
|
|
|
microblaze_s_weakext (int ignore ATTRIBUTE_UNUSED)
|
|
|
|
|
{
|
|
|
|
|
char *name;
|
|
|
|
|
int c;
|
|
|
|
|
symbolS *symbolP;
|
|
|
|
|
expressionS exp;
|
|
|
|
|
|
2017-04-10 11:32:00 +00:00
|
|
|
|
c = get_symbol_name (&name);
|
2012-03-26 19:18:29 +00:00
|
|
|
|
symbolP = symbol_find_or_make (name);
|
|
|
|
|
S_SET_WEAK (symbolP);
|
2017-04-10 11:32:00 +00:00
|
|
|
|
(void) restore_line_pointer (c);
|
2012-03-26 19:18:29 +00:00
|
|
|
|
|
|
|
|
|
SKIP_WHITESPACE ();
|
|
|
|
|
|
|
|
|
|
if (!is_end_of_line[(unsigned char) *input_line_pointer])
|
|
|
|
|
{
|
|
|
|
|
if (S_IS_DEFINED (symbolP))
|
|
|
|
|
{
|
|
|
|
|
as_bad ("Ignoring attempt to redefine symbol `%s'.",
|
|
|
|
|
S_GET_NAME (symbolP));
|
|
|
|
|
ignore_rest_of_line ();
|
|
|
|
|
return;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
if (*input_line_pointer == ',')
|
|
|
|
|
{
|
|
|
|
|
++input_line_pointer;
|
|
|
|
|
SKIP_WHITESPACE ();
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
expression (&exp);
|
|
|
|
|
if (exp.X_op != O_symbol)
|
|
|
|
|
{
|
|
|
|
|
as_bad ("bad .weakext directive");
|
|
|
|
|
ignore_rest_of_line ();
|
|
|
|
|
return;
|
|
|
|
|
}
|
|
|
|
|
symbol_set_value_expression (symbolP, &exp);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
demand_empty_rest_of_line ();
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* This table describes all the machine specific pseudo-ops the assembler
|
|
|
|
|
has to support. The fields are:
|
|
|
|
|
Pseudo-op name without dot
|
|
|
|
|
Function to call to execute this pseudo-op
|
|
|
|
|
Integer arg to pass to the function. */
|
|
|
|
|
/* If the pseudo-op is not found in this table, it searches in the obj-elf.c,
|
|
|
|
|
and then in the read.c table. */
|
|
|
|
|
const pseudo_typeS md_pseudo_table[] =
|
|
|
|
|
{
|
|
|
|
|
{"lcomm", microblaze_s_lcomm, 1},
|
|
|
|
|
{"data", microblaze_s_data, 0},
|
|
|
|
|
{"data8", cons, 1}, /* Same as byte. */
|
|
|
|
|
{"data16", cons, 2}, /* Same as hword. */
|
|
|
|
|
{"data32", cons, 4}, /* Same as word. */
|
|
|
|
|
{"ent", s_func, 0}, /* Treat ent as function entry point. */
|
|
|
|
|
{"end", microblaze_s_func, 1}, /* Treat end as function end point. */
|
|
|
|
|
{"gpword", s_rva, 4}, /* gpword label => store resolved label address in data section. */
|
|
|
|
|
{"weakext", microblaze_s_weakext, 0},
|
|
|
|
|
{"rodata", microblaze_s_rdata, 0},
|
|
|
|
|
{"sdata2", microblaze_s_rdata, 1},
|
|
|
|
|
{"sdata", microblaze_s_sdata, 0},
|
|
|
|
|
{"bss", microblaze_s_bss, 0},
|
|
|
|
|
{"sbss", microblaze_s_bss, 1},
|
|
|
|
|
{"text", microblaze_s_text, 0},
|
|
|
|
|
{"word", cons, 4},
|
|
|
|
|
{"frame", s_ignore, 0},
|
|
|
|
|
{"mask", s_ignore, 0}, /* Emitted by gcc. */
|
|
|
|
|
{NULL, NULL, 0}
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
/* This function is called once, at assembler startup time. This should
|
|
|
|
|
set up all the tables, etc that the MD part of the assembler needs. */
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
md_begin (void)
|
|
|
|
|
{
|
2022-10-27 18:45:45 +00:00
|
|
|
|
const struct op_code_struct * opcode;
|
2012-03-26 19:18:29 +00:00
|
|
|
|
|
2022-10-27 18:45:45 +00:00
|
|
|
|
opcode_hash_control = str_htab_create ();
|
2012-03-26 19:18:29 +00:00
|
|
|
|
|
|
|
|
|
/* Insert unique names into hash table. */
|
2022-10-27 18:45:45 +00:00
|
|
|
|
for (opcode = microblaze_opcodes; opcode->name; opcode ++)
|
|
|
|
|
str_hash_insert (opcode_hash_control, opcode->name, opcode, 0);
|
2012-03-26 19:18:29 +00:00
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Try to parse a reg name. */
|
|
|
|
|
|
|
|
|
|
static char *
|
|
|
|
|
parse_reg (char * s, unsigned * reg)
|
|
|
|
|
{
|
|
|
|
|
unsigned tmpreg = 0;
|
|
|
|
|
|
|
|
|
|
/* Strip leading whitespace. */
|
|
|
|
|
while (ISSPACE (* s))
|
|
|
|
|
++ s;
|
|
|
|
|
|
|
|
|
|
if (strncasecmp (s, "rpc", 3) == 0)
|
|
|
|
|
{
|
|
|
|
|
*reg = REG_PC;
|
|
|
|
|
return s + 3;
|
|
|
|
|
}
|
|
|
|
|
else if (strncasecmp (s, "rmsr", 4) == 0)
|
|
|
|
|
{
|
|
|
|
|
*reg = REG_MSR;
|
|
|
|
|
return s + 4;
|
|
|
|
|
}
|
|
|
|
|
else if (strncasecmp (s, "rear", 4) == 0)
|
|
|
|
|
{
|
|
|
|
|
*reg = REG_EAR;
|
|
|
|
|
return s + 4;
|
|
|
|
|
}
|
|
|
|
|
else if (strncasecmp (s, "resr", 4) == 0)
|
|
|
|
|
{
|
|
|
|
|
*reg = REG_ESR;
|
|
|
|
|
return s + 4;
|
|
|
|
|
}
|
|
|
|
|
else if (strncasecmp (s, "rfsr", 4) == 0)
|
|
|
|
|
{
|
|
|
|
|
*reg = REG_FSR;
|
|
|
|
|
return s + 4;
|
|
|
|
|
}
|
|
|
|
|
else if (strncasecmp (s, "rbtr", 4) == 0)
|
|
|
|
|
{
|
|
|
|
|
*reg = REG_BTR;
|
|
|
|
|
return s + 4;
|
|
|
|
|
}
|
|
|
|
|
else if (strncasecmp (s, "redr", 4) == 0)
|
|
|
|
|
{
|
|
|
|
|
*reg = REG_EDR;
|
|
|
|
|
return s + 4;
|
|
|
|
|
}
|
|
|
|
|
/* MMU registers start. */
|
|
|
|
|
else if (strncasecmp (s, "rpid", 4) == 0)
|
|
|
|
|
{
|
|
|
|
|
*reg = REG_PID;
|
|
|
|
|
return s + 4;
|
|
|
|
|
}
|
|
|
|
|
else if (strncasecmp (s, "rzpr", 4) == 0)
|
|
|
|
|
{
|
|
|
|
|
*reg = REG_ZPR;
|
|
|
|
|
return s + 4;
|
|
|
|
|
}
|
|
|
|
|
else if (strncasecmp (s, "rtlbx", 5) == 0)
|
|
|
|
|
{
|
|
|
|
|
*reg = REG_TLBX;
|
|
|
|
|
return s + 5;
|
|
|
|
|
}
|
|
|
|
|
else if (strncasecmp (s, "rtlblo", 6) == 0)
|
|
|
|
|
{
|
|
|
|
|
*reg = REG_TLBLO;
|
|
|
|
|
return s + 6;
|
|
|
|
|
}
|
|
|
|
|
else if (strncasecmp (s, "rtlbhi", 6) == 0)
|
|
|
|
|
{
|
|
|
|
|
*reg = REG_TLBHI;
|
|
|
|
|
return s + 6;
|
|
|
|
|
}
|
|
|
|
|
else if (strncasecmp (s, "rtlbsx", 6) == 0)
|
|
|
|
|
{
|
|
|
|
|
*reg = REG_TLBSX;
|
|
|
|
|
return s + 6;
|
|
|
|
|
}
|
|
|
|
|
/* MMU registers end. */
|
|
|
|
|
else if (strncasecmp (s, "rpvr", 4) == 0)
|
|
|
|
|
{
|
|
|
|
|
if (ISDIGIT (s[4]) && ISDIGIT (s[5]))
|
|
|
|
|
{
|
|
|
|
|
tmpreg = (s[4]-'0')*10 + s[5] - '0';
|
|
|
|
|
s += 6;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
else if (ISDIGIT (s[4]))
|
|
|
|
|
{
|
|
|
|
|
tmpreg = s[4] - '0';
|
|
|
|
|
s += 5;
|
|
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
as_bad (_("register expected, but saw '%.6s'"), s);
|
|
|
|
|
if ((int) tmpreg >= MIN_PVR_REGNUM && tmpreg <= MAX_PVR_REGNUM)
|
|
|
|
|
*reg = REG_PVR + tmpreg;
|
|
|
|
|
else
|
|
|
|
|
{
|
|
|
|
|
as_bad (_("Invalid register number at '%.6s'"), s);
|
|
|
|
|
*reg = REG_PVR;
|
|
|
|
|
}
|
|
|
|
|
return s;
|
|
|
|
|
}
|
|
|
|
|
else if (strncasecmp (s, "rsp", 3) == 0)
|
|
|
|
|
{
|
|
|
|
|
*reg = REG_SP;
|
|
|
|
|
return s + 3;
|
|
|
|
|
}
|
|
|
|
|
else if (strncasecmp (s, "rfsl", 4) == 0)
|
|
|
|
|
{
|
|
|
|
|
if (ISDIGIT (s[4]) && ISDIGIT (s[5]))
|
|
|
|
|
{
|
|
|
|
|
tmpreg = (s[4] - '0') * 10 + s[5] - '0';
|
|
|
|
|
s += 6;
|
|
|
|
|
}
|
|
|
|
|
else if (ISDIGIT (s[4]))
|
|
|
|
|
{
|
|
|
|
|
tmpreg = s[4] - '0';
|
|
|
|
|
s += 5;
|
|
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
as_bad (_("register expected, but saw '%.6s'"), s);
|
|
|
|
|
|
|
|
|
|
if ((int) tmpreg >= MIN_REGNUM && tmpreg <= MAX_REGNUM)
|
|
|
|
|
*reg = tmpreg;
|
|
|
|
|
else
|
|
|
|
|
{
|
|
|
|
|
as_bad (_("Invalid register number at '%.6s'"), s);
|
|
|
|
|
*reg = 0;
|
|
|
|
|
}
|
|
|
|
|
return s;
|
|
|
|
|
}
|
2014-09-12 22:14:23 +00:00
|
|
|
|
/* Stack protection registers. */
|
|
|
|
|
else if (strncasecmp (s, "rshr", 4) == 0)
|
|
|
|
|
{
|
|
|
|
|
*reg = REG_SHR;
|
|
|
|
|
return s + 4;
|
|
|
|
|
}
|
|
|
|
|
else if (strncasecmp (s, "rslr", 4) == 0)
|
|
|
|
|
{
|
|
|
|
|
*reg = REG_SLR;
|
|
|
|
|
return s + 4;
|
|
|
|
|
}
|
2012-03-26 19:18:29 +00:00
|
|
|
|
else
|
|
|
|
|
{
|
|
|
|
|
if (TOLOWER (s[0]) == 'r')
|
|
|
|
|
{
|
|
|
|
|
if (ISDIGIT (s[1]) && ISDIGIT (s[2]))
|
|
|
|
|
{
|
|
|
|
|
tmpreg = (s[1] - '0') * 10 + s[2] - '0';
|
|
|
|
|
s += 3;
|
|
|
|
|
}
|
|
|
|
|
else if (ISDIGIT (s[1]))
|
|
|
|
|
{
|
|
|
|
|
tmpreg = s[1] - '0';
|
|
|
|
|
s += 2;
|
|
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
as_bad (_("register expected, but saw '%.6s'"), s);
|
|
|
|
|
|
|
|
|
|
if ((int)tmpreg >= MIN_REGNUM && tmpreg <= MAX_REGNUM)
|
|
|
|
|
*reg = tmpreg;
|
|
|
|
|
else
|
|
|
|
|
{
|
|
|
|
|
as_bad (_("Invalid register number at '%.6s'"), s);
|
|
|
|
|
*reg = 0;
|
|
|
|
|
}
|
|
|
|
|
return s;
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
as_bad (_("register expected, but saw '%.6s'"), s);
|
|
|
|
|
*reg = 0;
|
|
|
|
|
return s;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static char *
|
|
|
|
|
parse_exp (char *s, expressionS *e)
|
|
|
|
|
{
|
|
|
|
|
char *save;
|
|
|
|
|
char *new_pointer;
|
|
|
|
|
|
|
|
|
|
/* Skip whitespace. */
|
|
|
|
|
while (ISSPACE (* s))
|
|
|
|
|
++ s;
|
|
|
|
|
|
|
|
|
|
save = input_line_pointer;
|
|
|
|
|
input_line_pointer = s;
|
|
|
|
|
|
|
|
|
|
expression (e);
|
|
|
|
|
|
|
|
|
|
if (e->X_op == O_absent)
|
|
|
|
|
as_fatal (_("missing operand"));
|
|
|
|
|
|
|
|
|
|
new_pointer = input_line_pointer;
|
|
|
|
|
input_line_pointer = save;
|
|
|
|
|
|
|
|
|
|
return new_pointer;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Symbol modifiers (@GOT, @PLT, @GOTOFF). */
|
2014-09-12 22:14:23 +00:00
|
|
|
|
#define IMM_NONE 0
|
2012-03-26 19:18:29 +00:00
|
|
|
|
#define IMM_GOT 1
|
|
|
|
|
#define IMM_PLT 2
|
|
|
|
|
#define IMM_GOTOFF 3
|
2014-09-12 22:14:23 +00:00
|
|
|
|
#define IMM_TLSGD 4
|
|
|
|
|
#define IMM_TLSLD 5
|
|
|
|
|
#define IMM_TLSDTPMOD 6
|
|
|
|
|
#define IMM_TLSDTPREL 7
|
|
|
|
|
#define IMM_TLSTPREL 8
|
2018-12-28 15:25:28 +00:00
|
|
|
|
#define IMM_TXTREL 9
|
|
|
|
|
#define IMM_TXTPCREL 10
|
|
|
|
|
#define IMM_MAX 11
|
2014-09-12 22:14:23 +00:00
|
|
|
|
|
|
|
|
|
struct imm_type {
|
2017-04-10 11:32:00 +00:00
|
|
|
|
const char *isuffix; /* Suffix String */
|
2014-09-12 22:14:23 +00:00
|
|
|
|
int itype; /* Suffix Type */
|
|
|
|
|
int otype; /* Offset Type */
|
|
|
|
|
};
|
|
|
|
|
|
2017-10-07 00:16:47 +00:00
|
|
|
|
/* These are NOT in ascending order of type, GOTOFF is ahead to make
|
2014-09-12 22:14:23 +00:00
|
|
|
|
sure @GOTOFF does not get matched with @GOT */
|
|
|
|
|
static struct imm_type imm_types[] = {
|
|
|
|
|
{ "NONE", IMM_NONE , 0 },
|
|
|
|
|
{ "GOTOFF", IMM_GOTOFF , GOTOFF_OFFSET },
|
|
|
|
|
{ "GOT", IMM_GOT , GOT_OFFSET },
|
|
|
|
|
{ "PLT", IMM_PLT , PLT_OFFSET },
|
|
|
|
|
{ "TLSGD", IMM_TLSGD , TLSGD_OFFSET },
|
|
|
|
|
{ "TLSLDM", IMM_TLSLD, TLSLD_OFFSET },
|
|
|
|
|
{ "TLSDTPMOD", IMM_TLSDTPMOD, TLSDTPMOD_OFFSET },
|
|
|
|
|
{ "TLSDTPREL", IMM_TLSDTPREL, TLSDTPREL_OFFSET },
|
2018-12-28 15:25:28 +00:00
|
|
|
|
{ "TLSTPREL", IMM_TLSTPREL, TLSTPREL_OFFSET },
|
|
|
|
|
{ "TXTREL", IMM_TXTREL, TEXT_OFFSET },
|
|
|
|
|
{ "TXTPCREL", IMM_TXTPCREL, TEXT_PC_OFFSET }
|
2014-09-12 22:14:23 +00:00
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
static int
|
|
|
|
|
match_imm (const char *s, int *ilen)
|
|
|
|
|
{
|
|
|
|
|
int i;
|
|
|
|
|
int slen;
|
|
|
|
|
|
|
|
|
|
/* Check for matching suffix */
|
|
|
|
|
for (i = 1; i < IMM_MAX; i++)
|
|
|
|
|
{
|
|
|
|
|
slen = strlen (imm_types[i].isuffix);
|
|
|
|
|
|
|
|
|
|
if (strncmp (imm_types[i].isuffix, s, slen) == 0)
|
|
|
|
|
{
|
|
|
|
|
*ilen = slen;
|
|
|
|
|
return imm_types[i].itype;
|
|
|
|
|
}
|
|
|
|
|
} /* for */
|
|
|
|
|
*ilen = 0;
|
|
|
|
|
return 0;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static int
|
|
|
|
|
get_imm_otype (int itype)
|
|
|
|
|
{
|
|
|
|
|
int i, otype;
|
|
|
|
|
|
|
|
|
|
otype = 0;
|
|
|
|
|
/* Check for matching itype */
|
|
|
|
|
for (i = 1; i < IMM_MAX; i++)
|
|
|
|
|
{
|
|
|
|
|
if (imm_types[i].itype == itype)
|
|
|
|
|
{
|
|
|
|
|
otype = imm_types[i].otype;
|
|
|
|
|
break;
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
return otype;
|
|
|
|
|
}
|
2012-03-26 19:18:29 +00:00
|
|
|
|
|
|
|
|
|
static symbolS * GOT_symbol;
|
|
|
|
|
|
|
|
|
|
#define GOT_SYMBOL_NAME "_GLOBAL_OFFSET_TABLE_"
|
|
|
|
|
|
|
|
|
|
static char *
|
2017-04-10 11:32:00 +00:00
|
|
|
|
parse_imm (char * s, expressionS * e, offsetT min, offsetT max)
|
2012-03-26 19:18:29 +00:00
|
|
|
|
{
|
|
|
|
|
char *new_pointer;
|
|
|
|
|
char *atp;
|
2014-09-12 22:14:23 +00:00
|
|
|
|
int itype, ilen;
|
|
|
|
|
|
|
|
|
|
ilen = 0;
|
2012-03-26 19:18:29 +00:00
|
|
|
|
|
|
|
|
|
/* Find the start of "@GOT" or "@PLT" suffix (if any) */
|
|
|
|
|
for (atp = s; *atp != '@'; atp++)
|
|
|
|
|
if (is_end_of_line[(unsigned char) *atp])
|
|
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
if (*atp == '@')
|
|
|
|
|
{
|
2014-09-12 22:14:23 +00:00
|
|
|
|
itype = match_imm (atp + 1, &ilen);
|
|
|
|
|
if (itype != 0)
|
|
|
|
|
{
|
|
|
|
|
*atp = 0;
|
|
|
|
|
e->X_md = itype;
|
|
|
|
|
}
|
2012-03-26 19:18:29 +00:00
|
|
|
|
else
|
2014-09-12 22:14:23 +00:00
|
|
|
|
{
|
|
|
|
|
atp = NULL;
|
|
|
|
|
e->X_md = 0;
|
|
|
|
|
ilen = 0;
|
|
|
|
|
}
|
2012-03-26 19:18:29 +00:00
|
|
|
|
*atp = 0;
|
|
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
{
|
|
|
|
|
atp = NULL;
|
|
|
|
|
e->X_md = 0;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
if (atp && !GOT_symbol)
|
|
|
|
|
{
|
|
|
|
|
GOT_symbol = symbol_find_or_make (GOT_SYMBOL_NAME);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
new_pointer = parse_exp (s, e);
|
|
|
|
|
|
2022-10-27 18:45:45 +00:00
|
|
|
|
if (!GOT_symbol && startswith (s, GOT_SYMBOL_NAME))
|
2014-09-12 22:14:23 +00:00
|
|
|
|
{
|
|
|
|
|
GOT_symbol = symbol_find_or_make (GOT_SYMBOL_NAME);
|
|
|
|
|
}
|
|
|
|
|
|
2012-03-26 19:18:29 +00:00
|
|
|
|
if (e->X_op == O_absent)
|
|
|
|
|
; /* An error message has already been emitted. */
|
|
|
|
|
else if ((e->X_op != O_constant && e->X_op != O_symbol) )
|
|
|
|
|
as_fatal (_("operand must be a constant or a label"));
|
2017-04-10 11:32:00 +00:00
|
|
|
|
else if (e->X_op == O_constant)
|
2012-03-26 19:18:29 +00:00
|
|
|
|
{
|
2017-04-10 11:32:00 +00:00
|
|
|
|
/* Special case: sign extend negative 32-bit values to offsetT size. */
|
|
|
|
|
if ((e->X_add_number >> 31) == 1)
|
|
|
|
|
e->X_add_number |= -((addressT) (1U << 31));
|
|
|
|
|
|
|
|
|
|
if (e->X_add_number < min || e->X_add_number > max)
|
|
|
|
|
{
|
|
|
|
|
as_fatal (_("operand must be absolute in range %lx..%lx, not %lx"),
|
|
|
|
|
(long) min, (long) max, (long) e->X_add_number);
|
|
|
|
|
}
|
2012-03-26 19:18:29 +00:00
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
if (atp)
|
|
|
|
|
{
|
|
|
|
|
*atp = '@'; /* restore back (needed?) */
|
|
|
|
|
if (new_pointer >= atp)
|
2014-09-12 22:14:23 +00:00
|
|
|
|
new_pointer += ilen + 1; /* sizeof (imm_suffix) + 1 for '@' */
|
2012-03-26 19:18:29 +00:00
|
|
|
|
}
|
|
|
|
|
return new_pointer;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static char *
|
|
|
|
|
check_got (int * got_type, int * got_len)
|
|
|
|
|
{
|
|
|
|
|
char *new_pointer;
|
|
|
|
|
char *atp;
|
|
|
|
|
char *past_got;
|
|
|
|
|
int first, second;
|
|
|
|
|
char *tmpbuf;
|
|
|
|
|
|
|
|
|
|
/* Find the start of "@GOT" or "@PLT" suffix (if any). */
|
|
|
|
|
for (atp = input_line_pointer; *atp != '@'; atp++)
|
|
|
|
|
if (is_end_of_line[(unsigned char) *atp])
|
|
|
|
|
return NULL;
|
|
|
|
|
|
2022-10-27 18:45:45 +00:00
|
|
|
|
if (startswith (atp + 1, "GOTOFF"))
|
2012-03-26 19:18:29 +00:00
|
|
|
|
{
|
|
|
|
|
*got_len = 6;
|
|
|
|
|
*got_type = IMM_GOTOFF;
|
|
|
|
|
}
|
2022-10-27 18:45:45 +00:00
|
|
|
|
else if (startswith (atp + 1, "GOT"))
|
2012-03-26 19:18:29 +00:00
|
|
|
|
{
|
|
|
|
|
*got_len = 3;
|
|
|
|
|
*got_type = IMM_GOT;
|
|
|
|
|
}
|
2022-10-27 18:45:45 +00:00
|
|
|
|
else if (startswith (atp + 1, "PLT"))
|
2012-03-26 19:18:29 +00:00
|
|
|
|
{
|
|
|
|
|
*got_len = 3;
|
|
|
|
|
*got_type = IMM_PLT;
|
|
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
return NULL;
|
|
|
|
|
|
|
|
|
|
if (!GOT_symbol)
|
|
|
|
|
GOT_symbol = symbol_find_or_make (GOT_SYMBOL_NAME);
|
|
|
|
|
|
|
|
|
|
first = atp - input_line_pointer;
|
|
|
|
|
|
|
|
|
|
past_got = atp + *got_len + 1;
|
|
|
|
|
for (new_pointer = past_got; !is_end_of_line[(unsigned char) *new_pointer++];)
|
|
|
|
|
;
|
|
|
|
|
second = new_pointer - past_got;
|
2017-04-10 11:32:00 +00:00
|
|
|
|
/* One extra byte for ' ' and one for NUL. */
|
|
|
|
|
tmpbuf = XNEWVEC (char, first + second + 2);
|
2012-03-26 19:18:29 +00:00
|
|
|
|
memcpy (tmpbuf, input_line_pointer, first);
|
|
|
|
|
tmpbuf[first] = ' '; /* @GOTOFF is replaced with a single space. */
|
|
|
|
|
memcpy (tmpbuf + first + 1, past_got, second);
|
|
|
|
|
tmpbuf[first + second + 1] = '\0';
|
|
|
|
|
|
|
|
|
|
return tmpbuf;
|
|
|
|
|
}
|
|
|
|
|
|
2015-08-28 15:32:19 +00:00
|
|
|
|
extern bfd_reloc_code_real_type
|
2012-03-26 19:18:29 +00:00
|
|
|
|
parse_cons_expression_microblaze (expressionS *exp, int size)
|
|
|
|
|
{
|
|
|
|
|
if (size == 4)
|
|
|
|
|
{
|
|
|
|
|
/* Handle @GOTOFF et.al. */
|
|
|
|
|
char *save, *gotfree_copy;
|
|
|
|
|
int got_len, got_type;
|
|
|
|
|
|
|
|
|
|
save = input_line_pointer;
|
|
|
|
|
gotfree_copy = check_got (& got_type, & got_len);
|
|
|
|
|
if (gotfree_copy)
|
|
|
|
|
input_line_pointer = gotfree_copy;
|
|
|
|
|
|
|
|
|
|
expression (exp);
|
|
|
|
|
|
|
|
|
|
if (gotfree_copy)
|
|
|
|
|
{
|
|
|
|
|
exp->X_md = got_type;
|
|
|
|
|
input_line_pointer = save + (input_line_pointer - gotfree_copy)
|
|
|
|
|
+ got_len;
|
|
|
|
|
free (gotfree_copy);
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
expression (exp);
|
2015-08-28 15:32:19 +00:00
|
|
|
|
return BFD_RELOC_NONE;
|
2012-03-26 19:18:29 +00:00
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* This is the guts of the machine-dependent assembler. STR points to a
|
|
|
|
|
machine dependent instruction. This function is supposed to emit
|
|
|
|
|
the frags/bytes it assembles to. */
|
|
|
|
|
|
2017-04-10 11:32:00 +00:00
|
|
|
|
static const char * str_microblaze_ro_anchor = "RO";
|
|
|
|
|
static const char * str_microblaze_rw_anchor = "RW";
|
2012-03-26 19:18:29 +00:00
|
|
|
|
|
2022-10-27 18:45:45 +00:00
|
|
|
|
static bool
|
2012-03-26 19:18:29 +00:00
|
|
|
|
check_spl_reg (unsigned * reg)
|
|
|
|
|
{
|
|
|
|
|
if ((*reg == REG_MSR) || (*reg == REG_PC)
|
|
|
|
|
|| (*reg == REG_EAR) || (*reg == REG_ESR)
|
|
|
|
|
|| (*reg == REG_FSR) || (*reg == REG_BTR) || (*reg == REG_EDR)
|
|
|
|
|
|| (*reg == REG_PID) || (*reg == REG_ZPR)
|
|
|
|
|
|| (*reg == REG_TLBX) || (*reg == REG_TLBLO)
|
|
|
|
|
|| (*reg == REG_TLBHI) || (*reg == REG_TLBSX)
|
2014-09-12 22:14:23 +00:00
|
|
|
|
|| (*reg == REG_SHR) || (*reg == REG_SLR)
|
2012-03-26 19:18:29 +00:00
|
|
|
|
|| (*reg >= REG_PVR+MIN_PVR_REGNUM && *reg <= REG_PVR+MAX_PVR_REGNUM))
|
2022-10-27 18:45:45 +00:00
|
|
|
|
return true;
|
2012-03-26 19:18:29 +00:00
|
|
|
|
|
2022-10-27 18:45:45 +00:00
|
|
|
|
return false;
|
2012-03-26 19:18:29 +00:00
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Here we decide which fixups can be adjusted to make them relative to
|
|
|
|
|
the beginning of the section instead of the symbol. Basically we need
|
|
|
|
|
to make sure that the dynamic relocations are done correctly, so in
|
|
|
|
|
some cases we force the original symbol to be used. */
|
|
|
|
|
|
|
|
|
|
int
|
|
|
|
|
tc_microblaze_fix_adjustable (struct fix *fixP)
|
|
|
|
|
{
|
|
|
|
|
if (GOT_symbol && fixP->fx_subsy == GOT_symbol)
|
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
|
|
if (fixP->fx_r_type == BFD_RELOC_MICROBLAZE_64_GOTOFF
|
|
|
|
|
|| fixP->fx_r_type == BFD_RELOC_MICROBLAZE_32_GOTOFF
|
|
|
|
|
|| fixP->fx_r_type == BFD_RELOC_MICROBLAZE_64_GOT
|
2014-09-12 22:14:23 +00:00
|
|
|
|
|| fixP->fx_r_type == BFD_RELOC_MICROBLAZE_64_PLT
|
|
|
|
|
|| fixP->fx_r_type == BFD_RELOC_MICROBLAZE_64_TLSGD
|
|
|
|
|
|| fixP->fx_r_type == BFD_RELOC_MICROBLAZE_64_TLSLD
|
|
|
|
|
|| fixP->fx_r_type == BFD_RELOC_MICROBLAZE_32_TLSDTPMOD
|
|
|
|
|
|| fixP->fx_r_type == BFD_RELOC_MICROBLAZE_32_TLSDTPREL
|
|
|
|
|
|| fixP->fx_r_type == BFD_RELOC_MICROBLAZE_64_TLSDTPREL
|
|
|
|
|
|| fixP->fx_r_type == BFD_RELOC_MICROBLAZE_64_TLSGOTTPREL
|
|
|
|
|
|| fixP->fx_r_type == BFD_RELOC_MICROBLAZE_64_TLSTPREL)
|
2012-03-26 19:18:29 +00:00
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
|
|
return 1;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
md_assemble (char * str)
|
|
|
|
|
{
|
|
|
|
|
char * op_start;
|
|
|
|
|
char * op_end;
|
|
|
|
|
struct op_code_struct * opcode, *opcode1;
|
|
|
|
|
char * output = NULL;
|
|
|
|
|
int nlen = 0;
|
|
|
|
|
int i;
|
|
|
|
|
unsigned long inst, inst1;
|
|
|
|
|
unsigned reg1;
|
|
|
|
|
unsigned reg2;
|
|
|
|
|
unsigned reg3;
|
|
|
|
|
unsigned isize;
|
2022-10-27 18:45:45 +00:00
|
|
|
|
unsigned int immed = 0, temp;
|
2012-03-26 19:18:29 +00:00
|
|
|
|
expressionS exp;
|
|
|
|
|
char name[20];
|
|
|
|
|
|
|
|
|
|
/* Drop leading whitespace. */
|
|
|
|
|
while (ISSPACE (* str))
|
|
|
|
|
str ++;
|
|
|
|
|
|
|
|
|
|
/* Find the op code end. */
|
|
|
|
|
for (op_start = op_end = str;
|
2014-09-12 22:14:23 +00:00
|
|
|
|
*op_end && !is_end_of_line[(unsigned char) *op_end] && *op_end != ' ';
|
2012-03-26 19:18:29 +00:00
|
|
|
|
op_end++)
|
|
|
|
|
{
|
|
|
|
|
name[nlen] = op_start[nlen];
|
|
|
|
|
nlen++;
|
2014-09-12 22:14:23 +00:00
|
|
|
|
if (nlen == sizeof (name) - 1)
|
|
|
|
|
break;
|
2012-03-26 19:18:29 +00:00
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
name [nlen] = 0;
|
|
|
|
|
|
|
|
|
|
if (nlen == 0)
|
|
|
|
|
{
|
|
|
|
|
as_bad (_("can't find opcode "));
|
|
|
|
|
return;
|
|
|
|
|
}
|
|
|
|
|
|
2022-10-27 18:45:45 +00:00
|
|
|
|
opcode = (struct op_code_struct *) str_hash_find (opcode_hash_control, name);
|
2012-03-26 19:18:29 +00:00
|
|
|
|
if (opcode == NULL)
|
|
|
|
|
{
|
|
|
|
|
as_bad (_("unknown opcode \"%s\""), name);
|
|
|
|
|
return;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
inst = opcode->bit_sequence;
|
|
|
|
|
isize = 4;
|
|
|
|
|
|
|
|
|
|
switch (opcode->inst_type)
|
|
|
|
|
{
|
|
|
|
|
case INST_TYPE_RD_R1_R2:
|
|
|
|
|
if (strcmp (op_end, ""))
|
|
|
|
|
op_end = parse_reg (op_end + 1, ®1); /* Get rd. */
|
|
|
|
|
else
|
|
|
|
|
{
|
|
|
|
|
as_fatal (_("Error in statement syntax"));
|
|
|
|
|
reg1 = 0;
|
|
|
|
|
}
|
|
|
|
|
if (strcmp (op_end, ""))
|
|
|
|
|
op_end = parse_reg (op_end + 1, ®2); /* Get r1. */
|
|
|
|
|
else
|
|
|
|
|
{
|
|
|
|
|
as_fatal (_("Error in statement syntax"));
|
|
|
|
|
reg2 = 0;
|
|
|
|
|
}
|
|
|
|
|
if (strcmp (op_end, ""))
|
|
|
|
|
op_end = parse_reg (op_end + 1, ®3); /* Get r2. */
|
|
|
|
|
else
|
|
|
|
|
{
|
|
|
|
|
as_fatal (_("Error in statement syntax"));
|
|
|
|
|
reg3 = 0;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Check for spl registers. */
|
|
|
|
|
if (check_spl_reg (& reg1))
|
|
|
|
|
as_fatal (_("Cannot use special register with this instruction"));
|
|
|
|
|
if (check_spl_reg (& reg2))
|
|
|
|
|
as_fatal (_("Cannot use special register with this instruction"));
|
|
|
|
|
if (check_spl_reg (& reg3))
|
|
|
|
|
as_fatal (_("Cannot use special register with this instruction"));
|
|
|
|
|
|
|
|
|
|
if (streq (name, "sub"))
|
|
|
|
|
{
|
|
|
|
|
/* sub rd, r1, r2 becomes rsub rd, r2, r1. */
|
|
|
|
|
inst |= (reg1 << RD_LOW) & RD_MASK;
|
|
|
|
|
inst |= (reg3 << RA_LOW) & RA_MASK;
|
|
|
|
|
inst |= (reg2 << RB_LOW) & RB_MASK;
|
|
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
{
|
|
|
|
|
inst |= (reg1 << RD_LOW) & RD_MASK;
|
|
|
|
|
inst |= (reg2 << RA_LOW) & RA_MASK;
|
|
|
|
|
inst |= (reg3 << RB_LOW) & RB_MASK;
|
|
|
|
|
}
|
|
|
|
|
output = frag_more (isize);
|
|
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
case INST_TYPE_RD_R1_IMM:
|
|
|
|
|
if (strcmp (op_end, ""))
|
|
|
|
|
op_end = parse_reg (op_end + 1, ®1); /* Get rd. */
|
|
|
|
|
else
|
|
|
|
|
{
|
|
|
|
|
as_fatal (_("Error in statement syntax"));
|
|
|
|
|
reg1 = 0;
|
|
|
|
|
}
|
|
|
|
|
if (strcmp (op_end, ""))
|
|
|
|
|
op_end = parse_reg (op_end + 1, ®2); /* Get r1. */
|
|
|
|
|
else
|
|
|
|
|
{
|
|
|
|
|
as_fatal (_("Error in statement syntax"));
|
|
|
|
|
reg2 = 0;
|
|
|
|
|
}
|
|
|
|
|
if (strcmp (op_end, ""))
|
|
|
|
|
op_end = parse_imm (op_end + 1, & exp, MIN_IMM, MAX_IMM);
|
|
|
|
|
else
|
|
|
|
|
as_fatal (_("Error in statement syntax"));
|
|
|
|
|
|
|
|
|
|
/* Check for spl registers. */
|
|
|
|
|
if (check_spl_reg (& reg1))
|
|
|
|
|
as_fatal (_("Cannot use special register with this instruction"));
|
|
|
|
|
if (check_spl_reg (& reg2))
|
|
|
|
|
as_fatal (_("Cannot use special register with this instruction"));
|
|
|
|
|
|
2018-12-28 15:25:28 +00:00
|
|
|
|
if (exp.X_op != O_constant || exp.X_md == IMM_TXTPCREL)
|
2012-03-26 19:18:29 +00:00
|
|
|
|
{
|
2017-04-10 11:32:00 +00:00
|
|
|
|
const char *opc;
|
2012-03-26 19:18:29 +00:00
|
|
|
|
relax_substateT subtype;
|
|
|
|
|
|
|
|
|
|
if (streq (name, "lmi"))
|
|
|
|
|
as_fatal (_("lmi pseudo instruction should not use a label in imm field"));
|
|
|
|
|
else if (streq (name, "smi"))
|
|
|
|
|
as_fatal (_("smi pseudo instruction should not use a label in imm field"));
|
|
|
|
|
|
|
|
|
|
if (reg2 == REG_ROSDP)
|
|
|
|
|
opc = str_microblaze_ro_anchor;
|
|
|
|
|
else if (reg2 == REG_RWSDP)
|
|
|
|
|
opc = str_microblaze_rw_anchor;
|
|
|
|
|
else
|
|
|
|
|
opc = NULL;
|
2014-09-12 22:14:23 +00:00
|
|
|
|
if (exp.X_md != 0)
|
|
|
|
|
subtype = get_imm_otype(exp.X_md);
|
2012-03-26 19:18:29 +00:00
|
|
|
|
else
|
|
|
|
|
subtype = opcode->inst_offset_type;
|
|
|
|
|
|
|
|
|
|
output = frag_var (rs_machine_dependent,
|
|
|
|
|
isize * 2, /* maxm of 2 words. */
|
|
|
|
|
isize, /* minm of 1 word. */
|
|
|
|
|
subtype, /* PC-relative or not. */
|
|
|
|
|
exp.X_add_symbol,
|
|
|
|
|
exp.X_add_number,
|
2017-04-10 11:32:00 +00:00
|
|
|
|
(char *) opc);
|
2014-09-12 22:14:23 +00:00
|
|
|
|
immed = 0;
|
2012-03-26 19:18:29 +00:00
|
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
{
|
|
|
|
|
output = frag_more (isize);
|
2014-09-12 22:14:23 +00:00
|
|
|
|
immed = exp.X_add_number;
|
2012-03-26 19:18:29 +00:00
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
if (streq (name, "lmi") || streq (name, "smi"))
|
|
|
|
|
{
|
|
|
|
|
/* Load/store 32-d consecutive registers. Used on exit/entry
|
|
|
|
|
to subroutines to save and restore registers to stack.
|
|
|
|
|
Generate 32-d insts. */
|
|
|
|
|
int count;
|
|
|
|
|
|
|
|
|
|
count = 32 - reg1;
|
|
|
|
|
if (streq (name, "lmi"))
|
2022-10-27 18:45:45 +00:00
|
|
|
|
opcode
|
|
|
|
|
= (struct op_code_struct *) str_hash_find (opcode_hash_control,
|
|
|
|
|
"lwi");
|
2012-03-26 19:18:29 +00:00
|
|
|
|
else
|
2022-10-27 18:45:45 +00:00
|
|
|
|
opcode
|
|
|
|
|
= (struct op_code_struct *) str_hash_find (opcode_hash_control,
|
|
|
|
|
"swi");
|
2012-03-26 19:18:29 +00:00
|
|
|
|
if (opcode == NULL)
|
|
|
|
|
{
|
|
|
|
|
as_bad (_("unknown opcode \"%s\""), "lwi");
|
|
|
|
|
return;
|
|
|
|
|
}
|
|
|
|
|
inst = opcode->bit_sequence;
|
|
|
|
|
inst |= (reg1 << RD_LOW) & RD_MASK;
|
|
|
|
|
inst |= (reg2 << RA_LOW) & RA_MASK;
|
2014-09-12 22:14:23 +00:00
|
|
|
|
inst |= (immed << IMM_LOW) & IMM_MASK;
|
2012-03-26 19:18:29 +00:00
|
|
|
|
|
|
|
|
|
for (i = 0; i < count - 1; i++)
|
|
|
|
|
{
|
|
|
|
|
output[0] = INST_BYTE0 (inst);
|
|
|
|
|
output[1] = INST_BYTE1 (inst);
|
|
|
|
|
output[2] = INST_BYTE2 (inst);
|
|
|
|
|
output[3] = INST_BYTE3 (inst);
|
|
|
|
|
output = frag_more (isize);
|
2014-09-12 22:14:23 +00:00
|
|
|
|
immed = immed + 4;
|
2012-03-26 19:18:29 +00:00
|
|
|
|
reg1++;
|
|
|
|
|
inst = opcode->bit_sequence;
|
|
|
|
|
inst |= (reg1 << RD_LOW) & RD_MASK;
|
|
|
|
|
inst |= (reg2 << RA_LOW) & RA_MASK;
|
2014-09-12 22:14:23 +00:00
|
|
|
|
inst |= (immed << IMM_LOW) & IMM_MASK;
|
2012-03-26 19:18:29 +00:00
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
{
|
2014-09-12 22:14:23 +00:00
|
|
|
|
temp = immed & 0xFFFF8000;
|
2012-03-26 19:18:29 +00:00
|
|
|
|
if ((temp != 0) && (temp != 0xFFFF8000))
|
|
|
|
|
{
|
|
|
|
|
/* Needs an immediate inst. */
|
2022-10-27 18:45:45 +00:00
|
|
|
|
opcode1
|
|
|
|
|
= (struct op_code_struct *) str_hash_find (opcode_hash_control,
|
|
|
|
|
"imm");
|
2012-03-26 19:18:29 +00:00
|
|
|
|
if (opcode1 == NULL)
|
|
|
|
|
{
|
|
|
|
|
as_bad (_("unknown opcode \"%s\""), "imm");
|
|
|
|
|
return;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
inst1 = opcode1->bit_sequence;
|
2014-09-12 22:14:23 +00:00
|
|
|
|
inst1 |= ((immed & 0xFFFF0000) >> 16) & IMM_MASK;
|
2012-03-26 19:18:29 +00:00
|
|
|
|
output[0] = INST_BYTE0 (inst1);
|
|
|
|
|
output[1] = INST_BYTE1 (inst1);
|
|
|
|
|
output[2] = INST_BYTE2 (inst1);
|
|
|
|
|
output[3] = INST_BYTE3 (inst1);
|
|
|
|
|
output = frag_more (isize);
|
|
|
|
|
}
|
|
|
|
|
inst |= (reg1 << RD_LOW) & RD_MASK;
|
|
|
|
|
inst |= (reg2 << RA_LOW) & RA_MASK;
|
2014-09-12 22:14:23 +00:00
|
|
|
|
inst |= (immed << IMM_LOW) & IMM_MASK;
|
2012-03-26 19:18:29 +00:00
|
|
|
|
}
|
|
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
case INST_TYPE_RD_R1_IMM5:
|
|
|
|
|
if (strcmp (op_end, ""))
|
|
|
|
|
op_end = parse_reg (op_end + 1, ®1); /* Get rd. */
|
|
|
|
|
else
|
|
|
|
|
{
|
|
|
|
|
as_fatal (_("Error in statement syntax"));
|
|
|
|
|
reg1 = 0;
|
|
|
|
|
}
|
|
|
|
|
if (strcmp (op_end, ""))
|
|
|
|
|
op_end = parse_reg (op_end + 1, ®2); /* Get r1. */
|
|
|
|
|
else
|
|
|
|
|
{
|
|
|
|
|
as_fatal (_("Error in statement syntax"));
|
|
|
|
|
reg2 = 0;
|
|
|
|
|
}
|
|
|
|
|
if (strcmp (op_end, ""))
|
|
|
|
|
op_end = parse_imm (op_end + 1, & exp, MIN_IMM, MAX_IMM);
|
|
|
|
|
else
|
|
|
|
|
as_fatal (_("Error in statement syntax"));
|
|
|
|
|
|
|
|
|
|
/* Check for spl registers. */
|
|
|
|
|
if (check_spl_reg (®1))
|
|
|
|
|
as_fatal (_("Cannot use special register with this instruction"));
|
|
|
|
|
if (check_spl_reg (®2))
|
|
|
|
|
as_fatal (_("Cannot use special register with this instruction"));
|
|
|
|
|
|
|
|
|
|
if (exp.X_op != O_constant)
|
|
|
|
|
as_warn (_("Symbol used as immediate for shift instruction"));
|
|
|
|
|
else
|
|
|
|
|
{
|
|
|
|
|
output = frag_more (isize);
|
2014-09-12 22:14:23 +00:00
|
|
|
|
immed = exp.X_add_number;
|
2012-03-26 19:18:29 +00:00
|
|
|
|
}
|
|
|
|
|
|
2014-09-12 22:14:23 +00:00
|
|
|
|
if (immed != (immed % 32))
|
2012-03-26 19:18:29 +00:00
|
|
|
|
{
|
|
|
|
|
as_warn (_("Shift value > 32. using <value %% 32>"));
|
2014-09-12 22:14:23 +00:00
|
|
|
|
immed = immed % 32;
|
2012-03-26 19:18:29 +00:00
|
|
|
|
}
|
|
|
|
|
inst |= (reg1 << RD_LOW) & RD_MASK;
|
|
|
|
|
inst |= (reg2 << RA_LOW) & RA_MASK;
|
2014-09-12 22:14:23 +00:00
|
|
|
|
inst |= (immed << IMM_LOW) & IMM5_MASK;
|
2012-03-26 19:18:29 +00:00
|
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
case INST_TYPE_R1_R2:
|
|
|
|
|
if (strcmp (op_end, ""))
|
|
|
|
|
op_end = parse_reg (op_end + 1, ®1); /* Get r1. */
|
|
|
|
|
else
|
|
|
|
|
{
|
|
|
|
|
as_fatal (_("Error in statement syntax"));
|
|
|
|
|
reg1 = 0;
|
|
|
|
|
}
|
|
|
|
|
if (strcmp (op_end, ""))
|
|
|
|
|
op_end = parse_reg (op_end + 1, ®2); /* Get r2. */
|
|
|
|
|
else
|
|
|
|
|
{
|
|
|
|
|
as_fatal (_("Error in statement syntax"));
|
|
|
|
|
reg2 = 0;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Check for spl registers. */
|
|
|
|
|
if (check_spl_reg (& reg1))
|
|
|
|
|
as_fatal (_("Cannot use special register with this instruction"));
|
|
|
|
|
if (check_spl_reg (& reg2))
|
|
|
|
|
as_fatal (_("Cannot use special register with this instruction"));
|
|
|
|
|
|
|
|
|
|
inst |= (reg1 << RA_LOW) & RA_MASK;
|
|
|
|
|
inst |= (reg2 << RB_LOW) & RB_MASK;
|
|
|
|
|
output = frag_more (isize);
|
|
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
case INST_TYPE_RD_R1:
|
|
|
|
|
if (strcmp (op_end, ""))
|
|
|
|
|
op_end = parse_reg (op_end + 1, ®1); /* Get rd. */
|
|
|
|
|
else
|
|
|
|
|
{
|
|
|
|
|
as_fatal (_("Error in statement syntax"));
|
|
|
|
|
reg1 = 0;
|
|
|
|
|
}
|
|
|
|
|
if (strcmp (op_end, ""))
|
|
|
|
|
op_end = parse_reg (op_end + 1, ®2); /* Get r1. */
|
|
|
|
|
else
|
|
|
|
|
{
|
|
|
|
|
as_fatal (_("Error in statement syntax"));
|
|
|
|
|
reg2 =0;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Check for spl registers. */
|
|
|
|
|
if (check_spl_reg (®1))
|
|
|
|
|
as_fatal (_("Cannot use special register with this instruction"));
|
|
|
|
|
if (check_spl_reg (®2))
|
|
|
|
|
as_fatal (_("Cannot use special register with this instruction"));
|
|
|
|
|
|
|
|
|
|
inst |= (reg1 << RD_LOW) & RD_MASK;
|
|
|
|
|
inst |= (reg2 << RA_LOW) & RA_MASK;
|
|
|
|
|
output = frag_more (isize);
|
|
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
case INST_TYPE_RD_RFSL:
|
|
|
|
|
if (strcmp (op_end, ""))
|
|
|
|
|
op_end = parse_reg (op_end + 1, ®1); /* Get rd. */
|
|
|
|
|
else
|
|
|
|
|
{
|
|
|
|
|
as_fatal (_("Error in statement syntax"));
|
|
|
|
|
reg1 = 0;
|
|
|
|
|
}
|
|
|
|
|
if (strcmp (op_end, ""))
|
2014-09-12 22:14:23 +00:00
|
|
|
|
op_end = parse_reg (op_end + 1, &immed); /* Get rfslN. */
|
2012-03-26 19:18:29 +00:00
|
|
|
|
else
|
|
|
|
|
{
|
|
|
|
|
as_fatal (_("Error in statement syntax"));
|
2014-09-12 22:14:23 +00:00
|
|
|
|
immed = 0;
|
2012-03-26 19:18:29 +00:00
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Check for spl registers. */
|
|
|
|
|
if (check_spl_reg (®1))
|
|
|
|
|
as_fatal (_("Cannot use special register with this instruction"));
|
|
|
|
|
|
|
|
|
|
inst |= (reg1 << RD_LOW) & RD_MASK;
|
2014-09-12 22:14:23 +00:00
|
|
|
|
inst |= (immed << IMM_LOW) & RFSL_MASK;
|
2012-03-26 19:18:29 +00:00
|
|
|
|
output = frag_more (isize);
|
|
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
case INST_TYPE_RD_IMM15:
|
|
|
|
|
if (strcmp (op_end, ""))
|
|
|
|
|
op_end = parse_reg (op_end + 1, ®1); /* Get rd. */
|
|
|
|
|
else
|
|
|
|
|
{
|
|
|
|
|
as_fatal (_("Error in statement syntax"));
|
|
|
|
|
reg1 = 0;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
if (strcmp (op_end, ""))
|
|
|
|
|
op_end = parse_imm (op_end + 1, & exp, MIN_IMM15, MAX_IMM15);
|
|
|
|
|
else
|
|
|
|
|
as_fatal (_("Error in statement syntax"));
|
|
|
|
|
|
|
|
|
|
/* Check for spl registers. */
|
|
|
|
|
if (check_spl_reg (®1))
|
|
|
|
|
as_fatal (_("Cannot use special register with this instruction"));
|
|
|
|
|
|
|
|
|
|
if (exp.X_op != O_constant)
|
|
|
|
|
as_fatal (_("Symbol used as immediate value for msrset/msrclr instructions"));
|
|
|
|
|
else
|
|
|
|
|
{
|
|
|
|
|
output = frag_more (isize);
|
2014-09-12 22:14:23 +00:00
|
|
|
|
immed = exp.X_add_number;
|
2012-03-26 19:18:29 +00:00
|
|
|
|
}
|
|
|
|
|
inst |= (reg1 << RD_LOW) & RD_MASK;
|
2014-09-12 22:14:23 +00:00
|
|
|
|
inst |= (immed << IMM_LOW) & IMM15_MASK;
|
2012-03-26 19:18:29 +00:00
|
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
case INST_TYPE_R1_RFSL:
|
|
|
|
|
if (strcmp (op_end, ""))
|
|
|
|
|
op_end = parse_reg (op_end + 1, ®1); /* Get r1. */
|
|
|
|
|
else
|
|
|
|
|
{
|
|
|
|
|
as_fatal (_("Error in statement syntax"));
|
|
|
|
|
reg1 = 0;
|
|
|
|
|
}
|
|
|
|
|
if (strcmp (op_end, ""))
|
2014-09-12 22:14:23 +00:00
|
|
|
|
op_end = parse_reg (op_end + 1, &immed); /* Get rfslN. */
|
2012-03-26 19:18:29 +00:00
|
|
|
|
else
|
|
|
|
|
{
|
|
|
|
|
as_fatal (_("Error in statement syntax"));
|
2014-09-12 22:14:23 +00:00
|
|
|
|
immed = 0;
|
2012-03-26 19:18:29 +00:00
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Check for spl registers. */
|
|
|
|
|
if (check_spl_reg (®1))
|
|
|
|
|
as_fatal (_("Cannot use special register with this instruction"));
|
|
|
|
|
|
|
|
|
|
inst |= (reg1 << RA_LOW) & RA_MASK;
|
2014-09-12 22:14:23 +00:00
|
|
|
|
inst |= (immed << IMM_LOW) & RFSL_MASK;
|
2012-03-26 19:18:29 +00:00
|
|
|
|
output = frag_more (isize);
|
|
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
case INST_TYPE_RFSL:
|
|
|
|
|
if (strcmp (op_end, ""))
|
2014-09-12 22:14:23 +00:00
|
|
|
|
op_end = parse_reg (op_end + 1, &immed); /* Get rfslN. */
|
2012-03-26 19:18:29 +00:00
|
|
|
|
else
|
|
|
|
|
{
|
|
|
|
|
as_fatal (_("Error in statement syntax"));
|
2014-09-12 22:14:23 +00:00
|
|
|
|
immed = 0;
|
2012-03-26 19:18:29 +00:00
|
|
|
|
}
|
2014-09-12 22:14:23 +00:00
|
|
|
|
inst |= (immed << IMM_LOW) & RFSL_MASK;
|
2012-03-26 19:18:29 +00:00
|
|
|
|
output = frag_more (isize);
|
|
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
case INST_TYPE_R1:
|
|
|
|
|
if (strcmp (op_end, ""))
|
|
|
|
|
op_end = parse_reg (op_end + 1, ®1); /* Get r1. */
|
|
|
|
|
else
|
|
|
|
|
{
|
|
|
|
|
as_fatal (_("Error in statement syntax"));
|
|
|
|
|
reg1 = 0;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Check for spl registers. */
|
|
|
|
|
if (check_spl_reg (®1))
|
|
|
|
|
as_fatal (_("Cannot use special register with this instruction"));
|
|
|
|
|
|
|
|
|
|
inst |= (reg1 << RA_LOW) & RA_MASK;
|
|
|
|
|
output = frag_more (isize);
|
|
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
/* For tuqula insn...:) */
|
|
|
|
|
case INST_TYPE_RD:
|
|
|
|
|
if (strcmp (op_end, ""))
|
|
|
|
|
op_end = parse_reg (op_end + 1, ®1); /* Get rd. */
|
|
|
|
|
else
|
|
|
|
|
{
|
|
|
|
|
as_fatal (_("Error in statement syntax"));
|
|
|
|
|
reg1 = 0;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Check for spl registers. */
|
|
|
|
|
if (check_spl_reg (®1))
|
|
|
|
|
as_fatal (_("Cannot use special register with this instruction"));
|
|
|
|
|
|
|
|
|
|
inst |= (reg1 << RD_LOW) & RD_MASK;
|
|
|
|
|
output = frag_more (isize);
|
|
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
case INST_TYPE_RD_SPECIAL:
|
|
|
|
|
if (strcmp (op_end, ""))
|
|
|
|
|
op_end = parse_reg (op_end + 1, ®1); /* Get rd. */
|
|
|
|
|
else
|
|
|
|
|
{
|
|
|
|
|
as_fatal (_("Error in statement syntax"));
|
|
|
|
|
reg1 = 0;
|
|
|
|
|
}
|
|
|
|
|
if (strcmp (op_end, ""))
|
|
|
|
|
op_end = parse_reg (op_end + 1, ®2); /* Get r1. */
|
|
|
|
|
else
|
|
|
|
|
{
|
|
|
|
|
as_fatal (_("Error in statement syntax"));
|
|
|
|
|
reg2 = 0;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
if (reg2 == REG_MSR)
|
2014-09-12 22:14:23 +00:00
|
|
|
|
immed = opcode->immval_mask | REG_MSR_MASK;
|
2012-03-26 19:18:29 +00:00
|
|
|
|
else if (reg2 == REG_PC)
|
2014-09-12 22:14:23 +00:00
|
|
|
|
immed = opcode->immval_mask | REG_PC_MASK;
|
2012-03-26 19:18:29 +00:00
|
|
|
|
else if (reg2 == REG_EAR)
|
2014-09-12 22:14:23 +00:00
|
|
|
|
immed = opcode->immval_mask | REG_EAR_MASK;
|
2012-03-26 19:18:29 +00:00
|
|
|
|
else if (reg2 == REG_ESR)
|
2014-09-12 22:14:23 +00:00
|
|
|
|
immed = opcode->immval_mask | REG_ESR_MASK;
|
2012-03-26 19:18:29 +00:00
|
|
|
|
else if (reg2 == REG_FSR)
|
2014-09-12 22:14:23 +00:00
|
|
|
|
immed = opcode->immval_mask | REG_FSR_MASK;
|
2012-03-26 19:18:29 +00:00
|
|
|
|
else if (reg2 == REG_BTR)
|
2014-09-12 22:14:23 +00:00
|
|
|
|
immed = opcode->immval_mask | REG_BTR_MASK;
|
2012-03-26 19:18:29 +00:00
|
|
|
|
else if (reg2 == REG_EDR)
|
2014-09-12 22:14:23 +00:00
|
|
|
|
immed = opcode->immval_mask | REG_EDR_MASK;
|
2012-03-26 19:18:29 +00:00
|
|
|
|
else if (reg2 == REG_PID)
|
2014-09-12 22:14:23 +00:00
|
|
|
|
immed = opcode->immval_mask | REG_PID_MASK;
|
2012-03-26 19:18:29 +00:00
|
|
|
|
else if (reg2 == REG_ZPR)
|
2014-09-12 22:14:23 +00:00
|
|
|
|
immed = opcode->immval_mask | REG_ZPR_MASK;
|
2012-03-26 19:18:29 +00:00
|
|
|
|
else if (reg2 == REG_TLBX)
|
2014-09-12 22:14:23 +00:00
|
|
|
|
immed = opcode->immval_mask | REG_TLBX_MASK;
|
2012-03-26 19:18:29 +00:00
|
|
|
|
else if (reg2 == REG_TLBLO)
|
2014-09-12 22:14:23 +00:00
|
|
|
|
immed = opcode->immval_mask | REG_TLBLO_MASK;
|
2012-03-26 19:18:29 +00:00
|
|
|
|
else if (reg2 == REG_TLBHI)
|
2014-09-12 22:14:23 +00:00
|
|
|
|
immed = opcode->immval_mask | REG_TLBHI_MASK;
|
|
|
|
|
else if (reg2 == REG_SHR)
|
|
|
|
|
immed = opcode->immval_mask | REG_SHR_MASK;
|
|
|
|
|
else if (reg2 == REG_SLR)
|
|
|
|
|
immed = opcode->immval_mask | REG_SLR_MASK;
|
2012-03-26 19:18:29 +00:00
|
|
|
|
else if (reg2 >= (REG_PVR+MIN_PVR_REGNUM) && reg2 <= (REG_PVR+MAX_PVR_REGNUM))
|
2014-09-12 22:14:23 +00:00
|
|
|
|
immed = opcode->immval_mask | REG_PVR_MASK | reg2;
|
2012-03-26 19:18:29 +00:00
|
|
|
|
else
|
|
|
|
|
as_fatal (_("invalid value for special purpose register"));
|
|
|
|
|
inst |= (reg1 << RD_LOW) & RD_MASK;
|
2014-09-12 22:14:23 +00:00
|
|
|
|
inst |= (immed << IMM_LOW) & IMM_MASK;
|
2012-03-26 19:18:29 +00:00
|
|
|
|
output = frag_more (isize);
|
|
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
case INST_TYPE_SPECIAL_R1:
|
|
|
|
|
if (strcmp (op_end, ""))
|
|
|
|
|
op_end = parse_reg (op_end + 1, ®1); /* Get rd. */
|
|
|
|
|
else
|
|
|
|
|
{
|
|
|
|
|
as_fatal (_("Error in statement syntax"));
|
|
|
|
|
reg1 = 0;
|
|
|
|
|
}
|
|
|
|
|
if (strcmp (op_end, ""))
|
|
|
|
|
op_end = parse_reg (op_end + 1, ®2); /* Get r1. */
|
|
|
|
|
else
|
|
|
|
|
{
|
|
|
|
|
as_fatal (_("Error in statement syntax"));
|
|
|
|
|
reg2 = 0;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
if (reg1 == REG_MSR)
|
2014-09-12 22:14:23 +00:00
|
|
|
|
immed = opcode->immval_mask | REG_MSR_MASK;
|
2012-03-26 19:18:29 +00:00
|
|
|
|
else if (reg1 == REG_PC)
|
2014-09-12 22:14:23 +00:00
|
|
|
|
immed = opcode->immval_mask | REG_PC_MASK;
|
2012-03-26 19:18:29 +00:00
|
|
|
|
else if (reg1 == REG_EAR)
|
2014-09-12 22:14:23 +00:00
|
|
|
|
immed = opcode->immval_mask | REG_EAR_MASK;
|
2012-03-26 19:18:29 +00:00
|
|
|
|
else if (reg1 == REG_ESR)
|
2014-09-12 22:14:23 +00:00
|
|
|
|
immed = opcode->immval_mask | REG_ESR_MASK;
|
2012-03-26 19:18:29 +00:00
|
|
|
|
else if (reg1 == REG_FSR)
|
2014-09-12 22:14:23 +00:00
|
|
|
|
immed = opcode->immval_mask | REG_FSR_MASK;
|
2012-03-26 19:18:29 +00:00
|
|
|
|
else if (reg1 == REG_BTR)
|
2014-09-12 22:14:23 +00:00
|
|
|
|
immed = opcode->immval_mask | REG_BTR_MASK;
|
2012-03-26 19:18:29 +00:00
|
|
|
|
else if (reg1 == REG_EDR)
|
2014-09-12 22:14:23 +00:00
|
|
|
|
immed = opcode->immval_mask | REG_EDR_MASK;
|
2012-03-26 19:18:29 +00:00
|
|
|
|
else if (reg1 == REG_PID)
|
2014-09-12 22:14:23 +00:00
|
|
|
|
immed = opcode->immval_mask | REG_PID_MASK;
|
2012-03-26 19:18:29 +00:00
|
|
|
|
else if (reg1 == REG_ZPR)
|
2014-09-12 22:14:23 +00:00
|
|
|
|
immed = opcode->immval_mask | REG_ZPR_MASK;
|
2012-03-26 19:18:29 +00:00
|
|
|
|
else if (reg1 == REG_TLBX)
|
2014-09-12 22:14:23 +00:00
|
|
|
|
immed = opcode->immval_mask | REG_TLBX_MASK;
|
2012-03-26 19:18:29 +00:00
|
|
|
|
else if (reg1 == REG_TLBLO)
|
2014-09-12 22:14:23 +00:00
|
|
|
|
immed = opcode->immval_mask | REG_TLBLO_MASK;
|
2012-03-26 19:18:29 +00:00
|
|
|
|
else if (reg1 == REG_TLBHI)
|
2014-09-12 22:14:23 +00:00
|
|
|
|
immed = opcode->immval_mask | REG_TLBHI_MASK;
|
2012-03-26 19:18:29 +00:00
|
|
|
|
else if (reg1 == REG_TLBSX)
|
2014-09-12 22:14:23 +00:00
|
|
|
|
immed = opcode->immval_mask | REG_TLBSX_MASK;
|
|
|
|
|
else if (reg1 == REG_SHR)
|
|
|
|
|
immed = opcode->immval_mask | REG_SHR_MASK;
|
|
|
|
|
else if (reg1 == REG_SLR)
|
|
|
|
|
immed = opcode->immval_mask | REG_SLR_MASK;
|
2012-03-26 19:18:29 +00:00
|
|
|
|
else
|
|
|
|
|
as_fatal (_("invalid value for special purpose register"));
|
|
|
|
|
inst |= (reg2 << RA_LOW) & RA_MASK;
|
2014-09-12 22:14:23 +00:00
|
|
|
|
inst |= (immed << IMM_LOW) & IMM_MASK;
|
2012-03-26 19:18:29 +00:00
|
|
|
|
output = frag_more (isize);
|
|
|
|
|
break;
|
|
|
|
|
|
2014-09-12 22:14:23 +00:00
|
|
|
|
case INST_TYPE_R1_R2_SPECIAL:
|
2012-03-26 19:18:29 +00:00
|
|
|
|
if (strcmp (op_end, ""))
|
2014-09-12 22:14:23 +00:00
|
|
|
|
op_end = parse_reg (op_end + 1, ®1); /* Get r1. */
|
2012-03-26 19:18:29 +00:00
|
|
|
|
else
|
|
|
|
|
{
|
|
|
|
|
as_fatal (_("Error in statement syntax"));
|
|
|
|
|
reg1 = 0;
|
|
|
|
|
}
|
|
|
|
|
if (strcmp (op_end, ""))
|
2014-09-12 22:14:23 +00:00
|
|
|
|
op_end = parse_reg (op_end + 1, ®2); /* Get r2. */
|
2012-03-26 19:18:29 +00:00
|
|
|
|
else
|
|
|
|
|
{
|
|
|
|
|
as_fatal (_("Error in statement syntax"));
|
|
|
|
|
reg2 =0;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Check for spl registers. */
|
|
|
|
|
if (check_spl_reg (®1))
|
|
|
|
|
as_fatal (_("Cannot use special register with this instruction"));
|
|
|
|
|
if (check_spl_reg (®2))
|
|
|
|
|
as_fatal (_("Cannot use special register with this instruction"));
|
|
|
|
|
|
|
|
|
|
/* insn wic ra, rb => wic ra, ra, rb. */
|
|
|
|
|
inst |= (reg1 << RA_LOW) & RA_MASK;
|
|
|
|
|
inst |= (reg2 << RB_LOW) & RB_MASK;
|
|
|
|
|
|
|
|
|
|
output = frag_more (isize);
|
|
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
case INST_TYPE_RD_R2:
|
|
|
|
|
if (strcmp (op_end, ""))
|
|
|
|
|
op_end = parse_reg (op_end + 1, ®1); /* Get rd. */
|
|
|
|
|
else
|
|
|
|
|
{
|
|
|
|
|
as_fatal (_("Error in statement syntax"));
|
|
|
|
|
reg1 = 0;
|
|
|
|
|
}
|
|
|
|
|
if (strcmp (op_end, ""))
|
|
|
|
|
op_end = parse_reg (op_end + 1, ®2); /* Get r2. */
|
|
|
|
|
else
|
|
|
|
|
{
|
|
|
|
|
as_fatal (_("Error in statement syntax"));
|
|
|
|
|
reg2 = 0;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Check for spl registers. */
|
|
|
|
|
if (check_spl_reg (®1))
|
|
|
|
|
as_fatal (_("Cannot use special register with this instruction"));
|
|
|
|
|
if (check_spl_reg (®2))
|
|
|
|
|
as_fatal (_("Cannot use special register with this instruction"));
|
|
|
|
|
|
|
|
|
|
inst |= (reg1 << RD_LOW) & RD_MASK;
|
|
|
|
|
inst |= (reg2 << RB_LOW) & RB_MASK;
|
|
|
|
|
output = frag_more (isize);
|
|
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
case INST_TYPE_R1_IMM:
|
|
|
|
|
if (strcmp (op_end, ""))
|
|
|
|
|
op_end = parse_reg (op_end + 1, ®1); /* Get r1. */
|
|
|
|
|
else
|
|
|
|
|
{
|
|
|
|
|
as_fatal (_("Error in statement syntax"));
|
|
|
|
|
reg1 = 0;
|
|
|
|
|
}
|
|
|
|
|
if (strcmp (op_end, ""))
|
|
|
|
|
op_end = parse_imm (op_end + 1, & exp, MIN_IMM, MAX_IMM);
|
|
|
|
|
else
|
|
|
|
|
as_fatal (_("Error in statement syntax"));
|
|
|
|
|
|
|
|
|
|
/* Check for spl registers. */
|
|
|
|
|
if (check_spl_reg (®1))
|
|
|
|
|
as_fatal (_("Cannot use special register with this instruction"));
|
|
|
|
|
|
|
|
|
|
if (exp.X_op != O_constant)
|
|
|
|
|
{
|
|
|
|
|
char *opc = NULL;
|
|
|
|
|
relax_substateT subtype;
|
|
|
|
|
|
2014-09-12 22:14:23 +00:00
|
|
|
|
if (exp.X_md != 0)
|
|
|
|
|
subtype = get_imm_otype(exp.X_md);
|
2012-03-26 19:18:29 +00:00
|
|
|
|
else
|
|
|
|
|
subtype = opcode->inst_offset_type;
|
2014-09-12 22:14:23 +00:00
|
|
|
|
|
2012-03-26 19:18:29 +00:00
|
|
|
|
output = frag_var (rs_machine_dependent,
|
|
|
|
|
isize * 2, /* maxm of 2 words. */
|
|
|
|
|
isize, /* minm of 1 word. */
|
|
|
|
|
subtype, /* PC-relative or not. */
|
|
|
|
|
exp.X_add_symbol,
|
|
|
|
|
exp.X_add_number,
|
|
|
|
|
opc);
|
2014-09-12 22:14:23 +00:00
|
|
|
|
immed = 0;
|
2012-03-26 19:18:29 +00:00
|
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
{
|
|
|
|
|
output = frag_more (isize);
|
2014-09-12 22:14:23 +00:00
|
|
|
|
immed = exp.X_add_number;
|
2012-03-26 19:18:29 +00:00
|
|
|
|
}
|
|
|
|
|
|
2014-09-12 22:14:23 +00:00
|
|
|
|
temp = immed & 0xFFFF8000;
|
2012-03-26 19:18:29 +00:00
|
|
|
|
if ((temp != 0) && (temp != 0xFFFF8000))
|
|
|
|
|
{
|
|
|
|
|
/* Needs an immediate inst. */
|
2022-10-27 18:45:45 +00:00
|
|
|
|
opcode1
|
|
|
|
|
= (struct op_code_struct *) str_hash_find (opcode_hash_control,
|
|
|
|
|
"imm");
|
2012-03-26 19:18:29 +00:00
|
|
|
|
if (opcode1 == NULL)
|
|
|
|
|
{
|
|
|
|
|
as_bad (_("unknown opcode \"%s\""), "imm");
|
|
|
|
|
return;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
inst1 = opcode1->bit_sequence;
|
2014-09-12 22:14:23 +00:00
|
|
|
|
inst1 |= ((immed & 0xFFFF0000) >> 16) & IMM_MASK;
|
2012-03-26 19:18:29 +00:00
|
|
|
|
output[0] = INST_BYTE0 (inst1);
|
|
|
|
|
output[1] = INST_BYTE1 (inst1);
|
|
|
|
|
output[2] = INST_BYTE2 (inst1);
|
|
|
|
|
output[3] = INST_BYTE3 (inst1);
|
|
|
|
|
output = frag_more (isize);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
inst |= (reg1 << RA_LOW) & RA_MASK;
|
2014-09-12 22:14:23 +00:00
|
|
|
|
inst |= (immed << IMM_LOW) & IMM_MASK;
|
2012-03-26 19:18:29 +00:00
|
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
case INST_TYPE_RD_IMM:
|
|
|
|
|
if (strcmp (op_end, ""))
|
|
|
|
|
op_end = parse_reg (op_end + 1, ®1); /* Get rd. */
|
|
|
|
|
else
|
|
|
|
|
{
|
|
|
|
|
as_fatal (_("Error in statement syntax"));
|
|
|
|
|
reg1 = 0;
|
|
|
|
|
}
|
|
|
|
|
if (strcmp (op_end, ""))
|
|
|
|
|
op_end = parse_imm (op_end + 1, & exp, MIN_IMM, MAX_IMM);
|
|
|
|
|
else
|
|
|
|
|
as_fatal (_("Error in statement syntax"));
|
|
|
|
|
|
|
|
|
|
/* Check for spl registers. */
|
|
|
|
|
if (check_spl_reg (®1))
|
|
|
|
|
as_fatal (_("Cannot use special register with this instruction"));
|
|
|
|
|
|
|
|
|
|
if (exp.X_op != O_constant)
|
|
|
|
|
{
|
|
|
|
|
char *opc = NULL;
|
|
|
|
|
relax_substateT subtype;
|
|
|
|
|
|
2014-09-12 22:14:23 +00:00
|
|
|
|
if (exp.X_md != 0)
|
|
|
|
|
subtype = get_imm_otype(exp.X_md);
|
|
|
|
|
else
|
2012-03-26 19:18:29 +00:00
|
|
|
|
subtype = opcode->inst_offset_type;
|
2014-09-12 22:14:23 +00:00
|
|
|
|
|
2012-03-26 19:18:29 +00:00
|
|
|
|
output = frag_var (rs_machine_dependent,
|
|
|
|
|
isize * 2, /* maxm of 2 words. */
|
|
|
|
|
isize, /* minm of 1 word. */
|
|
|
|
|
subtype, /* PC-relative or not. */
|
|
|
|
|
exp.X_add_symbol,
|
|
|
|
|
exp.X_add_number,
|
|
|
|
|
opc);
|
2014-09-12 22:14:23 +00:00
|
|
|
|
immed = 0;
|
2012-03-26 19:18:29 +00:00
|
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
{
|
|
|
|
|
output = frag_more (isize);
|
2014-09-12 22:14:23 +00:00
|
|
|
|
immed = exp.X_add_number;
|
2012-03-26 19:18:29 +00:00
|
|
|
|
}
|
|
|
|
|
|
2014-09-12 22:14:23 +00:00
|
|
|
|
temp = immed & 0xFFFF8000;
|
2012-03-26 19:18:29 +00:00
|
|
|
|
if ((temp != 0) && (temp != 0xFFFF8000))
|
|
|
|
|
{
|
|
|
|
|
/* Needs an immediate inst. */
|
2022-10-27 18:45:45 +00:00
|
|
|
|
opcode1
|
|
|
|
|
= (struct op_code_struct *) str_hash_find (opcode_hash_control,
|
|
|
|
|
"imm");
|
2012-03-26 19:18:29 +00:00
|
|
|
|
if (opcode1 == NULL)
|
|
|
|
|
{
|
|
|
|
|
as_bad (_("unknown opcode \"%s\""), "imm");
|
|
|
|
|
return;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
inst1 = opcode1->bit_sequence;
|
2014-09-12 22:14:23 +00:00
|
|
|
|
inst1 |= ((immed & 0xFFFF0000) >> 16) & IMM_MASK;
|
2012-03-26 19:18:29 +00:00
|
|
|
|
output[0] = INST_BYTE0 (inst1);
|
|
|
|
|
output[1] = INST_BYTE1 (inst1);
|
|
|
|
|
output[2] = INST_BYTE2 (inst1);
|
|
|
|
|
output[3] = INST_BYTE3 (inst1);
|
|
|
|
|
output = frag_more (isize);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
inst |= (reg1 << RD_LOW) & RD_MASK;
|
2014-09-12 22:14:23 +00:00
|
|
|
|
inst |= (immed << IMM_LOW) & IMM_MASK;
|
2012-03-26 19:18:29 +00:00
|
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
case INST_TYPE_R2:
|
|
|
|
|
if (strcmp (op_end, ""))
|
|
|
|
|
op_end = parse_reg (op_end + 1, ®2); /* Get r2. */
|
|
|
|
|
else
|
|
|
|
|
{
|
|
|
|
|
as_fatal (_("Error in statement syntax"));
|
|
|
|
|
reg2 = 0;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Check for spl registers. */
|
|
|
|
|
if (check_spl_reg (®2))
|
|
|
|
|
as_fatal (_("Cannot use special register with this instruction"));
|
|
|
|
|
|
|
|
|
|
inst |= (reg2 << RB_LOW) & RB_MASK;
|
|
|
|
|
output = frag_more (isize);
|
|
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
case INST_TYPE_IMM:
|
|
|
|
|
if (streq (name, "imm"))
|
|
|
|
|
as_fatal (_("An IMM instruction should not be present in the .s file"));
|
|
|
|
|
|
|
|
|
|
op_end = parse_imm (op_end + 1, & exp, MIN_IMM, MAX_IMM);
|
|
|
|
|
|
|
|
|
|
if (exp.X_op != O_constant)
|
|
|
|
|
{
|
|
|
|
|
char *opc = NULL;
|
|
|
|
|
relax_substateT subtype;
|
|
|
|
|
|
2014-09-12 22:14:23 +00:00
|
|
|
|
if (exp.X_md != 0)
|
|
|
|
|
subtype = get_imm_otype(exp.X_md);
|
|
|
|
|
else
|
|
|
|
|
subtype = opcode->inst_offset_type;
|
|
|
|
|
|
2012-03-26 19:18:29 +00:00
|
|
|
|
output = frag_var (rs_machine_dependent,
|
|
|
|
|
isize * 2, /* maxm of 2 words. */
|
|
|
|
|
isize, /* minm of 1 word. */
|
|
|
|
|
subtype, /* PC-relative or not. */
|
|
|
|
|
exp.X_add_symbol,
|
|
|
|
|
exp.X_add_number,
|
|
|
|
|
opc);
|
2014-09-12 22:14:23 +00:00
|
|
|
|
immed = 0;
|
2012-03-26 19:18:29 +00:00
|
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
{
|
|
|
|
|
output = frag_more (isize);
|
2014-09-12 22:14:23 +00:00
|
|
|
|
immed = exp.X_add_number;
|
2012-03-26 19:18:29 +00:00
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
2014-09-12 22:14:23 +00:00
|
|
|
|
temp = immed & 0xFFFF8000;
|
2012-03-26 19:18:29 +00:00
|
|
|
|
if ((temp != 0) && (temp != 0xFFFF8000))
|
|
|
|
|
{
|
|
|
|
|
/* Needs an immediate inst. */
|
2022-10-27 18:45:45 +00:00
|
|
|
|
opcode1
|
|
|
|
|
= (struct op_code_struct *) str_hash_find (opcode_hash_control,
|
|
|
|
|
"imm");
|
2012-03-26 19:18:29 +00:00
|
|
|
|
if (opcode1 == NULL)
|
|
|
|
|
{
|
|
|
|
|
as_bad (_("unknown opcode \"%s\""), "imm");
|
|
|
|
|
return;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
inst1 = opcode1->bit_sequence;
|
2014-09-12 22:14:23 +00:00
|
|
|
|
inst1 |= ((immed & 0xFFFF0000) >> 16) & IMM_MASK;
|
2012-03-26 19:18:29 +00:00
|
|
|
|
output[0] = INST_BYTE0 (inst1);
|
|
|
|
|
output[1] = INST_BYTE1 (inst1);
|
|
|
|
|
output[2] = INST_BYTE2 (inst1);
|
|
|
|
|
output[3] = INST_BYTE3 (inst1);
|
|
|
|
|
output = frag_more (isize);
|
|
|
|
|
}
|
2014-09-12 22:14:23 +00:00
|
|
|
|
inst |= (immed << IMM_LOW) & IMM_MASK;
|
2012-03-26 19:18:29 +00:00
|
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
case INST_TYPE_NONE:
|
|
|
|
|
output = frag_more (isize);
|
|
|
|
|
break;
|
|
|
|
|
|
2014-09-12 22:14:23 +00:00
|
|
|
|
case INST_TYPE_IMM5:
|
|
|
|
|
if (strcmp(op_end, ""))
|
|
|
|
|
op_end = parse_imm (op_end + 1, & exp, MIN_IMM5, MAX_IMM5);
|
|
|
|
|
else
|
|
|
|
|
as_fatal(_("Error in statement syntax"));
|
|
|
|
|
if (exp.X_op != O_constant) {
|
|
|
|
|
as_warn(_("Symbol used as immediate for mbar instruction"));
|
|
|
|
|
} else {
|
|
|
|
|
output = frag_more (isize);
|
|
|
|
|
immed = exp.X_add_number;
|
|
|
|
|
}
|
|
|
|
|
if (immed != (immed % 32)) {
|
|
|
|
|
as_warn(_("Immediate value for mbar > 32. using <value %% 32>"));
|
|
|
|
|
immed = immed % 32;
|
|
|
|
|
}
|
|
|
|
|
inst |= (immed << IMM_MBAR);
|
|
|
|
|
break;
|
|
|
|
|
|
2012-03-26 19:18:29 +00:00
|
|
|
|
default:
|
|
|
|
|
as_fatal (_("unimplemented opcode \"%s\""), name);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Drop whitespace after all the operands have been parsed. */
|
|
|
|
|
while (ISSPACE (* op_end))
|
|
|
|
|
op_end ++;
|
|
|
|
|
|
|
|
|
|
/* Give warning message if the insn has more operands than required. */
|
|
|
|
|
if (strcmp (op_end, opcode->name) && strcmp (op_end, ""))
|
|
|
|
|
as_warn (_("ignoring operands: %s "), op_end);
|
|
|
|
|
|
|
|
|
|
output[0] = INST_BYTE0 (inst);
|
|
|
|
|
output[1] = INST_BYTE1 (inst);
|
|
|
|
|
output[2] = INST_BYTE2 (inst);
|
|
|
|
|
output[3] = INST_BYTE3 (inst);
|
|
|
|
|
|
|
|
|
|
#ifdef OBJ_ELF
|
|
|
|
|
dwarf2_emit_insn (4);
|
|
|
|
|
#endif
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
symbolS *
|
|
|
|
|
md_undefined_symbol (char * name ATTRIBUTE_UNUSED)
|
|
|
|
|
{
|
|
|
|
|
return NULL;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Turn a string in input_line_pointer into a floating point constant of type
|
|
|
|
|
type, and store the appropriate bytes in *litP. The number of LITTLENUMS
|
|
|
|
|
emitted is stored in *sizeP. An error message is returned, or NULL on OK.*/
|
2022-10-27 18:45:45 +00:00
|
|
|
|
|
2017-04-10 11:32:00 +00:00
|
|
|
|
const char *
|
2012-03-26 19:18:29 +00:00
|
|
|
|
md_atof (int type, char * litP, int * sizeP)
|
|
|
|
|
{
|
|
|
|
|
int prec;
|
|
|
|
|
LITTLENUM_TYPE words[MAX_LITTLENUMS];
|
|
|
|
|
int i;
|
|
|
|
|
char * t;
|
|
|
|
|
|
|
|
|
|
switch (type)
|
|
|
|
|
{
|
|
|
|
|
case 'f':
|
|
|
|
|
case 'F':
|
|
|
|
|
case 's':
|
|
|
|
|
case 'S':
|
|
|
|
|
prec = 2;
|
|
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
case 'd':
|
|
|
|
|
case 'D':
|
|
|
|
|
case 'r':
|
|
|
|
|
case 'R':
|
|
|
|
|
prec = 4;
|
|
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
case 'x':
|
|
|
|
|
case 'X':
|
|
|
|
|
prec = 6;
|
|
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
case 'p':
|
|
|
|
|
case 'P':
|
|
|
|
|
prec = 6;
|
|
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
default:
|
|
|
|
|
*sizeP = 0;
|
|
|
|
|
return _("Bad call to MD_NTOF()");
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
t = atof_ieee (input_line_pointer, type, words);
|
|
|
|
|
|
|
|
|
|
if (t)
|
|
|
|
|
input_line_pointer = t;
|
|
|
|
|
|
|
|
|
|
*sizeP = prec * sizeof (LITTLENUM_TYPE);
|
|
|
|
|
|
|
|
|
|
if (! target_big_endian)
|
|
|
|
|
{
|
|
|
|
|
for (i = prec - 1; i >= 0; i--)
|
|
|
|
|
{
|
|
|
|
|
md_number_to_chars (litP, (valueT) words[i],
|
|
|
|
|
sizeof (LITTLENUM_TYPE));
|
|
|
|
|
litP += sizeof (LITTLENUM_TYPE);
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
for (i = 0; i < prec; i++)
|
|
|
|
|
{
|
|
|
|
|
md_number_to_chars (litP, (valueT) words[i],
|
|
|
|
|
sizeof (LITTLENUM_TYPE));
|
|
|
|
|
litP += sizeof (LITTLENUM_TYPE);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
return NULL;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
const char * md_shortopts = "";
|
|
|
|
|
|
|
|
|
|
struct option md_longopts[] =
|
|
|
|
|
{
|
2014-09-12 22:14:23 +00:00
|
|
|
|
{"EB", no_argument, NULL, OPTION_EB},
|
|
|
|
|
{"EL", no_argument, NULL, OPTION_EL},
|
2012-03-26 19:18:29 +00:00
|
|
|
|
{ NULL, no_argument, NULL, 0}
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
size_t md_longopts_size = sizeof (md_longopts);
|
|
|
|
|
|
|
|
|
|
int md_short_jump_size;
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
md_create_short_jump (char * ptr ATTRIBUTE_UNUSED,
|
|
|
|
|
addressT from_Nddr ATTRIBUTE_UNUSED,
|
|
|
|
|
addressT to_Nddr ATTRIBUTE_UNUSED,
|
|
|
|
|
fragS * frag ATTRIBUTE_UNUSED,
|
|
|
|
|
symbolS * to_symbol ATTRIBUTE_UNUSED)
|
|
|
|
|
{
|
|
|
|
|
as_fatal (_("failed sanity check: short_jump"));
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
md_create_long_jump (char * ptr ATTRIBUTE_UNUSED,
|
|
|
|
|
addressT from_Nddr ATTRIBUTE_UNUSED,
|
|
|
|
|
addressT to_Nddr ATTRIBUTE_UNUSED,
|
|
|
|
|
fragS * frag ATTRIBUTE_UNUSED,
|
|
|
|
|
symbolS * to_symbol ATTRIBUTE_UNUSED)
|
|
|
|
|
{
|
|
|
|
|
as_fatal (_("failed sanity check: long_jump"));
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Called after relaxing, change the frags so they know how big they are. */
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
md_convert_frag (bfd * abfd ATTRIBUTE_UNUSED,
|
|
|
|
|
segT sec ATTRIBUTE_UNUSED,
|
|
|
|
|
fragS * fragP)
|
|
|
|
|
{
|
|
|
|
|
fixS *fixP;
|
|
|
|
|
|
|
|
|
|
switch (fragP->fr_subtype)
|
|
|
|
|
{
|
|
|
|
|
case UNDEFINED_PC_OFFSET:
|
|
|
|
|
fix_new (fragP, fragP->fr_fix, INST_WORD_SIZE * 2, fragP->fr_symbol,
|
2022-10-27 18:45:45 +00:00
|
|
|
|
fragP->fr_offset, true, BFD_RELOC_64_PCREL);
|
2012-03-26 19:18:29 +00:00
|
|
|
|
fragP->fr_fix += INST_WORD_SIZE * 2;
|
|
|
|
|
fragP->fr_var = 0;
|
|
|
|
|
break;
|
|
|
|
|
case DEFINED_ABS_SEGMENT:
|
|
|
|
|
if (fragP->fr_symbol == GOT_symbol)
|
|
|
|
|
fix_new (fragP, fragP->fr_fix, INST_WORD_SIZE * 2, fragP->fr_symbol,
|
2022-10-27 18:45:45 +00:00
|
|
|
|
fragP->fr_offset, true, BFD_RELOC_MICROBLAZE_64_GOTPC);
|
2012-03-26 19:18:29 +00:00
|
|
|
|
else
|
|
|
|
|
fix_new (fragP, fragP->fr_fix, INST_WORD_SIZE * 2, fragP->fr_symbol,
|
2022-10-27 18:45:45 +00:00
|
|
|
|
fragP->fr_offset, false, BFD_RELOC_64);
|
2012-03-26 19:18:29 +00:00
|
|
|
|
fragP->fr_fix += INST_WORD_SIZE * 2;
|
|
|
|
|
fragP->fr_var = 0;
|
|
|
|
|
break;
|
|
|
|
|
case DEFINED_RO_SEGMENT:
|
|
|
|
|
fix_new (fragP, fragP->fr_fix, INST_WORD_SIZE, fragP->fr_symbol,
|
2022-10-27 18:45:45 +00:00
|
|
|
|
fragP->fr_offset, false, BFD_RELOC_MICROBLAZE_32_ROSDA);
|
2012-03-26 19:18:29 +00:00
|
|
|
|
fragP->fr_fix += INST_WORD_SIZE;
|
|
|
|
|
fragP->fr_var = 0;
|
|
|
|
|
break;
|
|
|
|
|
case DEFINED_RW_SEGMENT:
|
|
|
|
|
fix_new (fragP, fragP->fr_fix, INST_WORD_SIZE, fragP->fr_symbol,
|
2022-10-27 18:45:45 +00:00
|
|
|
|
fragP->fr_offset, false, BFD_RELOC_MICROBLAZE_32_RWSDA);
|
2012-03-26 19:18:29 +00:00
|
|
|
|
fragP->fr_fix += INST_WORD_SIZE;
|
|
|
|
|
fragP->fr_var = 0;
|
|
|
|
|
break;
|
|
|
|
|
case DEFINED_PC_OFFSET:
|
|
|
|
|
fix_new (fragP, fragP->fr_fix, INST_WORD_SIZE, fragP->fr_symbol,
|
2022-10-27 18:45:45 +00:00
|
|
|
|
fragP->fr_offset, true, BFD_RELOC_MICROBLAZE_32_LO_PCREL);
|
2012-03-26 19:18:29 +00:00
|
|
|
|
fragP->fr_fix += INST_WORD_SIZE;
|
|
|
|
|
fragP->fr_var = 0;
|
|
|
|
|
break;
|
|
|
|
|
case LARGE_DEFINED_PC_OFFSET:
|
|
|
|
|
fix_new (fragP, fragP->fr_fix, INST_WORD_SIZE * 2, fragP->fr_symbol,
|
2022-10-27 18:45:45 +00:00
|
|
|
|
fragP->fr_offset, true, BFD_RELOC_64_PCREL);
|
2012-03-26 19:18:29 +00:00
|
|
|
|
fragP->fr_fix += INST_WORD_SIZE * 2;
|
|
|
|
|
fragP->fr_var = 0;
|
|
|
|
|
break;
|
|
|
|
|
case GOT_OFFSET:
|
|
|
|
|
fix_new (fragP, fragP->fr_fix, INST_WORD_SIZE * 2, fragP->fr_symbol,
|
2022-10-27 18:45:45 +00:00
|
|
|
|
fragP->fr_offset, false, BFD_RELOC_MICROBLAZE_64_GOT);
|
2012-03-26 19:18:29 +00:00
|
|
|
|
fragP->fr_fix += INST_WORD_SIZE * 2;
|
|
|
|
|
fragP->fr_var = 0;
|
|
|
|
|
break;
|
2018-12-28 15:25:28 +00:00
|
|
|
|
case TEXT_OFFSET:
|
|
|
|
|
fix_new (fragP, fragP->fr_fix, INST_WORD_SIZE * 2, fragP->fr_symbol,
|
2022-10-27 18:45:45 +00:00
|
|
|
|
fragP->fr_offset, false, BFD_RELOC_MICROBLAZE_64_TEXTREL);
|
2018-12-28 15:25:28 +00:00
|
|
|
|
fragP->fr_fix += INST_WORD_SIZE * 2;
|
|
|
|
|
fragP->fr_var = 0;
|
|
|
|
|
break;
|
|
|
|
|
case TEXT_PC_OFFSET:
|
|
|
|
|
fix_new (fragP, fragP->fr_fix, INST_WORD_SIZE * 2, fragP->fr_symbol,
|
2022-10-27 18:45:45 +00:00
|
|
|
|
fragP->fr_offset, false, BFD_RELOC_MICROBLAZE_64_TEXTPCREL);
|
2018-12-28 15:25:28 +00:00
|
|
|
|
fragP->fr_fix += INST_WORD_SIZE * 2;
|
|
|
|
|
fragP->fr_var = 0;
|
|
|
|
|
break;
|
2012-03-26 19:18:29 +00:00
|
|
|
|
case PLT_OFFSET:
|
|
|
|
|
fixP = fix_new (fragP, fragP->fr_fix, INST_WORD_SIZE * 2, fragP->fr_symbol,
|
2022-10-27 18:45:45 +00:00
|
|
|
|
fragP->fr_offset, true, BFD_RELOC_MICROBLAZE_64_PLT);
|
2012-03-26 19:18:29 +00:00
|
|
|
|
/* fixP->fx_plt = 1; */
|
2014-09-12 22:14:23 +00:00
|
|
|
|
(void) fixP;
|
2012-03-26 19:18:29 +00:00
|
|
|
|
fragP->fr_fix += INST_WORD_SIZE * 2;
|
|
|
|
|
fragP->fr_var = 0;
|
|
|
|
|
break;
|
|
|
|
|
case GOTOFF_OFFSET:
|
|
|
|
|
fix_new (fragP, fragP->fr_fix, INST_WORD_SIZE * 2, fragP->fr_symbol,
|
2022-10-27 18:45:45 +00:00
|
|
|
|
fragP->fr_offset, false, BFD_RELOC_MICROBLAZE_64_GOTOFF);
|
2012-03-26 19:18:29 +00:00
|
|
|
|
fragP->fr_fix += INST_WORD_SIZE * 2;
|
|
|
|
|
fragP->fr_var = 0;
|
|
|
|
|
break;
|
2014-09-12 22:14:23 +00:00
|
|
|
|
case TLSGD_OFFSET:
|
|
|
|
|
fix_new (fragP, fragP->fr_fix, INST_WORD_SIZE * 2, fragP->fr_symbol,
|
2022-10-27 18:45:45 +00:00
|
|
|
|
fragP->fr_offset, false, BFD_RELOC_MICROBLAZE_64_TLSGD);
|
2014-09-12 22:14:23 +00:00
|
|
|
|
fragP->fr_fix += INST_WORD_SIZE * 2;
|
|
|
|
|
fragP->fr_var = 0;
|
|
|
|
|
break;
|
|
|
|
|
case TLSLD_OFFSET:
|
|
|
|
|
fix_new (fragP, fragP->fr_fix, INST_WORD_SIZE * 2, fragP->fr_symbol,
|
2022-10-27 18:45:45 +00:00
|
|
|
|
fragP->fr_offset, false, BFD_RELOC_MICROBLAZE_64_TLSLD);
|
2014-09-12 22:14:23 +00:00
|
|
|
|
fragP->fr_fix += INST_WORD_SIZE * 2;
|
|
|
|
|
fragP->fr_var = 0;
|
|
|
|
|
break;
|
|
|
|
|
case TLSDTPREL_OFFSET:
|
|
|
|
|
fix_new (fragP, fragP->fr_fix, INST_WORD_SIZE * 2, fragP->fr_symbol,
|
2022-10-27 18:45:45 +00:00
|
|
|
|
fragP->fr_offset, false, BFD_RELOC_MICROBLAZE_64_TLSDTPREL);
|
2014-09-12 22:14:23 +00:00
|
|
|
|
fragP->fr_fix += INST_WORD_SIZE * 2;
|
|
|
|
|
fragP->fr_var = 0;
|
|
|
|
|
break;
|
2012-03-26 19:18:29 +00:00
|
|
|
|
|
|
|
|
|
default:
|
|
|
|
|
abort ();
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Applies the desired value to the specified location.
|
|
|
|
|
Also sets up addends for 'rela' type relocations. */
|
|
|
|
|
void
|
|
|
|
|
md_apply_fix (fixS * fixP,
|
|
|
|
|
valueT * valp,
|
|
|
|
|
segT segment)
|
|
|
|
|
{
|
2022-10-27 18:45:45 +00:00
|
|
|
|
char * buf = fixP->fx_where + &fixP->fx_frag->fr_literal[0];
|
2017-04-10 11:32:00 +00:00
|
|
|
|
const char * file = fixP->fx_file ? fixP->fx_file : _("unknown");
|
2012-03-26 19:18:29 +00:00
|
|
|
|
const char * symname;
|
|
|
|
|
/* Note: use offsetT because it is signed, valueT is unsigned. */
|
|
|
|
|
offsetT val = (offsetT) * valp;
|
|
|
|
|
int i;
|
|
|
|
|
struct op_code_struct * opcode1;
|
|
|
|
|
unsigned long inst1;
|
|
|
|
|
|
|
|
|
|
symname = fixP->fx_addsy ? S_GET_NAME (fixP->fx_addsy) : _("<unknown>");
|
|
|
|
|
|
|
|
|
|
/* fixP->fx_offset is supposed to be set up correctly for all
|
|
|
|
|
symbol relocations. */
|
|
|
|
|
if (fixP->fx_addsy == NULL)
|
|
|
|
|
{
|
|
|
|
|
if (!fixP->fx_pcrel)
|
|
|
|
|
fixP->fx_offset = val; /* Absolute relocation. */
|
|
|
|
|
else
|
|
|
|
|
fprintf (stderr, "NULL symbol PC-relative relocation? offset = %08x, val = %08x\n",
|
|
|
|
|
(unsigned int) fixP->fx_offset, (unsigned int) val);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* If we aren't adjusting this fixup to be against the section
|
|
|
|
|
symbol, we need to adjust the value. */
|
|
|
|
|
if (fixP->fx_addsy != NULL)
|
|
|
|
|
{
|
|
|
|
|
if (S_IS_WEAK (fixP->fx_addsy)
|
|
|
|
|
|| (symbol_used_in_reloc_p (fixP->fx_addsy)
|
2022-10-27 18:45:45 +00:00
|
|
|
|
&& (((bfd_section_flags (S_GET_SEGMENT (fixP->fx_addsy))
|
2012-03-26 19:18:29 +00:00
|
|
|
|
& SEC_LINK_ONCE) != 0)
|
2022-10-27 18:45:45 +00:00
|
|
|
|
|| startswith (segment_name (S_GET_SEGMENT (fixP->fx_addsy)),
|
|
|
|
|
".gnu.linkonce"))))
|
2012-03-26 19:18:29 +00:00
|
|
|
|
{
|
|
|
|
|
val -= S_GET_VALUE (fixP->fx_addsy);
|
|
|
|
|
if (val != 0 && ! fixP->fx_pcrel)
|
|
|
|
|
{
|
|
|
|
|
/* In this case, the bfd_install_relocation routine will
|
|
|
|
|
incorrectly add the symbol value back in. We just want
|
|
|
|
|
the addend to appear in the object file.
|
|
|
|
|
FIXME: If this makes VALUE zero, we're toast. */
|
|
|
|
|
val -= S_GET_VALUE (fixP->fx_addsy);
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* If the fix is relative to a symbol which is not defined, or not
|
|
|
|
|
in the same segment as the fix, we cannot resolve it here. */
|
|
|
|
|
/* fixP->fx_addsy is NULL if valp contains the entire relocation. */
|
|
|
|
|
if (fixP->fx_addsy != NULL
|
|
|
|
|
&& (!S_IS_DEFINED (fixP->fx_addsy)
|
|
|
|
|
|| (S_GET_SEGMENT (fixP->fx_addsy) != segment)))
|
|
|
|
|
{
|
|
|
|
|
fixP->fx_done = 0;
|
|
|
|
|
#ifdef OBJ_ELF
|
|
|
|
|
/* For ELF we can just return and let the reloc that will be generated
|
|
|
|
|
take care of everything. For COFF we still have to insert 'val'
|
|
|
|
|
into the insn since the addend field will be ignored. */
|
|
|
|
|
/* return; */
|
|
|
|
|
#endif
|
|
|
|
|
}
|
|
|
|
|
/* All fixups in the text section must be handled in the linker. */
|
|
|
|
|
else if (segment->flags & SEC_CODE)
|
|
|
|
|
fixP->fx_done = 0;
|
|
|
|
|
else if (!fixP->fx_pcrel && fixP->fx_addsy != NULL)
|
|
|
|
|
fixP->fx_done = 0;
|
|
|
|
|
else
|
|
|
|
|
fixP->fx_done = 1;
|
|
|
|
|
|
|
|
|
|
switch (fixP->fx_r_type)
|
|
|
|
|
{
|
|
|
|
|
case BFD_RELOC_MICROBLAZE_32_LO:
|
|
|
|
|
case BFD_RELOC_MICROBLAZE_32_LO_PCREL:
|
|
|
|
|
if (target_big_endian)
|
|
|
|
|
{
|
|
|
|
|
buf[2] |= ((val >> 8) & 0xff);
|
|
|
|
|
buf[3] |= (val & 0xff);
|
|
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
{
|
|
|
|
|
buf[1] |= ((val >> 8) & 0xff);
|
|
|
|
|
buf[0] |= (val & 0xff);
|
|
|
|
|
}
|
|
|
|
|
break;
|
|
|
|
|
case BFD_RELOC_MICROBLAZE_32_ROSDA:
|
|
|
|
|
case BFD_RELOC_MICROBLAZE_32_RWSDA:
|
|
|
|
|
/* Don't do anything if the symbol is not defined. */
|
|
|
|
|
if (fixP->fx_addsy == NULL || S_IS_DEFINED (fixP->fx_addsy))
|
|
|
|
|
{
|
|
|
|
|
if (((val & 0xFFFF8000) != 0) && ((val & 0xFFFF8000) != 0xFFFF8000))
|
|
|
|
|
as_bad_where (file, fixP->fx_line,
|
|
|
|
|
_("pcrel for branch to %s too far (0x%x)"),
|
|
|
|
|
symname, (int) val);
|
|
|
|
|
if (target_big_endian)
|
|
|
|
|
{
|
|
|
|
|
buf[2] |= ((val >> 8) & 0xff);
|
|
|
|
|
buf[3] |= (val & 0xff);
|
|
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
{
|
|
|
|
|
buf[1] |= ((val >> 8) & 0xff);
|
|
|
|
|
buf[0] |= (val & 0xff);
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
break;
|
|
|
|
|
case BFD_RELOC_32:
|
|
|
|
|
case BFD_RELOC_RVA:
|
|
|
|
|
case BFD_RELOC_32_PCREL:
|
|
|
|
|
case BFD_RELOC_MICROBLAZE_32_SYM_OP_SYM:
|
|
|
|
|
/* Don't do anything if the symbol is not defined. */
|
|
|
|
|
if (fixP->fx_addsy == NULL || S_IS_DEFINED (fixP->fx_addsy))
|
|
|
|
|
{
|
|
|
|
|
if (target_big_endian)
|
|
|
|
|
{
|
|
|
|
|
buf[0] |= ((val >> 24) & 0xff);
|
|
|
|
|
buf[1] |= ((val >> 16) & 0xff);
|
|
|
|
|
buf[2] |= ((val >> 8) & 0xff);
|
|
|
|
|
buf[3] |= (val & 0xff);
|
|
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
{
|
|
|
|
|
buf[3] |= ((val >> 24) & 0xff);
|
|
|
|
|
buf[2] |= ((val >> 16) & 0xff);
|
|
|
|
|
buf[1] |= ((val >> 8) & 0xff);
|
|
|
|
|
buf[0] |= (val & 0xff);
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
break;
|
|
|
|
|
case BFD_RELOC_64_PCREL:
|
|
|
|
|
case BFD_RELOC_64:
|
2018-12-28 15:25:28 +00:00
|
|
|
|
case BFD_RELOC_MICROBLAZE_64_TEXTREL:
|
2012-03-26 19:18:29 +00:00
|
|
|
|
/* Add an imm instruction. First save the current instruction. */
|
|
|
|
|
for (i = 0; i < INST_WORD_SIZE; i++)
|
|
|
|
|
buf[i + INST_WORD_SIZE] = buf[i];
|
|
|
|
|
|
|
|
|
|
/* Generate the imm instruction. */
|
2022-10-27 18:45:45 +00:00
|
|
|
|
opcode1
|
|
|
|
|
= (struct op_code_struct *) str_hash_find (opcode_hash_control, "imm");
|
2012-03-26 19:18:29 +00:00
|
|
|
|
if (opcode1 == NULL)
|
|
|
|
|
{
|
|
|
|
|
as_bad (_("unknown opcode \"%s\""), "imm");
|
|
|
|
|
return;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
inst1 = opcode1->bit_sequence;
|
|
|
|
|
if (fixP->fx_addsy == NULL || S_IS_DEFINED (fixP->fx_addsy))
|
|
|
|
|
inst1 |= ((val & 0xFFFF0000) >> 16) & IMM_MASK;
|
|
|
|
|
|
|
|
|
|
buf[0] = INST_BYTE0 (inst1);
|
|
|
|
|
buf[1] = INST_BYTE1 (inst1);
|
|
|
|
|
buf[2] = INST_BYTE2 (inst1);
|
|
|
|
|
buf[3] = INST_BYTE3 (inst1);
|
|
|
|
|
|
|
|
|
|
/* Add the value only if the symbol is defined. */
|
|
|
|
|
if (fixP->fx_addsy == NULL || S_IS_DEFINED (fixP->fx_addsy))
|
|
|
|
|
{
|
|
|
|
|
if (target_big_endian)
|
|
|
|
|
{
|
|
|
|
|
buf[6] |= ((val >> 8) & 0xff);
|
|
|
|
|
buf[7] |= (val & 0xff);
|
|
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
{
|
|
|
|
|
buf[5] |= ((val >> 8) & 0xff);
|
|
|
|
|
buf[4] |= (val & 0xff);
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
break;
|
|
|
|
|
|
2014-09-12 22:14:23 +00:00
|
|
|
|
case BFD_RELOC_MICROBLAZE_64_TLSDTPREL:
|
|
|
|
|
case BFD_RELOC_MICROBLAZE_64_TLSGD:
|
|
|
|
|
case BFD_RELOC_MICROBLAZE_64_TLSLD:
|
|
|
|
|
S_SET_THREAD_LOCAL (fixP->fx_addsy);
|
2017-04-10 11:32:00 +00:00
|
|
|
|
/* Fall through. */
|
2014-09-12 22:14:23 +00:00
|
|
|
|
|
2012-03-26 19:18:29 +00:00
|
|
|
|
case BFD_RELOC_MICROBLAZE_64_GOTPC:
|
|
|
|
|
case BFD_RELOC_MICROBLAZE_64_GOT:
|
|
|
|
|
case BFD_RELOC_MICROBLAZE_64_PLT:
|
|
|
|
|
case BFD_RELOC_MICROBLAZE_64_GOTOFF:
|
2018-12-28 15:25:28 +00:00
|
|
|
|
case BFD_RELOC_MICROBLAZE_64_TEXTPCREL:
|
2012-03-26 19:18:29 +00:00
|
|
|
|
/* Add an imm instruction. First save the current instruction. */
|
|
|
|
|
for (i = 0; i < INST_WORD_SIZE; i++)
|
|
|
|
|
buf[i + INST_WORD_SIZE] = buf[i];
|
|
|
|
|
|
|
|
|
|
/* Generate the imm instruction. */
|
2022-10-27 18:45:45 +00:00
|
|
|
|
opcode1
|
|
|
|
|
= (struct op_code_struct *) str_hash_find (opcode_hash_control, "imm");
|
2012-03-26 19:18:29 +00:00
|
|
|
|
if (opcode1 == NULL)
|
|
|
|
|
{
|
|
|
|
|
as_bad (_("unknown opcode \"%s\""), "imm");
|
|
|
|
|
return;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
inst1 = opcode1->bit_sequence;
|
|
|
|
|
|
|
|
|
|
/* We can fixup call to a defined non-global address
|
|
|
|
|
within the same section only. */
|
|
|
|
|
buf[0] = INST_BYTE0 (inst1);
|
|
|
|
|
buf[1] = INST_BYTE1 (inst1);
|
|
|
|
|
buf[2] = INST_BYTE2 (inst1);
|
|
|
|
|
buf[3] = INST_BYTE3 (inst1);
|
|
|
|
|
return;
|
|
|
|
|
|
|
|
|
|
default:
|
|
|
|
|
break;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
if (fixP->fx_addsy == NULL)
|
|
|
|
|
{
|
|
|
|
|
/* This fixup has been resolved. Create a reloc in case the linker
|
|
|
|
|
moves code around due to relaxing. */
|
|
|
|
|
if (fixP->fx_r_type == BFD_RELOC_64_PCREL)
|
|
|
|
|
fixP->fx_r_type = BFD_RELOC_MICROBLAZE_64_NONE;
|
|
|
|
|
else
|
|
|
|
|
fixP->fx_r_type = BFD_RELOC_NONE;
|
|
|
|
|
fixP->fx_addsy = section_symbol (absolute_section);
|
|
|
|
|
}
|
|
|
|
|
return;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
md_operand (expressionS * expressionP)
|
|
|
|
|
{
|
|
|
|
|
/* Ignore leading hash symbol, if present. */
|
|
|
|
|
if (*input_line_pointer == '#')
|
|
|
|
|
{
|
|
|
|
|
input_line_pointer ++;
|
|
|
|
|
expression (expressionP);
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Called just before address relaxation, return the length
|
|
|
|
|
by which a fragment must grow to reach it's destination. */
|
|
|
|
|
|
|
|
|
|
int
|
|
|
|
|
md_estimate_size_before_relax (fragS * fragP,
|
|
|
|
|
segT segment_type)
|
|
|
|
|
{
|
|
|
|
|
sbss_segment = bfd_get_section_by_name (stdoutput, ".sbss");
|
|
|
|
|
sbss2_segment = bfd_get_section_by_name (stdoutput, ".sbss2");
|
|
|
|
|
sdata_segment = bfd_get_section_by_name (stdoutput, ".sdata");
|
|
|
|
|
sdata2_segment = bfd_get_section_by_name (stdoutput, ".sdata2");
|
|
|
|
|
|
|
|
|
|
switch (fragP->fr_subtype)
|
|
|
|
|
{
|
|
|
|
|
case INST_PC_OFFSET:
|
|
|
|
|
/* Used to be a PC-relative branch. */
|
|
|
|
|
if (!fragP->fr_symbol)
|
|
|
|
|
{
|
|
|
|
|
/* We know the abs value: Should never happen. */
|
|
|
|
|
as_bad (_("Absolute PC-relative value in relaxation code. Assembler error....."));
|
|
|
|
|
abort ();
|
|
|
|
|
}
|
2014-09-12 22:14:23 +00:00
|
|
|
|
else if (S_GET_SEGMENT (fragP->fr_symbol) == segment_type &&
|
|
|
|
|
!S_IS_WEAK (fragP->fr_symbol))
|
2012-03-26 19:18:29 +00:00
|
|
|
|
{
|
|
|
|
|
fragP->fr_subtype = DEFINED_PC_OFFSET;
|
|
|
|
|
/* Don't know now whether we need an imm instruction. */
|
|
|
|
|
fragP->fr_var = INST_WORD_SIZE;
|
|
|
|
|
}
|
|
|
|
|
else if (S_IS_DEFINED (fragP->fr_symbol)
|
|
|
|
|
&& (((S_GET_SEGMENT (fragP->fr_symbol))->flags & SEC_CODE) == 0))
|
|
|
|
|
{
|
|
|
|
|
/* Cannot have a PC-relative branch to a diff segment. */
|
|
|
|
|
as_bad (_("PC relative branch to label %s which is not in the instruction space"),
|
|
|
|
|
S_GET_NAME (fragP->fr_symbol));
|
|
|
|
|
fragP->fr_subtype = UNDEFINED_PC_OFFSET;
|
|
|
|
|
fragP->fr_var = INST_WORD_SIZE*2;
|
|
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
{
|
|
|
|
|
fragP->fr_subtype = UNDEFINED_PC_OFFSET;
|
|
|
|
|
fragP->fr_var = INST_WORD_SIZE*2;
|
|
|
|
|
}
|
|
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
case INST_NO_OFFSET:
|
2018-12-28 15:25:28 +00:00
|
|
|
|
case TEXT_OFFSET:
|
2012-03-26 19:18:29 +00:00
|
|
|
|
/* Used to be a reference to somewhere which was unknown. */
|
|
|
|
|
if (fragP->fr_symbol)
|
|
|
|
|
{
|
|
|
|
|
if (fragP->fr_opcode == NULL)
|
|
|
|
|
{
|
2018-12-28 15:25:28 +00:00
|
|
|
|
/* Used as an absolute value. */
|
|
|
|
|
if (fragP->fr_subtype == INST_NO_OFFSET)
|
|
|
|
|
fragP->fr_subtype = DEFINED_ABS_SEGMENT;
|
|
|
|
|
/* Variable part does not change. */
|
|
|
|
|
fragP->fr_var = INST_WORD_SIZE*2;
|
|
|
|
|
}
|
2012-03-26 19:18:29 +00:00
|
|
|
|
else if (streq (fragP->fr_opcode, str_microblaze_ro_anchor))
|
|
|
|
|
{
|
|
|
|
|
/* It is accessed using the small data read only anchor. */
|
2014-09-12 22:14:23 +00:00
|
|
|
|
if ((S_GET_SEGMENT (fragP->fr_symbol) == bfd_com_section_ptr)
|
2012-03-26 19:18:29 +00:00
|
|
|
|
|| (S_GET_SEGMENT (fragP->fr_symbol) == sdata2_segment)
|
|
|
|
|
|| (S_GET_SEGMENT (fragP->fr_symbol) == sbss2_segment)
|
|
|
|
|
|| (! S_IS_DEFINED (fragP->fr_symbol)))
|
|
|
|
|
{
|
|
|
|
|
fragP->fr_subtype = DEFINED_RO_SEGMENT;
|
|
|
|
|
fragP->fr_var = INST_WORD_SIZE;
|
|
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
{
|
|
|
|
|
/* Variable not in small data read only segment accessed
|
|
|
|
|
using small data read only anchor. */
|
2017-04-10 11:32:00 +00:00
|
|
|
|
const char *file = fragP->fr_file ? fragP->fr_file : _("unknown");
|
2012-03-26 19:18:29 +00:00
|
|
|
|
|
|
|
|
|
as_bad_where (file, fragP->fr_line,
|
|
|
|
|
_("Variable is accessed using small data read "
|
|
|
|
|
"only anchor, but it is not in the small data "
|
|
|
|
|
"read only section"));
|
|
|
|
|
fragP->fr_subtype = DEFINED_RO_SEGMENT;
|
|
|
|
|
fragP->fr_var = INST_WORD_SIZE;
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
else if (streq (fragP->fr_opcode, str_microblaze_rw_anchor))
|
|
|
|
|
{
|
2014-09-12 22:14:23 +00:00
|
|
|
|
if ((S_GET_SEGMENT (fragP->fr_symbol) == bfd_com_section_ptr)
|
2012-03-26 19:18:29 +00:00
|
|
|
|
|| (S_GET_SEGMENT (fragP->fr_symbol) == sdata_segment)
|
|
|
|
|
|| (S_GET_SEGMENT (fragP->fr_symbol) == sbss_segment)
|
|
|
|
|
|| (!S_IS_DEFINED (fragP->fr_symbol)))
|
|
|
|
|
{
|
|
|
|
|
/* It is accessed using the small data read write anchor. */
|
|
|
|
|
fragP->fr_subtype = DEFINED_RW_SEGMENT;
|
|
|
|
|
fragP->fr_var = INST_WORD_SIZE;
|
|
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
{
|
2017-04-10 11:32:00 +00:00
|
|
|
|
const char *file = fragP->fr_file ? fragP->fr_file : _("unknown");
|
2012-03-26 19:18:29 +00:00
|
|
|
|
|
|
|
|
|
as_bad_where (file, fragP->fr_line,
|
|
|
|
|
_("Variable is accessed using small data read "
|
|
|
|
|
"write anchor, but it is not in the small data "
|
|
|
|
|
"read write section"));
|
|
|
|
|
fragP->fr_subtype = DEFINED_RW_SEGMENT;
|
|
|
|
|
fragP->fr_var = INST_WORD_SIZE;
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
{
|
|
|
|
|
as_bad (_("Incorrect fr_opcode value in frag. Internal error....."));
|
|
|
|
|
abort ();
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
{
|
|
|
|
|
/* We know the abs value: Should never happen. */
|
|
|
|
|
as_bad (_("Absolute value in relaxation code. Assembler error....."));
|
|
|
|
|
abort ();
|
|
|
|
|
}
|
|
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
case UNDEFINED_PC_OFFSET:
|
|
|
|
|
case LARGE_DEFINED_PC_OFFSET:
|
|
|
|
|
case DEFINED_ABS_SEGMENT:
|
|
|
|
|
case GOT_OFFSET:
|
|
|
|
|
case PLT_OFFSET:
|
|
|
|
|
case GOTOFF_OFFSET:
|
2018-12-28 15:25:28 +00:00
|
|
|
|
case TEXT_PC_OFFSET:
|
2014-09-12 22:14:23 +00:00
|
|
|
|
case TLSGD_OFFSET:
|
|
|
|
|
case TLSLD_OFFSET:
|
|
|
|
|
case TLSTPREL_OFFSET:
|
|
|
|
|
case TLSDTPREL_OFFSET:
|
2012-03-26 19:18:29 +00:00
|
|
|
|
fragP->fr_var = INST_WORD_SIZE*2;
|
|
|
|
|
break;
|
|
|
|
|
case DEFINED_RO_SEGMENT:
|
|
|
|
|
case DEFINED_RW_SEGMENT:
|
|
|
|
|
case DEFINED_PC_OFFSET:
|
2014-09-12 22:14:23 +00:00
|
|
|
|
case TLSDTPMOD_OFFSET:
|
2012-03-26 19:18:29 +00:00
|
|
|
|
fragP->fr_var = INST_WORD_SIZE;
|
|
|
|
|
break;
|
|
|
|
|
default:
|
|
|
|
|
abort ();
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
return fragP->fr_var;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Put number into target byte order. */
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
md_number_to_chars (char * ptr, valueT use, int nbytes)
|
|
|
|
|
{
|
|
|
|
|
if (target_big_endian)
|
|
|
|
|
number_to_chars_bigendian (ptr, use, nbytes);
|
|
|
|
|
else
|
|
|
|
|
number_to_chars_littleendian (ptr, use, nbytes);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Round up a section size to the appropriate boundary. */
|
|
|
|
|
|
|
|
|
|
valueT
|
|
|
|
|
md_section_align (segT segment ATTRIBUTE_UNUSED, valueT size)
|
|
|
|
|
{
|
|
|
|
|
return size; /* Byte alignment is fine. */
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
/* The location from which a PC relative jump should be calculated,
|
|
|
|
|
given a PC relative reloc. */
|
|
|
|
|
|
|
|
|
|
long
|
|
|
|
|
md_pcrel_from_section (fixS * fixp, segT sec ATTRIBUTE_UNUSED)
|
|
|
|
|
{
|
|
|
|
|
#ifdef OBJ_ELF
|
|
|
|
|
/* If the symbol is undefined or defined in another section
|
|
|
|
|
we leave the add number alone for the linker to fix it later.
|
|
|
|
|
Only account for the PC pre-bump (No PC-pre-bump on the Microblaze). */
|
|
|
|
|
|
|
|
|
|
if (fixp->fx_addsy != (symbolS *) NULL
|
|
|
|
|
&& (!S_IS_DEFINED (fixp->fx_addsy)
|
|
|
|
|
|| (S_GET_SEGMENT (fixp->fx_addsy) != sec)))
|
|
|
|
|
return 0;
|
|
|
|
|
else
|
|
|
|
|
{
|
|
|
|
|
/* The case where we are going to resolve things... */
|
|
|
|
|
if (fixp->fx_r_type == BFD_RELOC_64_PCREL)
|
|
|
|
|
return fixp->fx_where + fixp->fx_frag->fr_address + INST_WORD_SIZE;
|
|
|
|
|
else
|
|
|
|
|
return fixp->fx_where + fixp->fx_frag->fr_address;
|
|
|
|
|
}
|
|
|
|
|
#endif
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
#define F(SZ,PCREL) (((SZ) << 1) + (PCREL))
|
|
|
|
|
#define MAP(SZ,PCREL,TYPE) case F (SZ, PCREL): code = (TYPE); break
|
|
|
|
|
|
|
|
|
|
arelent *
|
|
|
|
|
tc_gen_reloc (asection * section ATTRIBUTE_UNUSED, fixS * fixp)
|
|
|
|
|
{
|
|
|
|
|
arelent * rel;
|
|
|
|
|
bfd_reloc_code_real_type code;
|
|
|
|
|
|
|
|
|
|
switch (fixp->fx_r_type)
|
|
|
|
|
{
|
|
|
|
|
case BFD_RELOC_NONE:
|
|
|
|
|
case BFD_RELOC_MICROBLAZE_64_NONE:
|
|
|
|
|
case BFD_RELOC_32:
|
|
|
|
|
case BFD_RELOC_MICROBLAZE_32_LO:
|
|
|
|
|
case BFD_RELOC_MICROBLAZE_32_LO_PCREL:
|
|
|
|
|
case BFD_RELOC_RVA:
|
|
|
|
|
case BFD_RELOC_64:
|
|
|
|
|
case BFD_RELOC_64_PCREL:
|
|
|
|
|
case BFD_RELOC_MICROBLAZE_32_ROSDA:
|
|
|
|
|
case BFD_RELOC_MICROBLAZE_32_RWSDA:
|
|
|
|
|
case BFD_RELOC_MICROBLAZE_32_SYM_OP_SYM:
|
|
|
|
|
case BFD_RELOC_MICROBLAZE_64_GOTPC:
|
|
|
|
|
case BFD_RELOC_MICROBLAZE_64_GOT:
|
|
|
|
|
case BFD_RELOC_MICROBLAZE_64_PLT:
|
|
|
|
|
case BFD_RELOC_MICROBLAZE_64_GOTOFF:
|
|
|
|
|
case BFD_RELOC_MICROBLAZE_32_GOTOFF:
|
2014-09-12 22:14:23 +00:00
|
|
|
|
case BFD_RELOC_MICROBLAZE_64_TLSGD:
|
|
|
|
|
case BFD_RELOC_MICROBLAZE_64_TLSLD:
|
|
|
|
|
case BFD_RELOC_MICROBLAZE_32_TLSDTPMOD:
|
|
|
|
|
case BFD_RELOC_MICROBLAZE_32_TLSDTPREL:
|
|
|
|
|
case BFD_RELOC_MICROBLAZE_64_TLSDTPREL:
|
|
|
|
|
case BFD_RELOC_MICROBLAZE_64_TLSGOTTPREL:
|
|
|
|
|
case BFD_RELOC_MICROBLAZE_64_TLSTPREL:
|
2018-12-28 15:25:28 +00:00
|
|
|
|
case BFD_RELOC_MICROBLAZE_64_TEXTPCREL:
|
|
|
|
|
case BFD_RELOC_MICROBLAZE_64_TEXTREL:
|
2012-03-26 19:18:29 +00:00
|
|
|
|
code = fixp->fx_r_type;
|
|
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
default:
|
|
|
|
|
switch (F (fixp->fx_size, fixp->fx_pcrel))
|
|
|
|
|
{
|
|
|
|
|
MAP (1, 0, BFD_RELOC_8);
|
|
|
|
|
MAP (2, 0, BFD_RELOC_16);
|
|
|
|
|
MAP (4, 0, BFD_RELOC_32);
|
|
|
|
|
MAP (1, 1, BFD_RELOC_8_PCREL);
|
|
|
|
|
MAP (2, 1, BFD_RELOC_16_PCREL);
|
|
|
|
|
MAP (4, 1, BFD_RELOC_32_PCREL);
|
|
|
|
|
default:
|
|
|
|
|
code = fixp->fx_r_type;
|
|
|
|
|
as_bad (_("Can not do %d byte %srelocation"),
|
|
|
|
|
fixp->fx_size,
|
2017-10-07 00:16:47 +00:00
|
|
|
|
fixp->fx_pcrel ? _("pc-relative ") : "");
|
2012-03-26 19:18:29 +00:00
|
|
|
|
}
|
|
|
|
|
break;
|
|
|
|
|
}
|
|
|
|
|
|
2017-04-10 11:32:00 +00:00
|
|
|
|
rel = XNEW (arelent);
|
|
|
|
|
rel->sym_ptr_ptr = XNEW (asymbol *);
|
2012-03-26 19:18:29 +00:00
|
|
|
|
|
|
|
|
|
if (code == BFD_RELOC_MICROBLAZE_32_SYM_OP_SYM)
|
|
|
|
|
*rel->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_subsy);
|
|
|
|
|
else
|
|
|
|
|
*rel->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
|
|
|
|
|
|
|
|
|
|
rel->address = fixp->fx_frag->fr_address + fixp->fx_where;
|
|
|
|
|
/* Always pass the addend along! */
|
|
|
|
|
rel->addend = fixp->fx_offset;
|
|
|
|
|
rel->howto = bfd_reloc_type_lookup (stdoutput, code);
|
|
|
|
|
|
|
|
|
|
if (rel->howto == NULL)
|
|
|
|
|
{
|
|
|
|
|
as_bad_where (fixp->fx_file, fixp->fx_line,
|
|
|
|
|
_("Cannot represent relocation type %s"),
|
|
|
|
|
bfd_get_reloc_code_name (code));
|
|
|
|
|
|
|
|
|
|
/* Set howto to a garbage value so that we can keep going. */
|
|
|
|
|
rel->howto = bfd_reloc_type_lookup (stdoutput, BFD_RELOC_32);
|
|
|
|
|
gas_assert (rel->howto != NULL);
|
|
|
|
|
}
|
|
|
|
|
return rel;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
int
|
2017-04-10 11:32:00 +00:00
|
|
|
|
md_parse_option (int c, const char * arg ATTRIBUTE_UNUSED)
|
2012-03-26 19:18:29 +00:00
|
|
|
|
{
|
|
|
|
|
switch (c)
|
|
|
|
|
{
|
2014-09-12 22:14:23 +00:00
|
|
|
|
case OPTION_EB:
|
|
|
|
|
target_big_endian = 1;
|
|
|
|
|
break;
|
|
|
|
|
case OPTION_EL:
|
|
|
|
|
target_big_endian = 0;
|
|
|
|
|
break;
|
2012-03-26 19:18:29 +00:00
|
|
|
|
default:
|
|
|
|
|
return 0;
|
|
|
|
|
}
|
|
|
|
|
return 1;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
md_show_usage (FILE * stream ATTRIBUTE_UNUSED)
|
|
|
|
|
{
|
|
|
|
|
/* fprintf(stream, _("\
|
|
|
|
|
MicroBlaze options:\n\
|
|
|
|
|
-noSmall Data in the comm and data sections do not go into the small data section\n")); */
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
/* Create a fixup for a cons expression. If parse_cons_expression_microblaze
|
|
|
|
|
found a machine specific op in an expression,
|
|
|
|
|
then we create relocs accordingly. */
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
cons_fix_new_microblaze (fragS * frag,
|
|
|
|
|
int where,
|
|
|
|
|
int size,
|
2015-08-28 15:32:19 +00:00
|
|
|
|
expressionS *exp,
|
|
|
|
|
bfd_reloc_code_real_type r)
|
2012-03-26 19:18:29 +00:00
|
|
|
|
{
|
|
|
|
|
if ((exp->X_op == O_subtract) && (exp->X_add_symbol) &&
|
|
|
|
|
(exp->X_op_symbol) && (now_seg != absolute_section) && (size == 4)
|
|
|
|
|
&& (!S_IS_LOCAL (exp->X_op_symbol)))
|
|
|
|
|
r = BFD_RELOC_MICROBLAZE_32_SYM_OP_SYM;
|
|
|
|
|
else if (exp->X_md == IMM_GOTOFF && exp->X_op == O_symbol_rva)
|
|
|
|
|
{
|
|
|
|
|
exp->X_op = O_symbol;
|
|
|
|
|
r = BFD_RELOC_MICROBLAZE_32_GOTOFF;
|
|
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
{
|
|
|
|
|
switch (size)
|
|
|
|
|
{
|
|
|
|
|
case 1:
|
|
|
|
|
r = BFD_RELOC_8;
|
|
|
|
|
break;
|
|
|
|
|
case 2:
|
|
|
|
|
r = BFD_RELOC_16;
|
|
|
|
|
break;
|
|
|
|
|
case 4:
|
|
|
|
|
r = BFD_RELOC_32;
|
|
|
|
|
break;
|
|
|
|
|
case 8:
|
|
|
|
|
r = BFD_RELOC_64;
|
|
|
|
|
break;
|
|
|
|
|
default:
|
|
|
|
|
as_bad (_("unsupported BFD relocation size %u"), size);
|
|
|
|
|
r = BFD_RELOC_32;
|
|
|
|
|
break;
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
fix_new_exp (frag, where, size, exp, 0, r);
|
|
|
|
|
}
|