2012-03-26 19:18:29 +00:00
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/* tc-arc.h - Macros and type defines for the ARC.
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2017-04-10 11:32:00 +00:00
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Copyright (C) 2014-2017 Free Software Foundation, Inc.
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Contributed by Claudiu Zissulescu (claziss@synopsys.com)
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2012-03-26 19:18:29 +00:00
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This file is part of GAS, the GNU Assembler.
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GAS is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as
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published by the Free Software Foundation; either version 3,
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or (at your option) any later version.
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GAS is distributed in the hope that it will be useful, but
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WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See
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the GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with GAS; see the file COPYING. If not, write to the Free
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Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
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02110-1301, USA. */
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2017-04-10 11:32:00 +00:00
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#include "opcode/arc.h"
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2012-03-26 19:18:29 +00:00
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2017-04-10 11:32:00 +00:00
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/* By convention, you should define this macro in the `.h' file. For
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example, `tc-m68k.h' defines `TC_M68K'. You might have to use this
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if it is necessary to add CPU specific code to the object format
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file. */
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#define TC_ARC
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2012-03-26 19:18:29 +00:00
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2017-04-10 11:32:00 +00:00
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/* We want local label support. */
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2012-03-26 19:18:29 +00:00
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#define LOCAL_LABELS_FB 1
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2017-04-10 11:32:00 +00:00
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/* This macro is the BFD architecture to pass to
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`bfd_set_arch_mach'. */
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2012-03-26 19:18:29 +00:00
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#define TARGET_ARCH bfd_arch_arc
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2017-04-10 11:32:00 +00:00
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/* The `extsym - .' expressions can be emitted using PC-relative
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relocs. */
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2012-03-26 19:18:29 +00:00
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#define DIFF_EXPR_OK
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2017-04-10 11:32:00 +00:00
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#define REGISTER_PREFIX '%'
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2012-03-26 19:18:29 +00:00
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2017-04-10 11:32:00 +00:00
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#undef LITTLE_ENDIAN
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2012-03-26 19:18:29 +00:00
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#define LITTLE_ENDIAN 1234
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2017-04-10 11:32:00 +00:00
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#undef BIG_ENDIAN
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2012-03-26 19:18:29 +00:00
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#define BIG_ENDIAN 4321
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2017-04-10 11:32:00 +00:00
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#ifdef TARGET_BYTES_BIG_ENDIAN
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# define DEFAULT_TARGET_FORMAT "elf32-bigarc"
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# define DEFAULT_BYTE_ORDER BIG_ENDIAN
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#else
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/* You should define this macro to be non-zero if the target is big
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endian, and zero if the target is little endian. */
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# define TARGET_BYTES_BIG_ENDIAN 0
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# define DEFAULT_TARGET_FORMAT "elf32-littlearc"
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# define DEFAULT_BYTE_ORDER LITTLE_ENDIAN
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#endif /* TARGET_BYTES_BIG_ENDIAN. */
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2012-03-26 19:18:29 +00:00
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/* The endianness of the target format may change based on command
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line arguments. */
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2017-04-10 11:32:00 +00:00
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extern const char *arc_target_format;
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/* This macro is the BFD target name to use when creating the output
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file. This will normally depend upon the `OBJ_FMT' macro. */
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#define TARGET_FORMAT arc_target_format
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/* `md_short_jump_size'
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`md_long_jump_size'
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`md_create_short_jump'
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`md_create_long_jump'
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2012-03-26 19:18:29 +00:00
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2017-04-10 11:32:00 +00:00
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If `WORKING_DOT_WORD' is defined, GAS will not do broken word
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processing (*note Broken words::.). Otherwise, you should set
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`md_short_jump_size' to the size of a short jump (a jump that is
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just long enough to jump around a long jmp) and `md_long_jump_size'
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to the size of a long jump (a jump that can go anywhere in the
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function). You should define `md_create_short_jump' to create a
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short jump around a long jump, and define `md_create_long_jump' to
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create a long jump. */
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2012-03-26 19:18:29 +00:00
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#define WORKING_DOT_WORD
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2017-04-10 11:32:00 +00:00
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#define LISTING_HEADER "ARC GAS "
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2012-03-26 19:18:29 +00:00
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/* The number of bytes to put into a word in a listing. This affects
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the way the bytes are clumped together in the listing. For
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example, a value of 2 might print `1234 5678' where a value of 1
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would print `12 34 56 78'. The default value is 4. */
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#define LISTING_WORD_SIZE 2
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2012-03-26 19:18:29 +00:00
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2017-04-10 11:32:00 +00:00
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/* If you define this macro, it should return the position from which
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the PC relative adjustment for a PC relative fixup should be made.
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On many processors, the base of a PC relative instruction is the
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next instruction, so this macro would return the length of an
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instruction, plus the address of the PC relative fixup. The latter
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can be calculated as fixp->fx_where +
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fixp->fx_frag->fr_address. */
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extern long md_pcrel_from_section (struct fix *, segT);
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#define MD_PCREL_FROM_SECTION(FIX, SEC) md_pcrel_from_section (FIX, SEC)
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/* [ ] is index operator. */
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#define NEED_INDEX_OPERATOR
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#define MAX_MEM_FOR_RS_ALIGN_CODE (1+2)
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2012-03-26 19:18:29 +00:00
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2017-04-10 11:32:00 +00:00
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/* HANDLE_ALIGN called after all the assembly has been done,
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so we can fill in all the rs_align_code type frags with
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nop instructions. */
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#define HANDLE_ALIGN(FRAGP) arc_handle_align (FRAGP)
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2012-03-26 19:18:29 +00:00
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2017-04-10 11:32:00 +00:00
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/* Values passed to md_apply_fix3 don't include the symbol value. */
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2012-03-26 19:18:29 +00:00
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#define MD_APPLY_SYM_VALUE(FIX) 0
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/* No shared lib support, so we don't need to ensure externally
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visible symbols can be overridden. */
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#define EXTERN_FORCE_RELOC 0
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/* You may define this macro to generate a fixup for a data allocation
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pseudo-op. */
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#define TC_CONS_FIX_NEW(FRAG, OFF, LEN, EXP, RELOC) \
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arc_cons_fix_new ((FRAG), (OFF), (LEN), (EXP), (RELOC))
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/* We don't want gas to fixup the following program memory related
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relocations. Check also that fx_addsy is not NULL, in order to
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make sure that the fixup refers to some sort of label. */
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#define TC_VALIDATE_FIX(FIXP,SEG,SKIP) \
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if ((FIXP->fx_r_type == BFD_RELOC_ARC_GOTPC32 \
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|| FIXP->fx_r_type == BFD_RELOC_ARC_PLT32 \
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|| FIXP->fx_r_type == BFD_RELOC_ARC_S25W_PCREL_PLT \
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|| FIXP->fx_r_type == BFD_RELOC_ARC_S25H_PCREL_PLT \
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|| FIXP->fx_r_type == BFD_RELOC_ARC_S21W_PCREL_PLT \
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|| FIXP->fx_r_type == BFD_RELOC_ARC_S21H_PCREL_PLT) \
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&& FIXP->fx_addsy != NULL \
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&& FIXP->fx_subsy == NULL) \
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{ \
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symbol_mark_used_in_reloc (FIXP->fx_addsy); \
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goto SKIP; \
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}
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/* BFD_RELOC_ARC_TLS_GD_LD may use fx_subsy to store a label that is
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later turned into fx_offset. */
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#define TC_FORCE_RELOCATION_SUB_LOCAL(FIX, SEG) \
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((FIX)->fx_r_type == BFD_RELOC_ARC_TLS_GD_LD)
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#define TC_VALIDATE_FIX_SUB(FIX, SEG) \
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((md_register_arithmetic || (SEG) != reg_section) \
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&& ((FIX)->fx_r_type == BFD_RELOC_GPREL32 \
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|| (FIX)->fx_r_type == BFD_RELOC_GPREL16 \
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|| (FIX)->fx_r_type == BFD_RELOC_ARC_TLS_DTPOFF \
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|| (FIX)->fx_r_type == BFD_RELOC_ARC_TLS_DTPOFF_S9 \
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|| TC_FORCE_RELOCATION_SUB_LOCAL (FIX, SEG)))
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/* We use this to mark the end-loop label. We use this mark for ZOL
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validity checks. */
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#define TC_SYMFIELD_TYPE unsigned int
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#define ARC_GET_FLAG(s) (*symbol_get_tc (s))
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#define ARC_SET_FLAG(s,v) (*symbol_get_tc (s) |= (v))
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/* The symbol is a ZOL's end loop label. */
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#define ARC_FLAG_ZOL (1 << 0)
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/* The symbol is an AUX register. */
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#define ARC_FLAG_AUX (1 << 1)
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/* We use this hook to check the validity of the last to instructions
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of a ZOL. */
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#define tc_frob_label(S) arc_frob_label (S)
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#define GLOBAL_OFFSET_TABLE_NAME "_GLOBAL_OFFSET_TABLE_"
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#define DYNAMIC_STRUCT_NAME "_DYNAMIC"
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/* We need to take care of not having section relative fixups for the
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fixups with respect to Position Independent Code. */
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#define tc_fix_adjustable(FIX) tc_arc_fix_adjustable(FIX)
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/* This hook is required to parse register names as operands. */
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#define md_parse_name(name, exp, m, c) arc_parse_name (name, exp)
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/* Used within frags to pass some information to some relaxation
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machine dependent values. */
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#define TC_FRAG_TYPE struct arc_relax_type
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/* Adjust non PC-rel values at relaxation time. */
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#define TC_PCREL_ADJUST(F) arc_pcrel_adjust (F)
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/* Adjust symbol table. */
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#define obj_adjust_symtab() arc_adjust_symtab ()
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extern void arc_adjust_symtab (void);
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extern int arc_pcrel_adjust (fragS *);
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extern bfd_boolean arc_parse_name (const char *, struct expressionS *);
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extern int tc_arc_fix_adjustable (struct fix *);
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extern void arc_handle_align (fragS *);
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extern void arc_cons_fix_new (fragS *, int, int, expressionS *,
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bfd_reloc_code_real_type);
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extern void arc_frob_label (symbolS *);
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extern void tc_arc_frame_initial_instructions (void);
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extern int tc_arc_regname_to_dw2regnum (char *regname);
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/* The blink register is r31. */
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#define DWARF2_DEFAULT_RETURN_COLUMN 31
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/* Registers are generally saved at negative offsets to the CFA. */
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#define DWARF2_CIE_DATA_ALIGNMENT (-4)
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/* We want .cfi_* pseudo-ops for generating unwind info. */
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#define TARGET_USE_CFIPOP 1
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/* CFI hooks. */
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#define tc_cfi_frame_initial_instructions tc_arc_frame_initial_instructions
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#define tc_regname_to_dw2regnum tc_arc_regname_to_dw2regnum
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/* Define the NOPs. */
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#define NOP_OPCODE_S 0x000078E0
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#define NOP_OPCODE_L 0x264A7000 /* mov 0,0. */
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#define MAX_FLAG_NAME_LENGTH 7
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struct arc_flags
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{
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/* Name of the parsed flag. */
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char name[MAX_FLAG_NAME_LENGTH + 1];
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/* Pointer to arc flags. */
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const struct arc_flag_operand *flgp;
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};
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extern const relax_typeS md_relax_table[];
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#define TC_GENERIC_RELAX_TABLE md_relax_table
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/* Used to construct instructions at md_convert_frag stage of
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relaxation. */
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struct arc_relax_type
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{
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/* Dictates whether the pc-relativity should be kept in mind when
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relax_frag is called or whether the pc-relativity should be
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solved outside of relaxation. For clarification: BL(_S) and
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B(_S) use pcrel == 1 and ADD with a solvable expression as 3rd
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operand use pcrel == 0. */
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unsigned char pcrel;
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/* Expressions that dictate the operands. Used for re-assembling in
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md_convert_frag. */
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expressionS tok[MAX_INSN_ARGS];
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/* Number of tok (i.e. number of operands). Used for re-assembling
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in md_convert_frag. */
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int ntok;
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/* Flags of instruction. Used for re-assembling in
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md_convert_frag. */
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struct arc_flags pflags[MAX_INSN_FLGS];
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/* Number of flags. Used for re-assembling in md_convert_frag. */
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int nflg;
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};
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