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https://github.com/autc04/Retro68.git
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167 lines
4.4 KiB
ArmAsm
167 lines
4.4 KiB
ArmAsm
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/*
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Copyright (c) 2015, Synopsys, Inc. All rights reserved.
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Redistribution and use in source and binary forms, with or without
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modification, are permitted provided that the following conditions are met:
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1) Redistributions of source code must retain the above copyright notice,
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this list of conditions and the following disclaimer.
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2) Redistributions in binary form must reproduce the above copyright notice,
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this list of conditions and the following disclaimer in the documentation
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and/or other materials provided with the distribution.
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3) Neither the name of the Synopsys, Inc., nor the names of its contributors
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may be used to endorse or promote products derived from this software
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without specific prior written permission.
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THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
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LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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POSSIBILITY OF SUCH DAMAGE.
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*/
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/* This implementation is optimized for performance. For code size a generic
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implementation of this function from newlib/libc/string/strchr.c will be
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used. */
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#if !defined (__OPTIMIZE_SIZE__) && !defined (PREFER_SIZE_OVER_SPEED)
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/* ARC700 has a relatively long pipeline and branch prediction, so we want
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to avoid branches that are hard to predict. On the other hand, the
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presence of the norm instruction makes it easier to operate on whole
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words branch-free. */
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#include "asm.h"
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#if (defined (__ARC700__) || defined (__ARCEM__) || defined (__ARCHS__)) \
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&& defined (__ARC_NORM__) && defined (__ARC_BARREL_SHIFTER__)
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ENTRY (strchr)
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extb_s r1,r1
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asl r5,r1,8
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bmsk r2,r0,1
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or r5,r5,r1
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mov_s r3,0x01010101
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breq.d r2,r0,.Laligned
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asl r4,r5,16
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sub_s r0,r0,r2
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asl r7,r2,3
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ld_s r2,[r0]
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#ifdef __LITTLE_ENDIAN__
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asl r7,r3,r7
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#else
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lsr r7,r3,r7
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#endif
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or r5,r5,r4
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ror r4,r3
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sub r12,r2,r7
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bic_s r12,r12,r2
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and r12,r12,r4
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brne.d r12,0,.Lfound0_ua
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xor r6,r2,r5
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ld.a r2,[r0,4]
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sub r12,r6,r7
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bic r12,r12,r6
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#ifdef __LITTLE_ENDIAN__
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and r7,r12,r4
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breq r7,0,.Loop ; For speed, we want this branch to be unaligned.
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b_l .Lfound_char ; Likewise this one.
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#else
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and r12,r12,r4
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breq_l r12,0,.Loop ; For speed, we want this branch to be unaligned.
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lsr_s r12,r12,7
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bic r2,r7,r6
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b.d .Lfound_char_b
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and_s r2,r2,r12
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#endif
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; /* We require this code address to be unaligned for speed... */
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.Laligned:
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ld_s r2,[r0]
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or r5,r5,r4
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ror r4,r3
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; /* ... so that this code address is aligned, for itself and ... */
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.Loop:
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sub r12,r2,r3
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bic_s r12,r12,r2
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and r12,r12,r4
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brne.d r12,0,.Lfound0
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xor r6,r2,r5
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ld.a r2,[r0,4]
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sub r12,r6,r3
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bic r12,r12,r6
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and r7,r12,r4
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breq r7,0,.Loop /* ... so that this branch is unaligned. */
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; Found searched-for character. r0 has already advanced to next word.
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#ifdef __LITTLE_ENDIAN__
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/* We only need the information about the first matching byte
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(i.e. the least significant matching byte) to be exact,
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hence there is no problem with carry effects. */
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.Lfound_char:
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sub r3,r7,1
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bic r3,r3,r7
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norm r2,r3
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sub_s r0,r0,1
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asr_s r2,r2,3
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j_l.d [blink]
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sub_s r0,r0,r2
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.balign 4
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.Lfound0_ua:
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mov_l r3,r7
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.Lfound0:
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sub r3,r6,r3
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bic r3,r3,r6
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and r2,r3,r4
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or_s r12,r12,r2
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sub_s r3,r12,1
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bic_s r3,r3,r12
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norm r3,r3
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add_s r0,r0,3
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asr_s r12,r3,3
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asl.f 0,r2,r3
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sub_s r0,r0,r12
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j_s.d [blink]
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mov.pl r0,0
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#else /* BIG ENDIAN */
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.Lfound_char:
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lsr r7,r7,7
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bic r2,r7,r6
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.Lfound_char_b:
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norm r2,r2
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sub_s r0,r0,4
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asr_s r2,r2,3
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j_l.d [blink]
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add_s r0,r0,r2
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.Lfound0_ua:
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mov_s r3,r7
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.Lfound0:
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asl_s r2,r2,7
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or r7,r6,r4
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bic_s r12,r12,r2
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sub r2,r7,r3
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or r2,r2,r6
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bic r12,r2,r12
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bic.f r3,r4,r12
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norm r3,r3
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add.pl r3,r3,1
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asr_s r12,r3,3
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asl.f 0,r2,r3
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add_s r0,r0,r12
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j_s.d [blink]
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mov.mi r0,0
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#endif /* ENDIAN */
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ENDFUNC (strchr)
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#endif /* (__ARC700__ || __ARCEM__ || __ARCHS__) && __ARC_NORM__
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&& __ARC_BARREL_SHIFTER__ */
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#endif /* !__OPTIMIZE_SIZE__ && !PREFER_SIZE_OVER_SPEED */
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