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https://github.com/autc04/Retro68.git
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117 lines
3.2 KiB
ArmAsm
117 lines
3.2 KiB
ArmAsm
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/*
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Copyright (c) 2015, Synopsys, Inc. All rights reserved.
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Redistribution and use in source and binary forms, with or without
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modification, are permitted provided that the following conditions are met:
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1) Redistributions of source code must retain the above copyright notice,
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this list of conditions and the following disclaimer.
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2) Redistributions in binary form must reproduce the above copyright notice,
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this list of conditions and the following disclaimer in the documentation
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and/or other materials provided with the distribution.
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3) Neither the name of the Synopsys, Inc., nor the names of its contributors
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may be used to endorse or promote products derived from this software
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without specific prior written permission.
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THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
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LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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POSSIBILITY OF SUCH DAMAGE.
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*/
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/* This implementation is optimized for performance. For code size a generic
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implementation of this function from newlib/libc/string/strlen.c will be
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used. */
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#if !defined (__OPTIMIZE_SIZE__) && !defined (PREFER_SIZE_OVER_SPEED)
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#include "asm.h"
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#if (defined (__ARC700__) || defined (__ARCEM__) || defined (__ARCHS__)) \
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&& defined (__ARC_NORM__) && defined (__ARC_BARREL_SHIFTER__)
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ENTRY (strlen)
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or r3,r0,7
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ld r2,[r3,-7]
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ld.a r6,[r3,-3]
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mov r4,0x01010101
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; uses long immediate
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#ifdef __LITTLE_ENDIAN__
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asl_s r1,r0,3
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btst_s r0,2
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asl r7,r4,r1
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ror r5,r4
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sub r1,r2,r7
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bic_s r1,r1,r2
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mov.eq r7,r4
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sub r12,r6,r7
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bic r12,r12,r6
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or.eq r12,r12,r1
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and r12,r12,r5
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brne r12,0,.Learly_end
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#else /* BIG ENDIAN */
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ror r5,r4
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btst_s r0,2
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mov_s r1,31
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sub3 r7,r1,r0
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sub r1,r2,r4
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bic_s r1,r1,r2
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bmsk r1,r1,r7
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sub r12,r6,r4
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bic r12,r12,r6
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bmsk.ne r12,r12,r7
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or.eq r12,r12,r1
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and r12,r12,r5
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brne r12,0,.Learly_end
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#endif /* ENDIAN */
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.Loop:
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ld_s r2,[r3,4]
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ld.a r6,[r3,8]
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; stall for load result
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sub r1,r2,r4
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bic_s r1,r1,r2
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sub r12,r6,r4
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bic r12,r12,r6
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or_l r12,r12,r1
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and r12,r12,r5
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breq_l r12,0,.Loop
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.Lend:
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and.f r1,r1,r5
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sub.ne r3,r3,4
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mov.eq r1,r12
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#ifdef __LITTLE_ENDIAN__
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sub_s r2,r1,1
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bic_s r2,r2,r1
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norm r1,r2
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sub_s r0,r0,3
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lsr_s r1,r1,3
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sub r0,r3,r0
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j_s.d [blink]
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sub_l r0,r0,r1
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#else /* BIG ENDIAN */
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lsr_s r1,r1,7
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mov.eq r2,r6
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bic_s r1,r1,r2
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norm r1,r1
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sub r0,r3,r0
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lsr_s r1,r1,3
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j_s.d [blink]
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add_l r0,r0,r1
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#endif /* ENDIAN */
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.Learly_end:
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b.d .Lend
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sub_s.ne r1,r1,r1
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ENDFUNC (strlen)
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#endif /* (__ARC700__ || __ARCEM__ || __ARCHS__) && __ARC_NORM__
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&& __ARC_BARREL_SHIFTER__ */
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#endif /* !__OPTIMIZE_SIZE__ && !PREFER_SIZE_OVER_SPEED */
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