2017-10-07 00:16:47 +00:00
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/* Copyright (C) 2012-2017 Free Software Foundation, Inc.
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2012-03-27 23:13:14 +00:00
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This file is part of the GNU Transactional Memory Library (libitm).
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Libitm is free software; you can redistribute it and/or modify it
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under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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Libitm is distributed in the hope that it will be useful, but WITHOUT ANY
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WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
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FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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more details.
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Under Section 7 of GPL version 3, you are granted additional
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permissions described in the GCC Runtime Library Exception, version
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3.1, as published by the Free Software Foundation.
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You should have received a copy of the GNU General Public License and
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a copy of the GCC Runtime Library Exception along with this program;
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see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
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<http://www.gnu.org/licenses/>. */
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namespace GTM HIDDEN {
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typedef struct gtm_jmpbuf
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{
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void *cfa;
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unsigned long pc;
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} gtm_jmpbuf;
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/* The size of one line in hardware caches (in bytes). We use the primary
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cache line size documented for the UltraSPARC T1/T2. */
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#define HW_CACHELINE_SIZE 16
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static inline void
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cpu_relax (void)
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{
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__asm volatile ("rd %%ccr, %%g0" : : : "memory");
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}
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} // namespace GTM
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