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19 lines
933 B
Plaintext
19 lines
933 B
Plaintext
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# For most CPUs we have an assembly soft-float implementations.
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# However this is not true for ARMv6M. Here we want to use the soft-fp C
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# implementation. The soft-fp code is only build for ARMv6M. This pulls
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# in the asm implementation for other CPUs.
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LIB1ASMFUNCS += _udivsi3 _divsi3 _umodsi3 _modsi3 _dvmd_tls _bb_init_func \
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_call_via_rX _interwork_call_via_rX \
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_lshrdi3 _ashrdi3 _ashldi3 \
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_arm_negdf2 _arm_addsubdf3 _arm_muldivdf3 _arm_cmpdf2 _arm_unorddf2 \
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_arm_fixdfsi _arm_fixunsdfsi \
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_arm_truncdfsf2 _arm_negsf2 _arm_addsubsf3 _arm_muldivsf3 \
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_arm_cmpsf2 _arm_unordsf2 _arm_fixsfsi _arm_fixunssfsi \
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_arm_floatdidf _arm_floatdisf _arm_floatundidf _arm_floatundisf \
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_clzsi2 _clzdi2
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# Currently there is a bug somewhere in GCC's alias analysis
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# or scheduling code that is breaking _fpmul_parts in fp-bit.c.
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# Disabling function inlining is a workaround for this problem.
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HOST_LIBGCC2_CFLAGS += -fno-inline
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