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fix parameter passing for booleans
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@ -309,6 +309,9 @@ along with GCC; see the file COPYING3. If not see
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#define PREFERRED_STACK_BOUNDARY \
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#define PREFERRED_STACK_BOUNDARY \
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((TARGET_COLDFIRE || TARGET_FIDOA) ? 32 : 16)
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((TARGET_COLDFIRE || TARGET_FIDOA) ? 32 : 16)
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#define FUNCTION_ARG_PADDING(MODE, TYPE) upward
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/* No data type wants to be aligned rounder than this.
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/* No data type wants to be aligned rounder than this.
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Most published ABIs say that ints should be aligned on 16-bit
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Most published ABIs say that ints should be aligned on 16-bit
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boundaries, but CPUs with 32-bit busses get better performance
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boundaries, but CPUs with 32-bit busses get better performance
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@ -1110,12 +1110,26 @@
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move%.b %1,%0"
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move%.b %1,%0"
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[(set_attr "type" "clr,clr,move,move")])
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[(set_attr "type" "clr,clr,move,move")])
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(define_expand "pushqi1"
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; (define_expand "pushqi1"
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[(set (reg:SI SP_REG) (plus:SI (reg:SI SP_REG) (const_int -2)))
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; [(set (reg:SI SP_REG) (plus:SI (reg:SI SP_REG) (const_int -2)))
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(set (mem:QI (plus:SI (reg:SI SP_REG) (const_int 1)))
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; (set (mem:QI (reg:SI SP_REG) )
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(match_operand:QI 0 "general_operand" ""))]
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; (match_operand:QI 0 "general_operand" ""))]
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; "!TARGET_COLDFIRE"
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; "")
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; (define_insn "*pushqi1"
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; [(set (reg:SI SP_REG) (plus:SI (reg:SI SP_REG) (const_int -2)))
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; (set (mem:QI (reg:SI SP_REG) )
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; (match_operand:QI 0 "general_operand" ""))]
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; "!TARGET_COLDFIRE"
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; { return "move%.b %0,%-"; })
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(define_insn "*pushqi1"
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[
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(set (mem:QI (pre_modify:SI (reg:SI SP_REG) (plus:SI (reg:SI SP_REG) (const_int -2))))
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(match_operand:QI 0 "general_operand" "dmn"))]
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"!TARGET_COLDFIRE"
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"!TARGET_COLDFIRE"
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"")
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{ return "move%.b %0,%-"; })
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(define_expand "reload_insf"
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(define_expand "reload_insf"
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[(set (match_operand:SF 0 "nonimmediate_operand" "=f")
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[(set (match_operand:SF 0 "nonimmediate_operand" "=f")
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