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https://github.com/autc04/Retro68.git
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m68k: uppercase pascal functions for linking
This commit is contained in:
Wolfgang Thaller
parent
fe6f08fd7f
commit
4d0f9e202c
@ -65,6 +65,7 @@ along with GCC; see the file COPYING3. If not see
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#include "optabs.h"
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#include "builtins.h"
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#include "rtl-iter.h"
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#include "stringpool.h"
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/* This file should be included last. */
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#include "target-def.h"
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@ -191,6 +192,7 @@ static bool m68k_cannot_force_const_mem (machine_mode mode, rtx x);
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static bool m68k_output_addr_const_extra (FILE *, rtx);
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static void m68k_init_sync_libfuncs (void) ATTRIBUTE_UNUSED;
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static tree m68k_mangle_decl_assembler_name (tree decl, tree id);
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/* Initialize the GCC target structure. */
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@ -335,6 +337,9 @@ static void m68k_init_sync_libfuncs (void) ATTRIBUTE_UNUSED;
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#undef TARGET_FUNCTION_VALUE
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#define TARGET_FUNCTION_VALUE m68k_function_value
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#undef TARGET_MANGLE_DECL_ASSEMBLER_NAME
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#define TARGET_MANGLE_DECL_ASSEMBLER_NAME m68k_mangle_decl_assembler_name
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static const struct attribute_spec m68k_attribute_table[] =
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{
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/* { name, min_len, max_len, decl_req, type_req, fn_type_req, handler,
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@ -344,11 +349,11 @@ static const struct attribute_spec m68k_attribute_table[] =
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/* Stdcall attribute says callee is responsible for popping arguments
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if they are not variable. */
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{ "pascal", 0, 0, false, true, true, m68k_handle_fndecl_attribute,
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true },
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true },
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{ "regparam", 1, 1, false, true, true, m68k_handle_fndecl_attribute,
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true },
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{ "raw_inline", 1, 32, false, true, true, m68k_handle_fndecl_attribute,
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false },
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false },
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{ "interrupt_handler", 0, 0, true, false, false,
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m68k_handle_fndecl_attribute, false },
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{ "interrupt_thread", 0, 0, true, false, false,
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@ -746,7 +751,7 @@ m68k_get_function_kind (tree func)
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tree a;
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gcc_assert (TREE_CODE (func) == FUNCTION_DECL);
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a = lookup_attribute ("interrupt", DECL_ATTRIBUTES (func));
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if (a != NULL_TREE)
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return m68k_fk_interrupt_handler;
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@ -1348,14 +1353,14 @@ m68k_expand_epilogue (bool sibcall_p)
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emit_jump_insn (ret_rtx);
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}
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/* Return true if X is a valid comparison operator for the dbcc
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instruction.
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/* Return true if X is a valid comparison operator for the dbcc
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instruction.
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Note it rejects floating point comparison operators.
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(In the future we could use Fdbcc).
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It also rejects some comparisons when CC_NO_OVERFLOW is set. */
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int
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valid_dbcc_comparison_p_2 (rtx x, machine_mode mode ATTRIBUTE_UNUSED)
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{
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@ -1412,7 +1417,7 @@ static bool
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m68k_ok_for_sibcall_p (tree decl, tree exp)
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{
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enum m68k_function_kind kind;
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/* We cannot use sibcalls for nested functions because we use the
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static chain register for indirect calls. */
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if (CALL_EXPR_STATIC_CHAIN (exp))
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@ -1451,14 +1456,14 @@ m68k_ok_for_sibcall_p (tree decl, tree exp)
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the same. */
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if (decl && m68k_get_function_kind (decl) == kind)
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return true;
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return false;
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}
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/* On the m68k all args are always pushed - NOT. */
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void m68k_init_cumulative_args (CUMULATIVE_ARGS *cum,
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const_tree fntype,
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void m68k_init_cumulative_args (CUMULATIVE_ARGS *cum,
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const_tree fntype,
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rtx libname ATTRIBUTE_UNUSED,
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const_tree fndecl,
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int n_named_args)
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@ -1679,8 +1684,8 @@ m68k_legitimize_address (rtx x, rtx oldx, machine_mode mode)
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return x;
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}
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/* Output a dbCC; jCC sequence. Note we do not handle the
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/* Output a dbCC; jCC sequence. Note we do not handle the
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floating point version of this sequence (Fdbcc). We also
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do not handle alternative conditions when CC_NO_OVERFLOW is
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set. It is assumed that valid_dbcc_comparison_p and flags_in_68881 will
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@ -2529,19 +2534,19 @@ m68k_wrap_symbol_into_got_ref (rtx x, enum m68k_reloc reloc, rtx temp_reg)
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/* Legitimize PIC addresses. If the address is already
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position-independent, we return ORIG. Newly generated
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position-independent addresses go to REG. If we need more
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than one register, we lose.
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than one register, we lose.
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An address is legitimized by making an indirect reference
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through the Global Offset Table with the name of the symbol
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used as an offset.
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used as an offset.
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The assembler and linker are responsible for placing the
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The assembler and linker are responsible for placing the
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address of the symbol in the GOT. The function prologue
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is responsible for initializing a5 to the starting address
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of the GOT.
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The assembler is also responsible for translating a symbol name
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into a constant displacement from the start of the GOT.
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into a constant displacement from the start of the GOT.
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A quick example may make things a little clearer:
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@ -2561,9 +2566,9 @@ m68k_wrap_symbol_into_got_ref (rtx x, enum m68k_reloc reloc, rtx temp_reg)
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movel a5@(_foo:w), a0
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movel #12345, a0@
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That (in a nutshell) is how *all* symbol and label references are
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That (in a nutshell) is how *all* symbol and label references are
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handled. */
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rtx
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@ -2592,7 +2597,7 @@ legitimize_pic_address (rtx orig, machine_mode mode ATTRIBUTE_UNUSED,
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/* legitimize both operands of the PLUS */
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gcc_assert (GET_CODE (XEXP (orig, 0)) == PLUS);
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base = legitimize_pic_address (XEXP (XEXP (orig, 0), 0), Pmode, reg);
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orig = legitimize_pic_address (XEXP (XEXP (orig, 0), 1), Pmode,
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base == reg ? 0 : reg);
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@ -2654,13 +2659,13 @@ m68k_call_tls_get_addr (rtx x, rtx eqv, enum m68k_reloc reloc)
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is the simpliest way of generating a call. The difference between
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__tls_get_addr() and libcall is that the result is returned in D0
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instead of A0. To workaround this, we use m68k_libcall_value_in_a0_p
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which temporarily switches returning the result to A0. */
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which temporarily switches returning the result to A0. */
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m68k_libcall_value_in_a0_p = true;
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a0 = emit_library_call_value (m68k_get_tls_get_addr (), NULL_RTX, LCT_PURE,
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Pmode, 1, x, Pmode);
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m68k_libcall_value_in_a0_p = false;
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insns = get_insns ();
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end_sequence ();
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@ -2688,7 +2693,7 @@ m68k_get_m68k_read_tp (void)
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/* Emit instruction sequence that calls __m68k_read_tp.
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A pseudo register with result of __m68k_read_tp call is returned. */
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static rtx
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static rtx
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m68k_call_m68k_read_tp (void)
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{
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rtx a0;
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@ -2702,7 +2707,7 @@ m68k_call_m68k_read_tp (void)
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is the simpliest way of generating a call. The difference between
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__m68k_read_tp() and libcall is that the result is returned in D0
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instead of A0. To workaround this, we use m68k_libcall_value_in_a0_p
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which temporarily switches returning the result to A0. */
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which temporarily switches returning the result to A0. */
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/* Emit the call sequence. */
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m68k_libcall_value_in_a0_p = true;
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@ -2741,7 +2746,7 @@ m68k_legitimize_tls_address (rtx orig)
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rtx eqv;
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rtx a0;
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rtx x;
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/* Attach a unique REG_EQUIV, to allow the RTL optimizers to
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share the LDM result with other LD model accesses. */
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eqv = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, const0_rtx),
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@ -3211,7 +3216,7 @@ output_move_qimode (rtx *operands)
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{
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/* 68k family always modifies the stack pointer by at least 2, even for
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byte pushes. The 5200 (ColdFire) does not do this. */
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/* This case is generated by pushqi1 pattern now. */
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gcc_assert (!(GET_CODE (operands[0]) == MEM
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&& GET_CODE (XEXP (operands[0], 0)) == PRE_DEC
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@ -4265,13 +4270,13 @@ notice_update_cc (rtx exp, rtx insn)
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if (GET_CODE (exp) == SET)
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{
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if (GET_CODE (SET_SRC (exp)) == CALL)
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CC_STATUS_INIT;
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CC_STATUS_INIT;
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else if (ADDRESS_REG_P (SET_DEST (exp)))
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{
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if (cc_status.value1 && modified_in_p (cc_status.value1, insn))
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cc_status.value1 = 0;
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if (cc_status.value2 && modified_in_p (cc_status.value2, insn))
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cc_status.value2 = 0;
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cc_status.value2 = 0;
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}
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/* fmoves to memory or data registers do not set the condition
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codes. Normal moves _do_ set the condition codes, but not in
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@ -4285,7 +4290,7 @@ notice_update_cc (rtx exp, rtx insn)
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&& (FP_REG_P (SET_SRC (exp))
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|| GET_CODE (SET_SRC (exp)) == FIX
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|| FLOAT_MODE_P (GET_MODE (SET_DEST (exp)))))
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CC_STATUS_INIT;
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CC_STATUS_INIT;
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/* A pair of move insns doesn't produce a useful overall cc. */
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else if (!FP_REG_P (SET_DEST (exp))
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&& !FP_REG_P (SET_SRC (exp))
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@ -4293,7 +4298,7 @@ notice_update_cc (rtx exp, rtx insn)
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&& (GET_CODE (SET_SRC (exp)) == REG
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|| GET_CODE (SET_SRC (exp)) == MEM
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|| GET_CODE (SET_SRC (exp)) == CONST_DOUBLE))
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CC_STATUS_INIT;
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CC_STATUS_INIT;
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else if (SET_DEST (exp) != pc_rtx)
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{
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cc_status.flags = 0;
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@ -4342,7 +4347,7 @@ notice_update_cc (rtx exp, rtx insn)
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ends with a move insn moving r2 in r2's mode.
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Thus, the cc's are set for r2.
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This can set N bit spuriously. */
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cc_status.flags |= CC_NOT_NEGATIVE;
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cc_status.flags |= CC_NOT_NEGATIVE;
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default:
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break;
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@ -4407,7 +4412,7 @@ output_move_const_single (rtx *operands)
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to get the desired constant. */
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/* This code has been fixed for cross-compilation. */
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static int inited_68881_table = 0;
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static const char *const strings_68881[7] = {
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@ -4475,7 +4480,7 @@ standard_68881_constant_p (rtx x)
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if (real_identical (r, &values_68881[i]))
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return (codes_68881[i]);
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}
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if (GET_MODE (x) == SFmode)
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return 0;
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@ -4760,7 +4765,7 @@ m68k_delegitimize_address (rtx orig_x)
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unspec = XEXP (addr.offset, 0);
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if (GET_CODE (unspec) == PLUS && CONST_INT_P (XEXP (unspec, 1)))
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unspec = XEXP (unspec, 0);
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if (GET_CODE (unspec) != UNSPEC
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if (GET_CODE (unspec) != UNSPEC
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|| (XINT (unspec, 1) != UNSPEC_RELOC16
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&& XINT (unspec, 1) != UNSPEC_RELOC32))
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return orig_x;
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@ -4781,7 +4786,7 @@ m68k_delegitimize_address (rtx orig_x)
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x = replace_equiv_address_nv (orig_x, x);
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return x;
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}
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/* A C compound statement to output to stdio stream STREAM the
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assembler syntax for an instruction operand that is a memory
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@ -4795,7 +4800,7 @@ m68k_delegitimize_address (rtx orig_x)
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It is possible for PIC to generate a (plus (label_ref...) (reg...))
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and we handle that just like we would a (plus (symbol_ref...) (reg...)).
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This routine is responsible for distinguishing between -fpic and -fPIC
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This routine is responsible for distinguishing between -fpic and -fPIC
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style relocations in an address. When generating -fpic code the
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offset is output in word mode (e.g. movel a5@(_foo:w), a0). When generating
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-fPIC code the offset is output in long mode (e.g. movel a5@(_foo:l), a0) */
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@ -6228,7 +6233,7 @@ m68k_sched_variable_issue (FILE *sched_dump ATTRIBUTE_UNUSED,
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case CPU_CFV3:
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insn_size = sched_get_attr_size_int (insn);
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/* ColdFire V3 and V4 cores have instruction buffers that can
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accumulate up to 8 instructions regardless of instructions'
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sizes. So we should take care not to "prefetch" 24 one-word
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@ -6732,6 +6737,34 @@ m68k_write_macsbug_name(FILE *file, const char *name)
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fprintf(file, "\t.align 2,0\n\t.short 0\n");
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}
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static tree
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m68k_mangle_decl_assembler_name (tree decl, tree id)
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{
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tree new_id = NULL_TREE;
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if (TREE_CODE (decl) == FUNCTION_DECL)
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{
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tree attrs = TYPE_ATTRIBUTES ( TREE_TYPE(decl) );
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if (attrs != NULL_TREE)
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{
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if (lookup_attribute ("pascal", attrs))
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{
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const char *old_str = IDENTIFIER_POINTER (id != NULL_TREE ? id : DECL_NAME (decl));
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char *new_str, *p;
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int len = strlen(old_str);
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new_str = XALLOCAVEC (char, 1 + len);
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for(int i = 0; i < len; i++)
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new_str[i] = TOUPPER(old_str[i]);
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new_str[len] = 0;
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return get_identifier (new_str);
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}
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}
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}
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return id;
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}
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