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453 lines
12 KiB
ArmAsm
453 lines
12 KiB
ArmAsm
;@(#)signal.s 2.15 90/10/14 21:57:55, AMD
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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; Copyright 1990 Advanced Micro Devices, Inc.
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;
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; This software is the property of Advanced Micro Devices, Inc (AMD) which
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; specifically grants the user the right to modify, use and distribute this
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; software provided this notice is not removed or altered. All other rights
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; are reserved by AMD.
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;
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; AMD MAKES NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, WITH REGARD TO THIS
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; SOFTWARE. IN NO EVENT SHALL AMD BE LIABLE FOR INCIDENTAL OR CONSEQUENTIAL
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; DAMAGES IN CONNECTION WITH OR ARISING FROM THE FURNISHING, PERFORMANCE, OR
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; USE OF THIS SOFTWARE.
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;
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; So that all may benefit from your experience, please report any problems
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; or suggestions about this software to the 29K Technical Support Center at
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; 800-29-29-AMD (800-292-9263) in the USA, or 0800-89-1131 in the UK, or
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; 0031-11-1129 in Japan, toll free. The direct dial number is 512-462-4118.
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;
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; Advanced Micro Devices, Inc.
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; 29K Support Products
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; Mail Stop 573
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; 5900 E. Ben White Blvd.
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; Austin, TX 78741
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; 800-292-9263
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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.file "signal.s"
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; SigEntry is the address of an array of C-level user code signal handlers.
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; They must return to the top-level before doing a sigret() return function.
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; Nested signals are supported.
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.extern V_SPILL, V_FILL
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.extern fill ; In crt0.s
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.align 4
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.comm WindowSize, 4
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.data
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SigEntry:
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.word 0 ; reserved
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.word 0 ; adds. of #2 SIGINT handler
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.word 0 ; reserved
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.word 0 ; reserved
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.word 0 ; reserved
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.word 0 ; reserved
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.word 0 ; reserved
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.word 0 ; adds. of #8 SIGFPE handler
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.text
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.reg v0, gr96
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.reg v1, gr97
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.reg v2, gr98
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.reg v3, gr99
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.reg tav, gr121
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.reg tpc, gr122
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.reg lrp, gr123
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.reg slp, gr124
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.reg msp, gr125
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.reg rab, gr126
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.reg rfb, gr127
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;=================================================================== setjmp()
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; int
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; setjmp(label_t jmpbuf)
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; {
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; *jmpbuf = {gr1, msp, lr0, lr1};
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; return 0;
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; }
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;
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.global _setjmp
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_setjmp:
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store 0, 0, gr1, lr2
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add lr2, lr2, 4
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store 0, 0, msp, lr2
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add lr2, lr2, 4
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store 0, 0, lr0, lr2
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add lr2, lr2, 4
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store 0, 0, lr1, lr2
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jmpi lr0
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const v0, 0
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;
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;==================================================================== longjmp()
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; int
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; longjmp(label_t jmpbuf, int value)
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; {
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; /* BUG: check for this
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; if (msp > jmpbuf->msp || gr1 > jmpbuf->gr1)
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; longjmperror();
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; */
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;
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; gr1 = jmpbuf->gr1;
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; lr2addr = jmpbuf->gr1 + 8;
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; msp = jmpbuf->msp;
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;
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; /* saved lr1 is invalid if saved lr2addr > rfb */
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; if (lr2addr > rfb) {
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; /*
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; * None of the registers are useful.
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; * Set rfb to lr2addr - 512 & rab to rfb - 512.
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; * the FILL assert will take care of filling
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; */
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; lr1 = jmpbuf->lr1;
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; rab = lr2addr - windowsize;
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; rfb = lr2addr;
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; }
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;
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; lr0 = jmpbuf->lr0;
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; if (rfb < lr1)
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; raise V_FILL;
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; return value;
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; }
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;
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.global _longjmp
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_longjmp:
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load 0, 0, tav, lr2 ; copy in gr1
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add v1, lr2, 4 ; v1 points to msp
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; make sure we return a non-zero value
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cpeq v0, lr3, 0
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srl v0, v0, 31
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or v0, lr3, v0
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add gr1, tav, 0 ; now update gr1
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add tav, tav, 8 ; calculate lr2addr
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load 0, 0, msp, v1 ; update msp from jmpbuf
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cpleu v3, tav, rfb ; if (lr2addr > rfb)
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jmpt v3, $1 ; {
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add v1, v1, 4 ; v1 points to lr0
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add v2, v1, 4 ; v2 points to lr1
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load 0, 0, lr1, v2 ; lr1 = value from jmpbuf
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sub v3, rfb, rab ;
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sub rab, tav, v3 ; rab = lr2addr - windowsize
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add rfb, tav, 0 ; rfb = lr2addr
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$1: ; }
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load 0, 0, lr0, v1
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jmpi lr0
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asgeu V_FILL, rfb, lr1 ; may fill from rfb to lr1
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;
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;================================================================== sigcode
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; About to deliver a signal to a user mode signal handler.
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; msp+(15*4) = signal_number
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; msp+(14*4) = gr1
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; msp+(13*4) = rab
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; msp+(12*4) = PC0
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; msp+(11*4) = PC1
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; msp+(10*4) = PC2
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; msp+( 9*4) = CHA
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; msp+( 8*4) = CHD
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; msp+( 7*4) = CHC
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; msp+( 6*4) = ALU
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; msp+( 5*4) = OPS
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; msp+( 4*4) = gr121
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; msp+( 3*4) = gr99
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; msp+( 2*4) = gr98
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; msp+( 1*4) = gr97
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; msp = gr96
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; The state of all the registers (except for msp, chc and rab)
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; is the same as when the process was interrupted.
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;
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; We must make the stack and window consistent before calling the handler
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; The orignal rab value is on the stack. The interrupt handler placed
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; rfb-Windowsize in rab. This is required to support nested interrupts.
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;
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; Note that the window becomes incosistent only during certain
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; critical sections in spill, fill, longjmp and sigcode.
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; rfb - rab > windowsize => we are in spill
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; rfb - rab < windowsize => we are in fill
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; gr1 + 8 > rfb => we are in long-longjmp case
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; In case of spill, fill and lonjmp; rab is modified first,
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; so if we are in one of these critical sections,
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; we set rab to rfb - WINDOWSIZE.
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;
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.equ SIGCTX_SIZE, (16)*4
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.equ SIGCTX_SIGNUMB, (15)*4
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.equ SIGCTX_GR1_OFFSET, (14)*4
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.equ SIGCTX_RAB_OFFSET, (13)*4
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.equ SIGCTX_PC0_OFFSET, (12)*4
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.equ SIGCTX_PC1_OFFSET, (11)*4
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.equ SIGCTX_PC2_OFFSET, (10)*4
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.equ SIGCTX_CHC_OFFSET, (7)*4
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.equ SIGCTX_OPS_OFFSET, (5)*4
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.equ SIGCTX_TAV_OFFSET, (4)*4
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.global sigcode
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sigcode:
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; -------------------------------------------------------- R-Stack fixup
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const v0, WindowSize ; get register cache size
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consth v0, WindowSize
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load 0, 0, v0, v0
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add v2, msp, SIGCTX_RAB_OFFSET
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load 0, 0, v2, v2 ; get interrupted rab value
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sub v1, rfb, v2 ; determine if rfb-rab <= WINDOW_SIZE
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cpgeu v1, v1, v0 ;
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jmpt v1, nfill ; jmp if spill or 'normal' interrupt
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add v1, gr1, 8
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cpgt v1, v1, rfb ; interrupted longjmp can look like fill
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jmpf v1, nfill ; test for long-longjmp interruption
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nop ; jmp if gr1+8 <= rfb
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; Fixup signal stack to re-start interrupted fill
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; backup pc1 -- this is needed for the partial fill case.
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; Clear chc so an interrupted load/store does not restart.
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; Reset rab to a window distance below rfb, rab shall be
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; decremented again on re-starting the interrupted fill.
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; The interrupt handler set rab=rfb-WindowSize.
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;
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add v0, msp, SIGCTX_RAB_OFFSET
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store 0, 0, rab, v0 ; re-store (rfb-WindowSize) for rab
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const v2, fill
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consth v2, fill
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add v0, msp, SIGCTX_PC1_OFFSET
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store 0, 0, v2, v0
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sub v2, v2, 4 ; determine pc0
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add v0, msp, SIGCTX_PC0_OFFSET
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store 0, 0, v2, v0
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const v2, 0 ; clear chc
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add v0, msp, SIGCTX_CHC_OFFSET
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store 0, 0, v2, v0
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nfill:
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cpgt v0, gr1, rfb ; if gr1 > rfb then gr1 = rfb
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jmpt v0, lower
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cplt v0, gr1, rab ; if gr1 < rab then gr1 = rab
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jmpt v0, raise
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nop
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; -------------------------------------------------------- save_regs
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sig1: sub msp, msp, (4+2+25)*4 ; reserve space for regs
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mfsr gr96, ipc
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mfsr gr97, ipa
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mfsr gr98, ipb
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mfsr gr99, q
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mtsrim cr, 4-1
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storem 0, 0, gr96, msp
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; "push" registers stack support
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add gr96, lr1, 0
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add gr97, rfb, 0
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mtsrim cr, 2-1
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add gr99, msp, 2*4
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storem 0, 0, gr96, gr99
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; "push" remaining global registers
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mtsrim cr, 25-1 ; gr100-gr124
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add gr96, msp, (4+2)*4
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storem 0, 0, gr100, gr96
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;
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; -------------------------------------------------------- Dummy Call
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.equ RALLOC, 4*4 ; make space for function calls
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add v0, rfb, 0 ; store original rfb
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sub gr1, gr1, RALLOC
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asgeu V_SPILL, gr1, rab
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add lr1, v0, 0 ; set lr1 = original rfb
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add v1, msp, (4+2+25)*4 + SIGCTX_SIGNUMB
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load 0, 0, lr2, v1 ; restore signal number
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sub v1, lr2, 1 ; get handler index
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sll v1, v1, 2 ; point to addresses
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;
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; -------------------------------------------------------- call C-level
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; Handler must not use HIF services other than the _sigret() type.
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const v0, SigEntry
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consth v0, SigEntry
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add v0, v0, v1
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load 0, 0, v0, v0 ; determine if handler registered
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cpeq v1, v0, 0
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jmpt v1, NoHandler
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nop
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calli lr0, v0 ; call C-level signal handler
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nop
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;
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; -------------------------------------------------------- default return
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NoHandler:
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jmp __sigdfl
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nop
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; -------------------------------------------------------- support bits
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lower: sll gr1, rfb, 0
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jmp sig1
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nop
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raise: sll gr1, rab, 0
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jmp sig1
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nop
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/*
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; -------------------------------------------------------- repair_regs
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mtsrim cr, 4-1
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loadm 0, 0, gr96, msp
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mtsr ipc, gr96
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mtsr ipa, gr97
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mtsr ipb, gr98
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mtsr Q, gr99
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; "pop" registers stack support
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mtsrim cr, 2-1
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add gr99, msp, 2*4
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loadm 0, 0, gr96, gr99
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add lr1, gr96, 0
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add rfb, gr97, 0
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; "pop" remaining global registers
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mtsrim cr, 25-1 ; gr100-gr124
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add gr96, msp, (4+2)*4
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loadm 0, 0, gr100, gr96
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add msp, msp, (4+2+25)*4 ; repair msp to save_regs entry value
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; -------------------------------------------------------- end repair
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*/
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; ======================================================== _sigret()
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.global __sigret
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__sigret:
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; repair_regs
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; -------------------------------------------------------- repair_regs
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mtsrim cr, 4-1
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loadm 0, 0, gr96, msp
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mtsr ipc, gr96
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mtsr ipa, gr97
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mtsr ipb, gr98
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mtsr q, gr99
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; "pop" registers stack support
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mtsrim cr, 2-1
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add gr99, msp, 2*4
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loadm 0, 0, gr96, gr99
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add lr1, gr96, 0
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add rfb, gr97, 0
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; "pop" remaining global registers
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mtsrim cr, 25-1 ; gr100-gr124
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add gr96, msp, (4+2)*4
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loadm 0, 0, gr100, gr96
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add msp, msp, (4+2+25)*4 ; repair msp to save_regs entry value
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; -------------------------------------------------------- end repair
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const tav, 323 ; HIF _sigret
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asneq 69, gr1,gr1
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halt ; commit suicide if returns
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; ======================================================== _sigdfl()
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.global __sigdfl
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__sigdfl:
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; repair_regs
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; -------------------------------------------------------- repair_regs
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mtsrim cr, 4-1
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loadm 0, 0, gr96, msp
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mtsr ipc, gr96
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mtsr ipa, gr97
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mtsr ipb, gr98
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mtsr q, gr99
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; "pop" registers stack support
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mtsrim cr, 2-1
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add gr99, msp, 2*4
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loadm 0, 0, gr96, gr99
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add lr1, gr96, 0
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add rfb, gr97, 0
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; "pop" remaining global registers
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mtsrim cr, 25-1 ; gr100-gr124
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add gr96, msp, (4+2)*4
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loadm 0, 0, gr100, gr96
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add msp, msp, (4+2+25)*4 ; repair msp to save_regs entry value
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; -------------------------------------------------------- end repair
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const tav, 322 ; HIF _sigdfl
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asneq 69, gr1,gr1
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halt ; commit suicide if returns
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; ======================================================== _sigrep()
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__sigrep:
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.global __sigrep
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; repair_regs
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; -------------------------------------------------------- repair_regs
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mtsrim cr, 4-1
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loadm 0, 0, gr96, msp
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mtsr ipc, gr96
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mtsr ipa, gr97
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mtsr ipb, gr98
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mtsr q, gr99
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; "pop" registers stack support
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mtsrim cr, 2-1
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add gr99, msp, 2*4
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loadm 0, 0, gr96, gr99
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add lr1, gr96, 0
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add rfb, gr97, 0
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; "pop" remaining global registers
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mtsrim cr, 25-1 ; gr100-gr124
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add gr96, msp, (4+2)*4
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loadm 0, 0, gr100, gr96
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add msp, msp, (4+2+25)*4 ; repair msp to save_regs entry value
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; -------------------------------------------------------- end repair
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const tav, 324 ; HIF _sigrep
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asneq 69, gr1,gr1
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halt ; commit suicide if returns
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; ======================================================== _sigskp()
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.global __sigskp
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__sigskp:
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; repair_regs
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; -------------------------------------------------------- repair_regs
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mtsrim cr, 4-1
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loadm 0, 0, gr96, msp
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mtsr ipc, gr96
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mtsr ipa, gr97
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mtsr ipb, gr98
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mtsr q, gr99
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; "pop" registers stack support
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mtsrim cr, 2-1
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add gr99, msp, 2*4
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loadm 0, 0, gr96, gr99
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add lr1, gr96, 0
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add rfb, gr97, 0
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; "pop" remaining global registers
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mtsrim cr, 25-1 ; gr100-gr124
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add gr96, msp, (4+2)*4
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loadm 0, 0, gr100, gr96
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add msp, msp, (4+2+25)*4 ; repair msp to save_regs entry value
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; -------------------------------------------------------- end repair
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const tav, 325 ; HIF _sigskp
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asneq 69, gr1,gr1
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halt ; commit suicide if returns
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; ======================================================== _sendsig()
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; lr2 = signal number
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.global _raise
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.global __sendsig
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_raise:
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__sendsig:
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const tav, 326 ; HIF sendsig
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asneq 69, gr1,gr1
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jmpi lr0
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nop
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;
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; ======================================================== signal()
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; lr2 = signal number
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; lr3 = handler address
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.global _signal
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_signal:
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; the memory variable WindowSize must be initalised at the
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; start when rfb and rab are a window size apart.
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const v0, WindowSize ; get register cache size
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consth v0, WindowSize
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load 0, 0, v1, v0
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cpeq v1, v1, 0
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jmpf v1, WindowSizeOK
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sub v1, rfb, rab ; rfb-rab = WINDOW_SIZE
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store 0, 0, v1, v0
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WindowSizeOK:
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const v1, SigEntry
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consth v1, SigEntry
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sub v3, lr2, 1 ; get handler index
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sll v3, v3, 2 ; pointer to addresses
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add v1, v1, v3
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store 0,0, lr3, v1 ; save new handler
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const lr2, sigcode
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consth lr2, sigcode
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;Fall through to __signal
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; ======================================================== _signal()
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.global __signal
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__signal:
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const tav, 321 ; HIF signal
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asneq 69, gr1,gr1
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jmpi lr0
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nop
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