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78 lines
2.0 KiB
ArmAsm
78 lines
2.0 KiB
ArmAsm
/* Signed 32 bit division optimized for Epiphany.
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Copyright (C) 2009-2016 Free Software Foundation, Inc.
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Contributed by Embecosm on behalf of Adapteva, Inc.
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This file is part of GCC.
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This file is free software; you can redistribute it and/or modify it
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under the terms of the GNU General Public License as published by the
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Free Software Foundation; either version 3, or (at your option) any
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later version.
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This file is distributed in the hope that it will be useful, but
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WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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General Public License for more details.
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Under Section 7 of GPL version 3, you are granted additional
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permissions described in the GCC Runtime Library Exception, version
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3.1, as published by the Free Software Foundation.
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You should have received a copy of the GNU General Public License and
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a copy of the GCC Runtime Library Exception along with this program;
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see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
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<http://www.gnu.org/licenses/>. */
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#include "epiphany-asm.h"
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FSTAB (__divsi3,T_UINT)
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.global SYM(__divsi3)
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.balign 4
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HIDDEN_FUNC(__divsi3)
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SYM(__divsi3):
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float TMP2,r0
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mov TMP4,0
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float TMP1,r1
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sub TMP0,TMP4,r0
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beq .Lret_r0
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movgt r0,TMP0
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sub TMP0,TMP4,r1
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movgt r1,TMP0
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mov TMP0,1
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sub TMP2,TMP2,TMP1
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asr TMP3,TMP2,31 ; save sign
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lsl TMP2,TMP2,1
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blt .Lret0
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sub TMP1,TMP2,1 ; rounding compensation, avoid overflow
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movgte TMP2,TMP1
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lsr TMP2,TMP2,24
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lsl r1,r1,TMP2
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lsl TMP0,TMP0,TMP2
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sub TMP1,r0,r1
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movgteu r0,TMP1
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movgteu TMP4,TMP0
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lsl TMP5,TMP0,1
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sub TMP1,r0,r1
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movgteu r0,TMP1
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movgteu TMP4,TMP5
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sub TMP1,r1,1
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mov r1,%low(.L0step)
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movt r1,%high(.L0step)
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lsl TMP2,TMP2,3
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sub r1,r1,TMP2
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jr r1
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.rep 30
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lsl r0,r0,1
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sub.l r1,r0,TMP1
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movgteu r0,r1
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.endr
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.L0step:sub r1,TMP0,1 ; mask result bits from steps ...
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and r0,r0,r1
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orr r0,r0,TMP4 ; ... and combine with first bit.
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eor r0,r0,TMP3 ; restore sign
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sub r0,r0,TMP3
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.Lret_r0:rts
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.Lret0: mov r0,0
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rts
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ENDFUNC(__divsi3)
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