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345 lines
7.9 KiB
ArmAsm
345 lines
7.9 KiB
ArmAsm
/* Copyright (C) 2008-2017 Free Software Foundation, Inc.
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Contributor: Joern Rennecke <joern.rennecke@embecosm.com>
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on behalf of Synopsys Inc.
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This file is part of GCC.
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GCC is free software; you can redistribute it and/or modify it under
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the terms of the GNU General Public License as published by the Free
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Software Foundation; either version 3, or (at your option) any later
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version.
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GCC is distributed in the hope that it will be useful, but WITHOUT ANY
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WARRANTY; without even the implied warranty of MERCHANTABILITY or
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FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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for more details.
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Under Section 7 of GPL version 3, you are granted additional
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permissions described in the GCC Runtime Library Exception, version
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3.1, as published by the Free Software Foundation.
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You should have received a copy of the GNU General Public License and
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a copy of the GCC Runtime Library Exception along with this program;
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see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
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<http://www.gnu.org/licenses/>. */
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#include "arc-ieee-754.h"
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#if 0 /* DEBUG */
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.global __addsf3
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FUNC(__addsf3)
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.balign 4
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__addsf3:
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push_s blink
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push_s r1
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bl.d __addsf3_c
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push_s r0
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ld_s r1,[sp,4]
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st_s r0,[sp,4]
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bl.d __addsf3_asm
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pop_s r0
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pop_s r1
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pop_s blink
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cmp r0,r1
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jeq_s [blink]
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bl abort
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ENDFUNC(__addsf3)
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.global __subsf3
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FUNC(__subsf3)
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.balign 4
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__subsf3:
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push_s blink
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push_s r1
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bl.d __subsf3_c
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push_s r0
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ld_s r1,[sp,4]
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st_s r0,[sp,4]
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bl.d __subsf3_asm
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pop_s r0
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pop_s r1
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pop_s blink
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cmp r0,r1
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jeq_s [blink]
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bl abort
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ENDFUNC(__subsf3)
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#define __addsf3 __addsf3_asm
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#define __subsf3 __subsf3_asm
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#endif /* DEBUG */
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/* N.B. This is optimized for ARC700.
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ARC600 has very different scheduling / instruction selection criteria. */
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/* inputs: r0, r1
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output: r0
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clobber: r1-r10, r12, flags */
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.balign 4
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.global __addsf3
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.global __subsf3
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FUNC(__addsf3)
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FUNC(__subsf3)
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.long 0x7f800000 ; exponent mask
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__subsf3:
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bxor_l r1,r1,31
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__addsf3:
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ld r9,[pcl,-8]
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bmsk r4,r0,30
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xor r10,r0,r1
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and r6,r1,r9
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sub.f r12,r4,r6
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asr_s r12,r12,23
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blo .Ldbl1_gt
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brhs r4,r9,.Linf_nan
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brne r12,0,.Lsmall_shift
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brge r10,0,.Ladd_same_exp ; r12 == 0
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/* After subtracting, we need to normalize; when shifting to place the
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leading 1 into position for the implicit 1 and adding that to DBL0,
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we increment the exponent. Thus, we have to subtract one more than
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the shift count from the exponent beforehand. Iff the exponent drops thus
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below zero (before adding in the fraction with the leading one), we have
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generated a denormal number. Denormal handling is basicallly reducing the
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shift count so that we produce a zero exponent instead; FWIW, this way
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the shift count can become zero (if we started out with exponent 1).
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On the plus side, we don't need to check for denorm input, the result
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of subtracing these looks just the same as denormals generated during
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subtraction. */
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bmsk r7,r1,30
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breq r4,r7,.Lret0
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sub.f r5,r4,r7
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lsr r12,r4,23
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neg.cs r5,r5
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norm r3,r5
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bmsk r2,r0,22
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sub_s r3,r3,6
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min r12,r12,r3
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bic r1,r0,r2
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sub_s r3,r12,1
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asl_s r12,r12,23
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asl r2,r5,r3
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sub_s r1,r1,r12
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add_s r0,r1,r2
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j_s.d [blink]
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bxor.cs r0,r0,31
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.balign 4
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.Linf_nan:
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; If both inputs are inf, but with different signs, the result is NaN.
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asr r12,r10,31
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or_s r1,r1,r12
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j_s.d [blink]
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or.eq r0,r0,r1
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.balign 4
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.Ladd_same_exp:
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/* This is a special case because we can't test for need to shift
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down by checking if bit 23 of DBL0 changes. OTOH, here we know
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that we always need to shift down. */
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; adding the two floating point numbers together makes the sign
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; cancel out and apear as carry; the exponent is doubled, and the
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; fraction also in need of shifting left by one. The two implicit
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; ones of the sources make an implicit 1 of the result, again
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; non-existent in a place shifted by one.
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add.f r0,r0,r1
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btst_s r0,1
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breq r6,0,.Ldenorm_add
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add.ne r0,r0,1 ; round to even.
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rrc r0,r0
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bmsk r1,r9,23
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add r0,r0,r1 ; increment exponent
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bic.f 0,r9,r0; check for overflow -> infinity.
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jne_l [blink]
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mov_s r0,r9
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j_s.d [blink]
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bset.cs r0,r0,31
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.Ldenorm_add:
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j_s.d [blink]
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add r0,r4,r1
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.Lret_dbl0:
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j_s [blink]
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.balign 4
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.Lsmall_shift:
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brhi r12,25,.Lret_dbl0
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breq.d r6,0,.Ldenorm_small_shift
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bmsk_s r1,r1,22
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bset_s r1,r1,23
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.Lfixed_denorm_small_shift:
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neg r8,r12
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asl r5,r1,r8
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brge.d r10,0,.Ladd
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lsr_l r1,r1,r12
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/* subtract, abs(DBL0) > abs(DBL1) */
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/* DBL0: original values
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DBL1: fraction with explicit leading 1, shifted into place
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r4: orig. DBL0 & 0x7fffffff
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r6: orig. DBL1 & 0x7f800000
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r9: 0x7f800000
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r10: orig. DBL0H ^ DBL1H
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r5 : guard bits */
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.balign 4
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.Lsub:
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neg.f r12,r5
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bmsk r3,r0,22
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bset r5,r3,23
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sbc.f r4,r5,r1
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beq.d .Large_cancel_sub
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bic r7,r0,r3
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norm r3,r4
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bmsk r6,r7,30
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.Lsub_done:
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sub_s r3,r3,6
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breq r3,1,.Lsub_done_noshift
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asl r5,r3,23
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sub_l r3,r3,1
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brlo r6,r5,.Ldenorm_sub
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sub r0,r7,r5
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neg_s r1,r3
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lsr.f r2,r12,r1
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asl_s r12,r12,r3
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btst_s r2,0
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bmsk.eq.f r12,r12,30
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asl r5,r4,r3
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add_s r0,r0,r2
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adc.ne r0,r0,0
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j_s.d [blink]
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add_l r0,r0,r5
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.Lret0:
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j_s.d [blink]
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mov_l r0,0
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.balign 4
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.Ldenorm_small_shift:
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brne.d r12,1,.Lfixed_denorm_small_shift
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sub_s r12,r12,1
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brlt.d r10,0,.Lsub
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mov_s r5,r12 ; zero r5, and align following code
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.Ladd: ; Both bit 23 of DBL1 and bit 0 of r5 are clear.
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bmsk r2,r0,22
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add_s r2,r2,r1
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bbit0.d r2,23,.Lno_shiftdown
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add_s r0,r0,r1
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bic.f 0,r9,r0; check for overflow -> infinity; eq : infinity
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bmsk r1,r2,22
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lsr.ne.f r2,r2,2; cc: even ; hi: might round down
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lsr.ne r1,r1,1
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rcmp.hi r5,1; hi : round down
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bclr.hi r0,r0,0
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j_l.d [blink]
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sub_s r0,r0,r1
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/* r4: DBL0H & 0x7fffffff
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r6: DBL1H & 0x7f800000
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r9: 0x7f800000
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r10: sign difference
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r12: shift count (negative) */
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.balign 4
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.Ldbl1_gt:
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brhs r6,r9,.Lret_dbl1 ; inf or NaN
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neg r8,r12
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brhi r8,25,.Lret_dbl1
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.Lsmall_shift_dbl0:
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breq.d r6,0,.Ldenorm_small_shift_dbl0
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bmsk_s r0,r0,22
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bset_s r0,r0,23
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.Lfixed_denorm_small_shift_dbl0:
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asl r5,r0,r12
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brge.d r10,0,.Ladd_dbl1_gt
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lsr r0,r0,r8
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/* subtract, abs(DBL0) < abs(DBL1) */
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/* DBL0: fraction with explicit leading 1, shifted into place
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DBL1: original value
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r6: orig. DBL1 & 0x7f800000
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r9: 0x7f800000
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r5: guard bits */
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.balign 4
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.Lrsub:
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neg.f r12,r5
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bmsk r5,r1,22
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bic r7,r1,r5
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bset r5,r5,23
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sbc.f r4,r5,r0
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bne.d .Lsub_done ; note: r6 is already set up.
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norm r3,r4
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/* Fall through */
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/* r4:r12 : unnormalized result fraction
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r7: result sign and exponent */
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/* When seeing large cancellation, only the topmost guard bit might be set. */
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.balign 4
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.Large_cancel_sub:
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breq_s r12,0,.Lret0
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sub r0,r7,24<<23
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xor.f 0,r0,r7 ; test if exponent is negative
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tst.pl r9,r0 ; test if exponent is zero
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jpnz [blink] ; return if non-denormal result
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bmsk r6,r7,30
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lsr r3,r6,23
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xor r0,r6,r7
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sub_s r3,r3,24-22
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j_s.d [blink]
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bset r0,r0,r3
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; If a denorm is produced, we have an exact result -
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; no need for rounding.
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.balign 4
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.Ldenorm_sub:
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sub r3,r6,1
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lsr.f r3,r3,23
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xor r0,r6,r7
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neg_s r1,r3
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asl.ne r4,r4,r3
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lsr_s r12,r12,r1
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add_s r0,r0,r4
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j_s.d [blink]
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add.ne r0,r0,r12
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.balign 4
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.Lsub_done_noshift:
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add.f 0,r12,r12
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btst.eq r4,0
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bclr r4,r4,23
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add r0,r7,r4
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j_s.d [blink]
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adc.ne r0,r0,0
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.balign 4
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.Lno_shiftdown:
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add.f 0,r5,r5
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btst.eq r0,0
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cmp.eq r5,r5
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j_s.d [blink]
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add.cs r0,r0,1
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.Lret_dbl1:
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j_s.d [blink]
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mov_l r0,r1
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.balign 4
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.Ldenorm_small_shift_dbl0:
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sub.f r8,r8,1
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bne.d .Lfixed_denorm_small_shift_dbl0
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add_s r12,r12,1
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brlt.d r10,0,.Lrsub
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mov r5,0
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.Ladd_dbl1_gt: ; both bit 23 of DBL0 and bit 0 of r5 are clear.
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bmsk r2,r1,22
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add_s r2,r2,r0
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bbit0.d r2,23,.Lno_shiftdown_dbl1_gt
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add_s r0,r1,r0
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bic.f 0,r9,r0; check for overflow -> infinity; eq : infinity
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bmsk r1,r2,22
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lsr.ne.f r2,r2,2; cc: even ; hi: might round down
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lsr.ne r1,r1,1
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rcmp.hi r5,1; hi : round down
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bclr.hi r0,r0,0
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j_l.d [blink]
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sub_s r0,r0,r1
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.balign 4
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.Lno_shiftdown_dbl1_gt:
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add.f 0,r5,r5
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btst.eq r0,0
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cmp.eq r5,r5
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j_s.d [blink]
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add.cs r0,r0,1
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ENDFUNC(__addsf3)
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ENDFUNC(__subsf3)
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