mirror of
https://github.com/autc04/Retro68.git
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139 lines
2.6 KiB
Plaintext
139 lines
2.6 KiB
Plaintext
/* Example Linker Script for linking NS CR16 elf32 files.*/
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OUTPUT_FORMAT("elf32-cr16")
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OUTPUT_ARCH(cr16)
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/*
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The libh.a library includes various CR default handlers.
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The libsim.a library includes low-level functions, which
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are used as an interface to communicate with the simulator.
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*/
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GROUP(-lc -lsim -lh -lgcc)
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/*
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The next line forces the entry point (_start in this script)
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to be entered in the output file as an undefined symbol.
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It is needed in case the entry point is not called explicitly
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(which is the usual case) AND is in an archive.
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*/
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EXTERN(_start)
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ENTRY(_start)
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/* Define memory regions: Only RAM required for simulator */
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MEMORY
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{
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ram : ORIGIN = 0x2, LENGTH = 10M
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}
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SECTIONS
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{
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.init :
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{
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__INIT_START = .;
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KEEP (*(.init))
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__INIT_END = .;
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} > ram
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.fini :
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{
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__FINI_START = .;
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KEEP (*(.fini))
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__FINI_END = .;
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} > ram
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.jcr :
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{
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KEEP (*(.jcr))
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} > ram
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.text :
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{
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__TEXT_START = .;
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*(.text) *(.text.*) *(.gnu.linkonce.t.*)
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__TEXT_END = .;
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} > ram
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.rdata :
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{
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__RDATA_START = .;
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*(.rdata_4) *(.rdata_2) *(.rdata_1) *(.rdata.*) *(.gnu.linkonce.r.*) *(.rodata*)
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__RDATA_END = .;
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} > ram
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.ctor ALIGN(4) :
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{
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__CTOR_START = .;
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KEEP (*crtbegin*.o(.ctors))
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KEEP (*(EXCLUDE_FILE (*crtend*.o) .ctors))
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KEEP (*(SORT(.ctors.*)))
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KEEP (*(.ctors))
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__CTOR_END = .;
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} > ram
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.dtor ALIGN(4) :
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{
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__DTOR_START = .;
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KEEP (*crtbegin*.o(.dtors))
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KEEP (*(EXCLUDE_FILE (*crtend*.o) .dtors))
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KEEP (*(SORT(.dtors.*)))
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KEEP (*(.dtors))
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__DTOR_END = .;
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} > ram
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.data :
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{
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__DATA_START = .;
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*(.data_4) *(.data_2) *(.data_1) *(.data) *(.data.*) *(.gnu.linkonce.d.*)
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*(.eh_frame_hdr)
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*(.eh_frame)
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*(.gcc_except_table)
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*(.got.plt) *(.got)
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__DATA_END = .;
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} > ram
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.got :
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{
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*(.got)
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} > ram
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.got.plt :
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{
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*(.got.plt)
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} > ram
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.bss (NOLOAD) :
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{
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__BSS_START = .;
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*(.bss_4) *(.bss_2) *(.bss_1) *(.bss) *(COMMON) *(.bss.*) *(.gnu.linkonce.b.*)
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__BSS_END = .;
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} > ram
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/*
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You may change the sizes of the following sections to fit the actual
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size your program requires.
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The heap and stack are aligned to the bus width, as a speed optimization
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for accessing data located there.
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*/
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.heap :
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{
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. = ALIGN(4);
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__HEAP_START = .;
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. += 0x2000;
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__HEAP_MAX = .;
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} > ram
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.stack :
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{
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. = ALIGN(4);
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. += 0x6000;
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__STACK_START = .;
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} > ram
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.istack :
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{
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. = ALIGN(4);
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. += 0x100;
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__ISTACK_START = .;
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} > ram
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}
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__DATA_IMAGE_START = LOADADDR(.data);
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