Retro68/gcc/libcilkrts/runtime/config/x86/os-fence.h
2017-10-07 02:16:47 +02:00

84 lines
4.0 KiB
C++

/* os.h -*-C++-*-
*
*************************************************************************
*
* Copyright (C) 2009-2016, Intel Corporation
* All rights reserved.
*
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* modification, are permitted provided that the following conditions
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*
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* *********************************************************************
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* PLEASE NOTE: This file is a downstream copy of a file mainitained in
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**************************************************************************/
/* gcc before 4.4 does not implement __sync_synchronize properly */
#if (__ICC >= 1110 && !(__MIC__ || __MIC2__)) \
|| (!defined __ICC && __GNUC__ * 10 + __GNUC_MINOR__ > 43)
# define HAVE_SYNC_INTRINSICS 1
#endif
/*
* void __cilkrts_fence(void)
*
* Executes an MFENCE instruction to serialize all load and store instructions
* that were issued prior the MFENCE instruction. This serializing operation
* guarantees that every load and store instruction that precedes the MFENCE
* instruction is globally visible before any load or store instruction that
* follows the MFENCE instruction. The MFENCE instruction is ordered with
* respect to all load and store instructions, other MFENCE instructions, any
* SFENCE and LFENCE instructions, and any serializing instructions (such as
* the CPUID instruction).
*/
#ifdef HAVE_SYNC_INTRINSICS
# define __cilkrts_fence() __sync_synchronize()
#elif defined __ICC || defined __GNUC__
/* mfence is a strict subset of lock add but takes longer on many
* processors. */
// # define __cilkrts_fence() __asm__ volatile ("mfence")
/* On MIC, fence seems to be completely unnecessary.
* Just for simplicity of 1st implementation, it defaults to x86 */
# define __cilkrts_fence() __asm__ volatile ("lock addl $0,(%rsp)")
// #elif defined _WIN32
// # pragma intrinsic(_ReadWriteBarrier)
// # define __cilkrts_fence() _ReadWriteBarrier()
#else
COMMON_SYSDEP void __cilkrts_fence(void); ///< MFENCE instruction
#endif