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76 lines
2.2 KiB
ArmAsm
76 lines
2.2 KiB
ArmAsm
/* Copyright (C) 2008-2018 Free Software Foundation, Inc.
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Contributor: Joern Rennecke <joern.rennecke@embecosm.com>
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on behalf of Synopsys Inc.
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This file is part of GCC.
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GCC is free software; you can redistribute it and/or modify it under
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the terms of the GNU General Public License as published by the Free
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Software Foundation; either version 3, or (at your option) any later
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version.
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GCC is distributed in the hope that it will be useful, but WITHOUT ANY
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WARRANTY; without even the implied warranty of MERCHANTABILITY or
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FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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for more details.
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Under Section 7 of GPL version 3, you are granted additional
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permissions described in the GCC Runtime Library Exception, version
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3.1, as published by the Free Software Foundation.
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You should have received a copy of the GNU General Public License and
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a copy of the GCC Runtime Library Exception along with this program;
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see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
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<http://www.gnu.org/licenses/>. */
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#include "arc-ieee-754.h"
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/* inputs: r0, r1
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output: c, z flags to be used for 'hi' condition
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clobber: r12,flags */
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/* For NaNs, bit 22.. bit 30 must be set. */
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#if 0 /* DEBUG */
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.global __gtsf2
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.balign 4
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FUNC(__gtsf2)
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__gtsf2:
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st.a r11,[sp,-4]` push_s blink` st.a r10,[sp,-4]` st.a r9,[sp,-4]
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st.a r8,[sp,-4]` st.a r7,[sp,-4]` st.a r6,[sp,-4]` st.a r5,[sp,-4]
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st.a r4,[sp,-4]` push_s r3` push_s r2` push_s r1`
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bl.d __gtsf2_c` push_s r0
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mov r11,r0` pop_s r0` pop_s r1` pop_s r2` pop_s r3
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ld.ab r4,[sp,4]` ld.ab r5,[sp,4]` ld.ab r6,[sp,4]`
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ld.ab r7,[sp,4]` ld.ab r8,[sp,4]` ld.ab r9,[sp,4]
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bl.d __gtsf2_asm` ld.ab r10,[sp,4]
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pop_s blink
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brgt.d r11,0,0f
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ld.ab r11,[sp,4]
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jls [blink]
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bl abort
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0: jhi [blink]
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bl abort
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ENDFUNC(__gtsf2)
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#define __gtsf2 __gtsf2_asm
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#endif /* DEBUG */
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.global __gtsf2
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.balign 4
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HIDDEN_FUNC(__gtsf2)
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__gtsf2:
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or.f r12,r0,r1
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bmi.d .Lneg
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bmsk_s r12,r12,23
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add1.f 0,r12,r0 ; check for NaN
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add1.cc.f r12,r12,r1
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j_s.d [blink]
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cmp.cc r0,r1
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.balign 4
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.Lneg: breq.d r0,0,.L0
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add1.f 0,r12,r0 ; check for NaN
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add1.cc.f r12,r12,r1
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j_s.d [blink]
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cmp.cc r1,r0
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.balign 4
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.L0: bxor.f 0,r1,31 ; check for -0
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j_s.d [blink]
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cmp.hi r1,r0
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ENDFUNC(__gtsf2)
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