Retro68/binutils/ld/testsuite/ld-powerpc/tlsexe32no.d
Wolfgang Thaller f485e125c4 binutils 2.39
2022-10-27 20:45:45 +02:00

76 lines
2.9 KiB
Makefile

#source: tls32.s
#as: -a32
#ld: --no-tls-optimize tmpdir/libtlslib32.so
#objdump: -dr
#target: powerpc*-*-*
.*
Disassembly of section \.text:
.* <_start>:
.*: (42 9f 00 05|05 00 9f 42) bcl .*
.*: (7f c8 02 a6|a6 02 c8 7f) mflr r30
.*: (3f de 00 02|02 00 de 3f) addis r30,r30,2
.*: (3b de 81 08|08 81 de 3b) addi r30,r30,-32504
.*: (38 7f ff dc|dc ff 7f 38) addi r3,r31,-36
.*: (48 00 00 6d|6d 00 00 48) bl .*
.*: (38 7f ff e4|e4 ff 7f 38) addi r3,r31,-28
.*: (48 00 00 65|65 00 00 48) bl .*
.*: (38 7f ff ec|ec ff 7f 38) addi r3,r31,-20
.*: (48 00 00 5d|5d 00 00 48) bl .*
.*: (38 7f ff f8|f8 ff 7f 38) addi r3,r31,-8
.*: (48 00 00 55|55 00 00 48) bl .*
.*: (39 23 80 20|20 80 23 39) addi r9,r3,-32736
.*: (3d 23 00 00|00 00 23 3d) addis r9,r3,0
.*: (81 49 80 24|24 80 49 81) lwz r10,-32732\(r9\)
.*: (81 3f ff f4|f4 ff 3f 81) lwz r9,-12\(r31\)
.*: (7d 49 12 2e|2e 12 49 7d) lhzx r10,r9,r2
.*: (89 42 90 30|30 90 42 89) lbz r10,-28624\(r2\)
.*: (3d 22 00 00|00 00 22 3d) addis r9,r2,0
.*: (99 49 90 34|34 90 49 99) stb r10,-28620\(r9\)
.*: (38 7e ff d4|d4 ff 7e 38) addi r3,r30,-44
.*: (48 00 00 2d|2d 00 00 48) bl .*
.*: (38 7e ff f8|f8 ff 7e 38) addi r3,r30,-8
.*: (48 00 00 25|25 00 00 48) bl .*
.*: (91 43 80 04|04 80 43 91) stw r10,-32764\(r3\)
.*: (3d 23 00 00|00 00 23 3d) addis r9,r3,0
.*: (91 49 80 08|08 80 49 91) stw r10,-32760\(r9\)
.*: (81 3e ff f4|f4 ff 3e 81) lwz r9,-12\(r30\)
.*: (7d 49 13 2e|2e 13 49 7d) sthx r10,r9,r2
.*: (a1 42 90 14|14 90 42 a1) lhz r10,-28652\(r2\)
.*: (3d 22 00 00|00 00 22 3d) addis r9,r2,0
.*: (a9 49 90 18|18 90 49 a9) lha r10,-28648\(r9\)
.* <__tls_get_addr_opt@plt>:
.*: (81 63 00 00|00 00 63 81) lwz r11,0\(r3\)
.*: (81 83 00 04|04 00 83 81) lwz r12,4\(r3\)
.*: (7c 60 1b 78|78 1b 60 7c) mr r0,r3
.*: (2c 0b 00 00|00 00 0b 2c) cmpwi r11,0
.*: (7c 6c 12 14|14 12 6c 7c) add r3,r12,r2
.*: (4d 82 00 20|20 00 82 4d) beqlr
.*: (7c 03 03 78|78 03 03 7c) mr r3,r0
.*: (60 00 00 00|00 00 00 60) nop
.*: (3d 60 01 81|81 01 60 3d) lis r11,385
.*: (81 6b 03 c4|c4 03 6b 81) lwz r11,964\(r11\)
.*: (7d 69 03 a6|a6 03 69 7d) mtctr r11
.*: (4e 80 04 20|20 04 80 4e) bctr
.* <__glink>:
.*: (3d 80 01 81|81 01 80 3d) lis r12,385
.*: (3d 6b fe 80|80 fe 6b 3d) addis r11,r11,-384
.*: (80 0c 03 bc|bc 03 0c 80) lwz r0,956\(r12\)
.*: (39 6b fd 80|80 fd 6b 39) addi r11,r11,-640
.*: (7c 09 03 a6|a6 03 09 7c) mtctr r0
.*: (7c 0b 5a 14|14 5a 0b 7c) add r0,r11,r11
.*: (81 8c 03 c0|c0 03 8c 81) lwz r12,960\(r12\)
.*: (7d 60 5a 14|14 5a 60 7d) add r11,r0,r11
.*: (4e 80 04 20|20 04 80 4e) bctr
.*: (60 00 00 00|00 00 00 60) nop
.*: (60 00 00 00|00 00 00 60) nop
.*: (60 00 00 00|00 00 00 60) nop
.*: (60 00 00 00|00 00 00 60) nop
.*: (60 00 00 00|00 00 00 60) nop
.*: (60 00 00 00|00 00 00 60) nop
.*: (60 00 00 00|00 00 00 60) nop