diff --git a/cpu/ppc/ppcfpopcodes.cpp b/cpu/ppc/ppcfpopcodes.cpp
index 8327680..07b4b8c 100644
--- a/cpu/ppc/ppcfpopcodes.cpp
+++ b/cpu/ppc/ppcfpopcodes.cpp
@@ -645,16 +645,16 @@ static void round_to_int(const uint8_t mode) {
         uint64_t ppc_result64_d;
         switch (mode & 0x3) {
         case 0:
-            ppc_result64_d = (uint32_t)round_to_nearest(val_reg_b);
+            ppc_result64_d = uint32_t(round_to_nearest(val_reg_b));
             break;
         case 1:
-            ppc_result64_d = (uint32_t)round_to_zero(val_reg_b);
+            ppc_result64_d = uint32_t(round_to_zero(val_reg_b));
             break;
         case 2:
-            ppc_result64_d = (uint32_t)round_to_pos_inf(val_reg_b);
+            ppc_result64_d = uint32_t(round_to_pos_inf(val_reg_b));
             break;
         case 3:
-            ppc_result64_d = (uint32_t)round_to_neg_inf(val_reg_b);
+            ppc_result64_d = uint32_t(round_to_neg_inf(val_reg_b));
             break;
         }
 
@@ -780,7 +780,7 @@ void dppc_interpreter::ppc_stfsu() {
 
 void dppc_interpreter::ppc_stfsx() {
     ppc_grab_regsfpsiab();
-    ppc_effective_address = (reg_a) ? val_reg_a + val_reg_b : val_reg_b;
+    ppc_effective_address = reg_a ? (val_reg_a + val_reg_b) : val_reg_b;
     float result = ppc_state.fpr[reg_s].dbl64_r;
     mmu_write_vmem<uint32_t>(ppc_effective_address, uint32_t(result));
 }
@@ -800,7 +800,7 @@ void dppc_interpreter::ppc_stfsux() {
 void dppc_interpreter::ppc_stfd() {
     ppc_grab_regsfpsia();
     ppc_effective_address = int32_t(int16_t(ppc_cur_instruction));
-    ppc_effective_address += (reg_a) ? val_reg_a : 0;
+    ppc_effective_address += reg_a ? val_reg_a : 0;
     mmu_write_vmem<uint64_t>(ppc_effective_address, ppc_state.fpr[reg_s].int64_r);
 }
 
@@ -818,7 +818,7 @@ void dppc_interpreter::ppc_stfdu() {
 
 void dppc_interpreter::ppc_stfdx() {
     ppc_grab_regsfpsiab();
-    ppc_effective_address = (reg_a) ? val_reg_a + val_reg_b : val_reg_b;
+    ppc_effective_address = reg_a ? (val_reg_a + val_reg_b) : val_reg_b;
     mmu_write_vmem<uint64_t>(ppc_effective_address, ppc_state.fpr[reg_s].int64_r);
 }
 
@@ -835,8 +835,8 @@ void dppc_interpreter::ppc_stfdux() {
 
 void dppc_interpreter::ppc_stfiwx() {
     ppc_grab_regsfpsiab();
-    ppc_effective_address = (reg_a) ? val_reg_a + val_reg_b : val_reg_b;
-    mmu_write_vmem<uint32_t>(ppc_effective_address, (uint32_t)(ppc_state.fpr[reg_s].int64_r));
+    ppc_effective_address = reg_a ? (val_reg_a + val_reg_b) : val_reg_b;
+    mmu_write_vmem<uint32_t>(ppc_effective_address, uint32_t(ppc_state.fpr[reg_s].int64_r));
 }
 
 // Floating Point Register Transfer
@@ -852,7 +852,7 @@ void dppc_interpreter::ppc_fmr() {
 void dppc_interpreter::ppc_mffs() {
     ppc_grab_regsda();
 
-    ppc_state.fpr[reg_d].int64_r = (uint64_t)ppc_state.fpscr | 0xFFF8000000000000ULL;
+    ppc_state.fpr[reg_d].int64_r = uint64_t(ppc_state.fpscr) | 0xFFF8000000000000ULL;
 
     if (rc_flag)
         ppc_update_cr1();
@@ -861,7 +861,7 @@ void dppc_interpreter::ppc_mffs() {
 void dppc_interpreter::ppc_mffs_601() {
     ppc_grab_regsda();
 
-    ppc_state.fpr[reg_d].int64_r = (uint64_t)ppc_state.fpscr | 0xFFFFFFFF00000000ULL;
+    ppc_state.fpr[reg_d].int64_r = uint64_t(ppc_state.fpscr) | 0xFFFFFFFF00000000ULL;
 
     if (rc_flag)
         ppc_update_cr1();
@@ -959,7 +959,6 @@ void dppc_interpreter::ppc_fcmpo() {
     if (std::isnan(db_test_a) || std::isnan(db_test_b)) {
         // TODO: test for SNAN operands
         // for now, assume that at least one of the operands is QNAN
-        ppc_state.fpscr |= FPSCR::VXVC;
         cmp_c |= CRx_bit::CR_SO;
     }
     else if (db_test_a < db_test_b) {
@@ -973,7 +972,7 @@ void dppc_interpreter::ppc_fcmpo() {
     }
 
     ppc_state.fpscr = (ppc_state.fpscr & ~FPSCR::FPCC_MASK) | (cmp_c >> 16); // update FPCC
-    ppc_state.cr = ((ppc_state.cr & ~(0xF0000000 >> crf_d)) | ((cmp_c) >> crf_d));
+    ppc_state.cr = ((ppc_state.cr & ~(0xF0000000 >> crf_d)) | (cmp_c >> crf_d));
 }
 
 void dppc_interpreter::ppc_fcmpu() {
@@ -996,5 +995,5 @@ void dppc_interpreter::ppc_fcmpu() {
     }
 
     ppc_state.fpscr = (ppc_state.fpscr & ~FPSCR::FPCC_MASK) | (cmp_c >> 16); // update FPCC
-    ppc_state.cr = ((ppc_state.cr & ~(0xF0000000 >> crf_d)) | ((cmp_c) >> crf_d));
+    ppc_state.cr    = ((ppc_state.cr & ~(0xF0000000UL >> crf_d)) | (cmp_c >> crf_d));
 }
diff --git a/cpu/ppc/ppcopcodes.cpp b/cpu/ppc/ppcopcodes.cpp
index 5e9458b..1b99a70 100644
--- a/cpu/ppc/ppcopcodes.cpp
+++ b/cpu/ppc/ppcopcodes.cpp
@@ -371,7 +371,7 @@ void dppc_interpreter::ppc_subfme() {
         ppc_state.spr[SPR::XER] |= XER::CA;
 
     if (oe_flag) {
-        if (ppc_result_d == ppc_result_a && (int32_t)ppc_result_d > 0)
+        if (ppc_result_d == ppc_result_a && int32_t(ppc_result_d) > 0)
             ppc_state.spr[SPR::XER] |= XER::SO | XER::OV;
         else
             ppc_state.spr[SPR::XER] &= ~XER::OV;
@@ -1489,9 +1489,9 @@ void dppc_interpreter::ppc_tw() {
     reg_a  = (ppc_cur_instruction >> 11) & 31;
     reg_b  = (ppc_cur_instruction >> 16) & 31;
     uint32_t ppc_to = (ppc_cur_instruction >> 21) & 31;
-    if (((int32_t(ppc_state.gpr[reg_a]) < (int32_t)ppc_state.gpr[reg_b]) && (ppc_to & 0x10)) ||
-        ((int32_t(ppc_state.gpr[reg_a]) > (int32_t)ppc_state.gpr[reg_b]) && (ppc_to & 0x08)) ||
-        ((int32_t(ppc_state.gpr[reg_a]) == (int32_t)ppc_state.gpr[reg_b]) && (ppc_to & 0x04)) ||
+    if (((int32_t(ppc_state.gpr[reg_a]) < int32_t(ppc_state.gpr[reg_b])) && (ppc_to & 0x10)) ||
+        ((int32_t(ppc_state.gpr[reg_a]) > int32_t(ppc_state.gpr[reg_b])) && (ppc_to & 0x08)) ||
+        ((int32_t(ppc_state.gpr[reg_a]) == int32_t(ppc_state.gpr[reg_b])) && (ppc_to & 0x04)) ||
         ((ppc_state.gpr[reg_a] < ppc_state.gpr[reg_b]) && (ppc_to & 0x02)) ||
         ((ppc_state.gpr[reg_a] > ppc_state.gpr[reg_b]) && (ppc_to & 0x01))) {
         ppc_exception_handler(Except_Type::EXC_PROGRAM, Exc_Cause::TRAP);
@@ -1499,7 +1499,7 @@ void dppc_interpreter::ppc_tw() {
 }
 
 void dppc_interpreter::ppc_twi() {
-    simm   = int32_t(int16_t(ppc_cur_instruction) & 0xFFFFUL);
+    simm   = int32_t(int16_t(ppc_cur_instruction));
     reg_a  = (ppc_cur_instruction >> 16) & 0x1F;
     uint32_t ppc_to = (ppc_cur_instruction >> 21) & 0x1F;
     if (((int32_t(ppc_state.gpr[reg_a]) < simm) && (ppc_to & 0x10)) ||
@@ -1554,7 +1554,7 @@ void dppc_interpreter::ppc_dcbtst() {
 
 void dppc_interpreter::ppc_dcbz() {
     ppc_grab_regsdab();
-    ppc_effective_address = (reg_a == 0) ? ppc_result_b : (ppc_result_a + ppc_result_b);
+    ppc_effective_address = reg_a ? (ppc_result_a + ppc_result_b) : ppc_result_b;
 
     ppc_effective_address &= 0xFFFFFFE0UL; // align EA on a 32-byte boundary
 
@@ -1627,7 +1627,7 @@ void dppc_interpreter::ppc_sth() {
 #endif
     ppc_grab_regssa();
     ppc_effective_address = int32_t(int16_t(ppc_cur_instruction));
-    ppc_effective_address += (reg_a > 0) ? ppc_result_a : 0;
+    ppc_effective_address += reg_a ? ppc_result_a : 0;
     mmu_write_vmem<uint16_t>(ppc_effective_address, ppc_result_d);
     //mem_write_word(ppc_effective_address, ppc_result_d);
 }
@@ -1679,7 +1679,7 @@ void dppc_interpreter::ppc_sthbrx() {
 #endif
     ppc_grab_regssab();
     ppc_effective_address = reg_a ? (ppc_result_a + ppc_result_b) : ppc_result_b;
-    ppc_result_d          = uint32_t(uint16_t(BYTESWAP_32(ppc_result_d)));
+    ppc_result_d          = uint32_t(BYTESWAP_16(uint16_t(ppc_result_d)));
     mmu_write_vmem<uint16_t>(ppc_effective_address, ppc_result_d);
     //mem_write_word(ppc_effective_address, ppc_result_d);
 }
@@ -1772,7 +1772,7 @@ void dppc_interpreter::ppc_stmw() {
 #endif
     ppc_grab_regssa();
     ppc_effective_address = int32_t(int16_t(ppc_cur_instruction));
-    ppc_effective_address += (reg_a > 0) ? ppc_result_a : 0;
+    ppc_effective_address += reg_a ? ppc_result_a : 0;
 
     /* what should we do if EA is unaligned? */
     if (ppc_effective_address & 3) {
@@ -1792,7 +1792,7 @@ void dppc_interpreter::ppc_lbz() {
 #endif
     ppc_grab_regsda();
     ppc_effective_address = int32_t(int16_t(ppc_cur_instruction));
-    ppc_effective_address += (reg_a > 0) ? ppc_result_a : 0;
+    ppc_effective_address += reg_a ? ppc_result_a : 0;
     //ppc_result_d = mem_grab_byte(ppc_effective_address);
     ppc_result_d = mmu_read_vmem<uint8_t>(ppc_effective_address);
     ppc_store_result_regd();
@@ -1804,7 +1804,7 @@ void dppc_interpreter::ppc_lbzu() {
 #endif
     ppc_grab_regsda();
     ppc_effective_address = int32_t(int16_t(ppc_cur_instruction));
-    if ((reg_a != reg_d) || (reg_a != 0)) {
+    if ((reg_a != reg_d) && reg_a != 0) {
         ppc_effective_address += ppc_result_a;
         //ppc_result_d = mem_grab_byte(ppc_effective_address);
         ppc_result_d = mmu_read_vmem<uint8_t>(ppc_effective_address);
@@ -1832,7 +1832,7 @@ void dppc_interpreter::ppc_lbzux() {
     num_int_loads++;
 #endif
     ppc_grab_regsdab();
-    if ((reg_a != reg_d) || (reg_a != 0)) {
+    if ((reg_a != reg_d) && reg_a != 0) {
         ppc_effective_address = ppc_result_a + ppc_result_b;
         //ppc_result_d          = mem_grab_byte(ppc_effective_address);
         ppc_result_d = mmu_read_vmem<uint8_t>(ppc_effective_address);
@@ -1862,7 +1862,7 @@ void dppc_interpreter::ppc_lhzu() {
     num_int_loads++;
 #endif
     ppc_grab_regsda();
-    if ((reg_a != reg_d) || (reg_a != 0)) {
+    if ((reg_a != reg_d) && reg_a != 0) {
         ppc_effective_address = int32_t(int16_t(ppc_cur_instruction));
         ppc_effective_address += ppc_result_a;
         //ppc_result_d = mem_grab_word(ppc_effective_address);
@@ -1891,7 +1891,7 @@ void dppc_interpreter::ppc_lhzux() {
     num_int_loads++;
 #endif
     ppc_grab_regsdab();
-    if ((reg_a != reg_d) || (reg_a != 0)) {
+    if ((reg_a != reg_d) && reg_a != 0) {
         ppc_effective_address = ppc_result_a + ppc_result_b;
         //ppc_result_d          = mem_grab_word(ppc_effective_address);
         ppc_result_d = mmu_read_vmem<uint16_t>(ppc_effective_address);
@@ -1921,7 +1921,7 @@ void dppc_interpreter::ppc_lhau() {
     num_int_loads++;
 #endif
     ppc_grab_regsda();
-    if ((reg_a != reg_d) || (reg_a != 0)) {
+    if ((reg_a != reg_d) && reg_a != 0) {
         ppc_effective_address = int32_t(int16_t(ppc_cur_instruction));
         ppc_effective_address += ppc_result_a;
         //uint16_t val = mem_grab_word(ppc_effective_address);
@@ -1940,7 +1940,7 @@ void dppc_interpreter::ppc_lhaux() {
     num_int_loads++;
 #endif
     ppc_grab_regsdab();
-    if ((reg_a != reg_d) || (reg_a != 0)) {
+    if ((reg_a != reg_d) && reg_a != 0) {
         ppc_effective_address = ppc_result_a + ppc_result_b;
         // uint16_t val          = mem_grab_word(ppc_effective_address);
         int16_t val  = mmu_read_vmem<uint16_t>(ppc_effective_address);
@@ -2006,7 +2006,7 @@ void dppc_interpreter::ppc_lwzu() {
 #endif
     ppc_grab_regsda();
     ppc_effective_address = int32_t(int16_t(ppc_cur_instruction));
-    if ((reg_a != reg_d) || (reg_a != 0)) {
+    if ((reg_a != reg_d) && reg_a != 0) {
         ppc_effective_address += ppc_result_a;
         //ppc_result_d = mem_grab_dword(ppc_effective_address);
         ppc_result_d = mmu_read_vmem<uint32_t>(ppc_effective_address);
@@ -2034,7 +2034,7 @@ void dppc_interpreter::ppc_lwzux() {
     num_int_loads++;
 #endif
     ppc_grab_regsdab();
-    if ((reg_a != reg_d) || (reg_a != 0)) {
+    if ((reg_a != reg_d) && reg_a != 0) {
         ppc_effective_address = ppc_result_a + ppc_result_b;
         // ppc_result_d = mem_grab_dword(ppc_effective_address);
         ppc_result_d = mmu_read_vmem<uint32_t>(ppc_effective_address);