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https://github.com/dingusdev/dingusppc.git
synced 2026-04-22 00:17:00 +00:00
More work to help diagnose the issue
This commit is contained in:
+24
-25
@@ -261,19 +261,19 @@ void AMIC::write(uint32_t rgn_start, uint32_t offset, uint32_t value, int size)
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uint32_t mask;
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// subdevices registers
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switch(offset >> 12) {
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case 0: // VIA1 registers
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switch (offset >> 12) {
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case 0: // VIA1 registers
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case 1:
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this->viacuda->write(offset >> 9, value);
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return;
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case 4: // SCC registers
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case 4: // SCC registers
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if ((offset & 0xF) < 0x0C)
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this->escc->write(compat_to_macrisc[(offset >> 1) & 0xF], value);
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else
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LOG_F(ERROR, "AMIC SCC write @%x.%c = %0*x",
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offset, SIZE_ARG(size), size * 2, value);
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return;
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case 0xA: // MACE registers
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case 0xA: // MACE registers
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this->mace->write((offset >> 4) & 0x1F, value);
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return;
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case 0x10:
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@@ -282,8 +282,8 @@ void AMIC::write(uint32_t rgn_start, uint32_t offset, uint32_t value, int size)
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else
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this->scsi->write((offset >> 4) & 0xF, value);
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return;
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case 0x14: // Sound registers
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switch(offset) {
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case 0x14: // Sound registers
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switch (offset) {
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case AMICReg::Snd_Ctrl_0:
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case AMICReg::Snd_Ctrl_1:
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case AMICReg::Snd_Ctrl_2:
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@@ -293,51 +293,48 @@ void AMIC::write(uint32_t rgn_start, uint32_t offset, uint32_t value, int size)
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if ((this->imm_snd_regs[0] & 0xC0) == PDM_SND_CTRL_VALID) {
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this->awacs->write_ctrl(
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(this->imm_snd_regs[1] >> 4) | (this->imm_snd_regs[0] & 0x3F),
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((this->imm_snd_regs[1] & 0xF) << 8) | this->imm_snd_regs[2]
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);
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((this->imm_snd_regs[1] & 0xF) << 8) | this->imm_snd_regs[2]);
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}
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return;
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case AMICReg::Snd_Buf_Size_Hi:
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case AMICReg::Snd_Buf_Size_Lo:
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SET_SIZE_BYTE(this->snd_buf_size, offset, value);
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this->snd_buf_size &= ~3; // sound buffer size is always a multiple of 4
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this->snd_buf_size &= ~3; // sound buffer size is always a multiple of 4
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LOG_F(9, "AMIC: Sound buffer size set to 0x%X", this->snd_buf_size);
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return;
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case AMICReg::Snd_Out_Ctrl:
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if ((value & 1) != (this->snd_out_ctrl & 1)) {
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if (value & 1) {
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this->snd_out_dma->init(this->dma_base & ~0x3FFFF,
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this->snd_buf_size);
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this->snd_out_dma->init(this->dma_base & ~0x3FFFF, this->snd_buf_size);
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this->snd_out_dma->enable();
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this->awacs->set_sample_rate((this->snd_out_ctrl >> 1) & 3);
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this->awacs->dma_out_start();
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this->snd_out_ctrl |= 1;
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} else {
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this->snd_out_dma->disable();
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this->awacs->dma_out_pause();
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this->snd_out_ctrl &= 0xFE;
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}
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}
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this->snd_out_ctrl = value;
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return;
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case AMICReg::Snd_In_Ctrl:
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LOG_F(WARNING, "Snd In Ctrl - SndIn Enable: 0x%x", value & 0x80);
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LOG_F(WARNING, "Snd In Ctrl - Subframe Out: 0x%x", value & 0x3C);
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LOG_F(WARNING, "Snd In Ctrl - Subframe In: 0x%x", value & 0x03);
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if ((value & 0x80) && !(this->snd_in_ctrl & 0x80)){
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if ((value & 1) != (this->snd_in_ctrl & 1)) {
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if (value & 1) {
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this->snd_in_dma->init(this->dma_base & ~0x3FFFF, this->snd_buf_size);
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this->snd_in_dma->enable();
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this->awacs->set_sample_rate((this->snd_out_ctrl >> 1) & 3);
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this->awacs->dma_in_start();
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}
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else if (!(value & 0x80) && (this->snd_in_ctrl & 0x80)) {
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this->snd_in_dma->disable();
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this->awacs->dma_in_pause();
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}
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} else {
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this->snd_in_dma->disable();
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this->awacs->dma_in_pause();
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}
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if (value & 0x40) {
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this->via2_ifr |= 0x10;
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this->ack_via2_int(VIA2_INT_SOUND, 0);
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}
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else {
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this->via2_ifr |= 0x10;
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this->ack_via2_int(VIA2_INT_SOUND, 0);
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} else {
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this->via2_ifr |= 0x10;
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this->ack_via2_int(VIA2_INT_SOUND, 1);
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}
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@@ -347,13 +344,15 @@ void AMIC::write(uint32_t rgn_start, uint32_t offset, uint32_t value, int size)
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this->snd_out_dma->write_dma_out_ctrl(value);
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return;
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case AMICReg::Snd_In_DMA:
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LOG_F(WARNING, "SND IN DMA Value: 0x%x", value);
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this->snd_in_dma->write_dma_in_ctrl(value);
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return;
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}
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case 0x16: // SWIM3 registers
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case 0x17:
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case 0x16: // SWIM3 registers
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case 0x17: {
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this->swim3->write((offset >> 9) & 0xF, value);
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return;
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}
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}
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switch(offset) {
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