From 2b8f51060305d41222703949b10c107d9417d2e1 Mon Sep 17 00:00:00 2001 From: joevt Date: Tue, 9 Apr 2024 02:25:53 -0700 Subject: [PATCH] poweropcodes: Fix slq. Test bit 26 of rB instead of using >= 0x20 to determine which operation to perform. The two operations need to be switched such that rA is cleared when bit 26 is set. Don't forget to store the result in rA. --- cpu/ppc/poweropcodes.cpp | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/cpu/ppc/poweropcodes.cpp b/cpu/ppc/poweropcodes.cpp index 3f2c7e4..1e7e441 100644 --- a/cpu/ppc/poweropcodes.cpp +++ b/cpu/ppc/poweropcodes.cpp @@ -479,16 +479,17 @@ void dppc_interpreter::power_slq() { ppc_grab_regssab(ppc_cur_instruction); unsigned rot_sh = ppc_result_b & 0x1F; - if (ppc_result_b >= 0x20) { - ppc_result_a = ppc_result_d << rot_sh; - } else { + if (ppc_result_b & 0x20) { ppc_result_a = 0; + } else { + ppc_result_a = ppc_result_d << rot_sh; } if (rec) ppc_changecrf0(ppc_result_a); ppc_state.spr[SPR::MQ] = ((ppc_result_d << rot_sh) | (ppc_result_d >> (32 - rot_sh))); + ppc_store_iresult_reg(reg_a, ppc_result_a); } template void dppc_interpreter::power_slq();