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Add conditionally compiled checks for invalid CMP forms.
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@ -197,7 +197,7 @@ extern void ppc_grab_regssab();
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extern void ppc_grab_regsdasimm();
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extern void ppc_grab_regsdauimm();
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extern void ppc_grab_regssasimm();
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extern void ppc_grab_regsasimm();
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extern void ppc_grab_regssauimm();
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extern void ppc_grab_regsfpdb();
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@ -115,12 +115,10 @@ void ppc_grab_regsdauimm(){
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ppc_result_a = ppc_state.ppc_gpr[reg_a];
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}
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void ppc_grab_regssasimm(){
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reg_s = (ppc_cur_instruction >> 21) & 31;
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void ppc_grab_regsasimm(){
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reg_a = (ppc_cur_instruction >> 16) & 31;
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simm = (int32_t)((int16_t)((ppc_cur_instruction) & 65535));
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simm = (int32_t)((int16_t)(ppc_cur_instruction & 65535));
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ppc_result_a = ppc_state.ppc_gpr[reg_a];
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ppc_result_d = ppc_state.ppc_gpr[reg_s];
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}
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void ppc_grab_regssauimm(){
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@ -1728,45 +1726,51 @@ void ppc_cmp(){
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}
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void ppc_cmpi(){
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//if (!((ppc_cur_instruction >> 21) && 0x1)){
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crf_d = (ppc_cur_instruction >> 23) & 7;
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crf_d = crf_d << 2;
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ppc_grab_regssasimm();
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xercon = (ppc_state.ppc_spr[1] & 0x80000000) >> 3;
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cmp_c = (((int32_t)ppc_result_a) == simm) ? 0x20000000 : (((int32_t)ppc_result_a) > simm) ? 0x40000000 : 0x80000000;
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ppc_state.ppc_cr = ((ppc_state.ppc_cr & ~(0xf0000000 >> crf_d)) | ((cmp_c + xercon) >> crf_d));
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// }
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//else{
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// printf("Warning: Invalid CMP Instruction.");
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//}
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#ifdef CHECK_INVALID
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if (ppc_cur_instruction & 0x200000) {
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printf("WARNING: invalid CMPI instruction form (L=1)!\n");
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return;
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}
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#endif
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crf_d = (ppc_cur_instruction >> 23) & 7;
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crf_d = crf_d << 2;
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ppc_grab_regsasimm();
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xercon = (ppc_state.ppc_spr[1] & 0x80000000) >> 3;
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cmp_c = (((int32_t)ppc_result_a) == simm) ? 0x20000000 : (((int32_t)ppc_result_a) > simm) ? 0x40000000 : 0x80000000;
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ppc_state.ppc_cr = ((ppc_state.ppc_cr & ~(0xf0000000 >> crf_d)) | ((cmp_c + xercon) >> crf_d));
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}
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void ppc_cmpl(){
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//if (!((ppc_cur_instruction >> 21) && 0x1)){
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crf_d = (ppc_cur_instruction >> 23) & 7;
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crf_d = crf_d << 2;
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ppc_grab_regssab();
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xercon = (ppc_state.ppc_spr[1] & 0x80000000) >> 3;
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cmp_c = (ppc_result_a == ppc_result_b) ? 0x20000000 : (ppc_result_a > ppc_result_b) ? 0x40000000 : 0x80000000;
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ppc_state.ppc_cr = ((ppc_state.ppc_cr & ~(0xf0000000 >> crf_d)) | ((cmp_c + xercon) >> crf_d));
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//}
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//else{
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// printf("Warning: Invalid CMP Instruction.");
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//}
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#ifdef CHECK_INVALID
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if (ppc_cur_instruction & 0x200000) {
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printf("WARNING: invalid CMPL instruction form (L=1)!\n");
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return;
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}
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#endif
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crf_d = (ppc_cur_instruction >> 23) & 7;
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crf_d = crf_d << 2;
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ppc_grab_regssab();
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xercon = (ppc_state.ppc_spr[1] & 0x80000000) >> 3;
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cmp_c = (ppc_result_a == ppc_result_b) ? 0x20000000 : (ppc_result_a > ppc_result_b) ? 0x40000000 : 0x80000000;
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ppc_state.ppc_cr = ((ppc_state.ppc_cr & ~(0xf0000000 >> crf_d)) | ((cmp_c + xercon) >> crf_d));
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}
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void ppc_cmpli(){
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// if (!((ppc_cur_instruction >> 21) && 0x1)){
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crf_d = (ppc_cur_instruction >> 23) & 7;
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crf_d = crf_d << 2;
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ppc_grab_regssauimm();
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xercon = (ppc_state.ppc_spr[1] & 0x80000000) >> 3;
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cmp_c = (ppc_result_a == uimm) ? 0x20000000 : (ppc_result_a > uimm) ? 0x40000000 : 0x80000000;
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ppc_state.ppc_cr = ((ppc_state.ppc_cr & ~(0xf0000000 >> crf_d)) | ((cmp_c + xercon) >> crf_d));
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// }
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//else{
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// printf("Warning: Invalid CMP Instruction.");
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// }
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#ifdef CHECK_INVALID
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if (ppc_cur_instruction & 0x200000) {
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printf("WARNING: invalid CMPLI instruction form (L=1)!\n");
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return;
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}
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#endif
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crf_d = (ppc_cur_instruction >> 23) & 7;
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crf_d = crf_d << 2;
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ppc_grab_regssauimm();
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xercon = (ppc_state.ppc_spr[1] & 0x80000000) >> 3;
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cmp_c = (ppc_result_a == uimm) ? 0x20000000 : (ppc_result_a > uimm) ? 0x40000000 : 0x80000000;
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ppc_state.ppc_cr = ((ppc_state.ppc_cr & ~(0xf0000000 >> crf_d)) | ((cmp_c + xercon) >> crf_d));
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}
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//Condition Register Changes
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