diff --git a/CONTRIBUTING.md b/CONTRIBUTING.md index 1ac7edb..519032b 100644 --- a/CONTRIBUTING.md +++ b/CONTRIBUTING.md @@ -22,6 +22,7 @@ Code > one_hundred = 100; > one_thousand = 1000; * CamelCase for class names, lowercase for variables, UPPERCASE for enumerations +* Avoid redundancy in namespaces (i.e. use ViaCuda::read() instead of ViaCuda::cuda_read()) Issues ======= diff --git a/zdocs/adb.md b/zdocs/adb.md new file mode 100644 index 0000000..295fc8f --- /dev/null +++ b/zdocs/adb.md @@ -0,0 +1,20 @@ +# Commands + +| Command Name | Number | +|:---------------------------:|:-------:| +| DEVCMD_CHANGE_ID_AND_ENABLE | 0x00 | +| DEVCMD_CHANGE_ID | 0xFD | +| DEVCMD_CHANGE_ID_AND_ACT | 0xFE | +| DEVCMD_SELF_TEST | 0xFF | + +# Devices + +| Device Type | Example | Default Address | +|:-----------------:|:-------------:|:---------------:| +| Protection | | 0x1 | +| Encoded | Keyboard | 0x2 | +| Relative-position | Mouse | 0x3 | +| Absolute-position | Tablet | 0x4 | +| Data transfer | Modem | 0x5 | +| Other | | 0x6 | +| Other | | 0x7 | \ No newline at end of file diff --git a/zdocs/awacs.md b/zdocs/awacs.md index 343e1fe..a3ad665 100644 --- a/zdocs/awacs.md +++ b/zdocs/awacs.md @@ -1,11 +1,31 @@ -# Memory Map - AWACS can usually be located at IOBase (ex.: 0xF3000000 for Power Mac G3 Beige) + 0x14000. -# Registers +# Register Maps -Sound Control Register -Codec Control Register -Codec Status Register -Clipping Count Register -Byte Swapping Register +## NuBus Macs +| Register | Offset | Length +|:-----------------:|:------:|:------:| +| Codec Control | 0x0 | 3 | +| Codec Status | 0x4 | 3 | +| Buffer Size | 0x8 | 2 | +| Phaser | 0xA | 4 | +| Sound Control | 0xE | 2 | +| DMA In | 0x12 | 1 | +| DMA Out | 0x16 | 1 | + +## PCI Macs + +All registers are 32-bit here. + +| Register | Offset | +|:-----------------:|:------:| +| Sound Control | 0x0 | +| Codec Control | 0x10 | +| Codec Status | 0x20 | +| Clipping Count | 0x30 | +| Byte Swapping | 0x40 | + + +Separate volume controls exist for the CD drive and the microphone. + +The DMA buffer size is set to be 0x40000 bytes, while the DMA hardware buffer size is set to be 0x2000 bytes. diff --git a/zdocs/memorymaps.md b/zdocs/memorymaps.md index 1d89241..77a20fd 100644 --- a/zdocs/memorymaps.md +++ b/zdocs/memorymaps.md @@ -28,6 +28,18 @@ | 0xF1000000 | 0xFFBFFFFF | NuBus "standard slot" space | | 0xFFC00000 | 0xFFFFFFFF | ROM | +### IO Bus + +| Address | Area | +|:-------------:|:------------------:| +| 0x50F00000 | IO Base Address | +| 0x50F04000 | SCC | +| 0x50F14000 | Sound Chip (AWACS) | +| 0x50F24000 | CLUT Control | +| 0x50F28000 | Video Control | +| 0x50F2A000 | Interrupt Control | + + ## PCI Power Macs ### Main Memory diff --git a/zdocs/mesh.md b/zdocs/mesh.md new file mode 100644 index 0000000..54e6251 --- /dev/null +++ b/zdocs/mesh.md @@ -0,0 +1,44 @@ +# Registers + +| Register Name | Number | +|:----------------:|:------:| +| R_COUNT0 | 0x0 | +| R_COUNT1 | 0x1 | +| R_FIFO | 0x2 | +| R_CMD | 0x3 | +| R_BUS0STATUS | 0x4 | +| R_BUS1STATUS | 0x5 | +| FIFO_CNT | 0x6 | +| EXCPT | 0x7 | +| ERROR | 0x8 | +| INTMASK | 0x9 | +| INTERRUPT | 0xA | +| SOURCEID | 0xB | +| DESTID | 0xC | +| SYNC | 0xD | +| MESHID | 0xE | +| SEL_TIMEOUT | 0xF | + +# Commands + +| Command Name | Number | +|:----------------:|:------:| +| NOP | 0x0 | +| ARBITRATE | 0x1 | +| SELECT | 0x2 | +| COMMAND | 0x3 | +| STATUS | 0x4 | +| DATAOUT | 0x5 | +| DATAIN | 0x6 | +| MSGOUT | 0x7 | +| MSGIN | 0x8 | +| BUSFREE | 0x9 | +| ENABLE_PARITY | 0xA | +| DISABLE_PARITY | 0xB | +| ENABLE_RESELECT | 0xC | +| DISABLE_RESELECT | 0xD | +| RESET_MESH | 0xE | +| FLUSH_FIFO | 0xF | +| SEQ_DMA | 0x20 | +| SEQ_TARGET | 0x40 | +| SEQ_ATN | 0x80 | \ No newline at end of file diff --git a/zdocs/misc.md b/zdocs/misc.md index cf0a509..0f9264d 100644 --- a/zdocs/misc.md +++ b/zdocs/misc.md @@ -14,12 +14,26 @@ Swim3 is located at 0xF3015000. # Serial -For serial, it replicates the functionality of a Zilog ESCC. There are two different ports - one located at 0xF3013000 for the printer, and the other at 0xF3013020 for the modem. +For serial, it replicates the functionality of a Zilog ESCC. There are two different ports - one located at (MacIOBase) + 0x13000 for the printer, and the other at (MacIOBase) + 0x13020 for the modem. # DBDMA The Description-Based Direct Memory Access relies on memory-based descriptions, minimizing CPU interrupts. +| Channel | Number | +|:-----------------:|:------:| +| SCSI0 | 0x0 | +| FLOPPY | 0x1 | +| ETHERNET TRANSMIT | 0x2 | +| ETHERNET RECIEVE | 0x3 | +| SCC TRANSMIT A | 0x4 | +| SCC RECIEVE A | 0x5 | +| SCC TRANSMIT B | 0x6 | +| SCC RECIEVE B | 0x7 | +| AUDIO OUT | 0x8 | +| AUDIO IN | 0x9 | +| SCSI1 | 0xA | + # SWIM 3 The SWIM 3 (Sanders-Wozniak integrated machine 3) is the floppy drive disk controller. As can be inferred by the name, the SWIM III chip is the improvement of a combination of floppy disk driver designs by Steve Wozniak (who worked on his own floppy drive controller for early Apple computers) and Wendell B. Sander (who worked on an MFM-compatible IBM floppy drive controller). @@ -32,6 +46,20 @@ The floppy drives themselves were provided by Sony. Mac OS relies on 8 KB of NVRAM at minimum to run properly. It's usually found at IOBase (ex.: 0xF3000000 for Power Mac G3 Beige) + 0x60000. +# PMU + +| Command Name | Number | Functionality | +|:----------------:|:------:|:----------------------------:| +| PMUpMgrADB | 0x20 | Send ADB command | +| PMUpMgrADBoff | 0x21 | +| PMUxPramWrite | 0x32 | +| PMUtimeRead | 0x38 | +| PMUxPramRead | 0x3A | +| PMUmaskInts | 0x70 | +| PMUreadINT | 0x78 | +| PMUPmgrPWRoff | 0x7E | +| PMUResetCPU | 0xD0 | + # Miscellaneous The Power Mac G3 Beige has an additional register at 0xFF000004, which is dubbed varyingly as the "cpu-id" (by OpenFirmware), the ""systemReg" (display driver) or "MachineID" (platform driver). diff --git a/zdocs/viacuda.md b/zdocs/viacuda.md index 66a5e85..b4c171e 100644 --- a/zdocs/viacuda.md +++ b/zdocs/viacuda.md @@ -2,6 +2,16 @@ Using a combination of a 6522 along with some integrated circuits, the VIA Cuda The usual offset for a VIA Cuda is IOBase (ex.: 0xF3000000 for Power Mac G3 Beige) + 0x16000. The registers are spaced out by 0x200 bytes on the Heathrow. +# Usage + +The VIA Cuda is emulated in all Power Macs through an interrupt controller. Early Power Macs also used the Parameter RAM. + +Additionally, nodes are included for ADB peripherals, Parameter RAM, Real-Time Clocks, and Power Management. + +It can be run either synchronously or asynchronously. + +However, the CUDA is also slower than the CPU, thus causing a delay that the OS expects. + # Registers Within the emulated CUDA, these registers are spaced apart by 0x200 bytes. Apple themselves recommended avoiding the usage of Handshake Data A. @@ -25,15 +35,35 @@ Within the emulated CUDA, these registers are spaced apart by 0x200 bytes. Apple | Interrupt Enable | IER | 0xE | | Data A | ORA | 0xF | -# Usage +## Data A -The VIA Cuda is emulated in all Power Macs through an interrupt controller. Early Power Macs also used the Parameter RAM. +| Register Bit | Bit Mask | +|:----------------:|:--------:| +| Drive Select | 0x10 | +| Disk Head Select | 0x20 | -Additionally, nodes are included for ADB peripherals, Parameter RAM, Real-Time Clocks, and Power Management. +## Auxiliary Contral -It can be run either synchronously or asynchronously. +| Register Bit | Bit Mask | +|:---------------------------------:|:--------:| +| Port A Latch | 0x1 | +| Port B Latch | 0x2 | +| Timer 2, control | 0x20 | +| Timer 1, continuous counting | 0x40 | +| Timer 1, drives PB7 | 0x80 | -However, the CUDA is also slower than the CPU, thus causing a delay that the OS expects. +## Interrupt Enable + +| Register Bit | Bit Mask | +|:--------------:|:--------:| +| CA2 | 0x1 | +| CA1 | 0x2 | +| Shift Register | 0x2 | +| CB2 | 0x8 | +| CB1 | 0x10 | +| Timer 2 | 0x20 | +| Timer 1 | 0x40 | +| Set interrupt | 0x80 | # Packet Types