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control: support interlaced modes.
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@ -388,7 +388,9 @@ void ControlVideo::enable_display()
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new_height = swatch_params[ControlRegs::VFP-1] - swatch_params[ControlRegs::VAL-1];
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new_height = swatch_params[ControlRegs::VFP-1] - swatch_params[ControlRegs::VAL-1];
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new_width *= clk_divisor;
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new_width *= clk_divisor;
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new_height >>= 1; // FIXME: assume non-interlaced mode for now
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if (this->enables & SCAN_CONTROL) {
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new_height >>= 1;
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}
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this->active_width = new_width;
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this->active_width = new_width;
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this->active_height = new_height;
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this->active_height = new_height;
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@ -431,7 +433,9 @@ void ControlVideo::enable_display()
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this->vert_blank = swatch_params[ControlRegs::VAL-1] +
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this->vert_blank = swatch_params[ControlRegs::VAL-1] +
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(swatch_params[ControlRegs::VSYNC-1] - swatch_params[ControlRegs::VFP-1]);
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(swatch_params[ControlRegs::VSYNC-1] - swatch_params[ControlRegs::VFP-1]);
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this->vert_blank >>= 1;
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if (this->enables & SCAN_CONTROL) {
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this->vert_blank >>= 1;
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}
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this->hori_total = this->hori_blank + new_width;
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this->hori_total = this->hori_blank + new_width;
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this->vert_total = this->vert_blank + new_height;
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this->vert_total = this->vert_blank + new_height;
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@ -78,6 +78,7 @@ enum {
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// Bit definitions for MISC_ENABLES register.
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// Bit definitions for MISC_ENABLES register.
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enum {
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enum {
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SCAN_CONTROL = 1 << 0, // 0 - interlaced, 1 - progressive
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FB_ENDIAN_LITTLE = 1 << 1, // framebuffer endianness: 0 - big, 1 - little
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FB_ENDIAN_LITTLE = 1 << 1, // framebuffer endianness: 0 - big, 1 - little
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VRAM_WIDE_MODE = 1 << 6, // VRAM bus width: 1 - 128bit, 0 - 64bit
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VRAM_WIDE_MODE = 1 << 6, // VRAM bus width: 1 - 128bit, 0 - 64bit
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BLANK_DISABLE = 1 << 11, // 0 - enable blanking, 1 - disable it
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BLANK_DISABLE = 1 << 11, // 0 - enable blanking, 1 - disable it
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