bigmac: fix Gossamer PHY stuff.

This commit is contained in:
Maxim Poliakovski 2023-07-08 14:35:23 +02:00
parent 742003b6f3
commit 4de2afc0c5
2 changed files with 13 additions and 12 deletions

View File

@ -39,7 +39,7 @@ uint16_t BigMac::read(uint16_t reg_offset) {
case BigMacReg::CHIP_ID:
return this->chip_id;
case BigMacReg::MIF_CSR:
return (this->mif_csr_old & ~MIF_CSR::Data_In) | (this->mii_in_bit << 3);
return (this->mif_csr_old & ~Mif_Data_In) | (this->mii_in_bit << 3);
default:
LOG_F(WARNING, "%s: unimplemented register at 0x%X", this->name.c_str(),
reg_offset);
@ -51,12 +51,12 @@ uint16_t BigMac::read(uint16_t reg_offset) {
void BigMac::write(uint16_t reg_offset, uint16_t value) {
switch (reg_offset) {
case BigMacReg::MIF_CSR:
if (value & MIF_CSR::Data_Out_En) {
// send bits one by one on each low-to-high transition of MIF_CSR::Clock
if (((this->mif_csr_old ^ value) & MIF_CSR::Clock) && (value & MIF_CSR::Clock))
this->mii_xmit_bit(!!(value & MIF_CSR::Data_Out));
if (value & Mif_Data_Out_En) {
// send bits one by one on each low-to-high transition of Mif_Clock
if (((this->mif_csr_old ^ value) & Mif_Clock) && (value & Mif_Clock))
this->mii_xmit_bit(!!(value & Mif_Data_Out));
} else {
if (((this->mif_csr_old ^ value) & MIF_CSR::Clock) && (value & MIF_CSR::Clock))
if (((this->mif_csr_old ^ value) & Mif_Clock) && (value & Mif_Clock))
this->mii_rcv_bit();
}
this->mif_csr_old = value;
@ -206,12 +206,13 @@ void BigMac::mii_reset() {
// ===================== Ethernet PHY interface emulation =====================
void BigMac::phy_reset() {
// TODO: add PHY type property to be able to select another PHY (DP83843)
if (this->chip_id == EthernetCellId::Paddington) {
this->phy_oui = 0x1E0400; // LXT970 aka ST10040 PHY
this->phy_model = 0;
this->phy_rev = 0;
} else { // assume Heathrow with LXT907 PHY
this->phy_oui = 0x1E0400; // LXT970 aka ST10040
this->phy_oui = 0; // LXT907 doesn't support MII, MDIO is pulled low
this->phy_model = 0;
this->phy_rev = 0;
}

View File

@ -42,11 +42,11 @@ enum BigMacReg : uint16_t {
};
/* MIF_CSR bit definitions. */
enum MIF_CSR : uint8_t {
Clock = 1 << 0,
Data_Out = 1 << 1,
Data_Out_En = 1 << 2,
Data_In = 1 << 3
enum {
Mif_Clock = 1 << 0,
Mif_Data_Out = 1 << 1,
Mif_Data_Out_En = 1 << 2,
Mif_Data_In = 1 << 3
};
/* MII frame states. */