More tests +fix for fsel

cpu/ppc/ppcdisasm.cpp

@@ -609,68 +609,6 @@ void opc_bx(PPCDisasmContext* ctx)
     ctx->instr_str = my_sprintf("%-8s0x%08X", bx_mnem[ctx->instr_code & 3], dst);
 }
 
-void opc_ori(PPCDisasmContext* ctx)
-{
-    auto ra = (ctx->instr_code >> 16) & 0x1F;
-    auto rs = (ctx->instr_code >> 21) & 0x1F;
-    auto imm = ctx->instr_code & 0xFFFF;
-
-    if (!ra && !rs && !imm && ctx->simplified) {
-        ctx->instr_str = my_sprintf("%-8s", "nop");
-        return;
-    }
-    if (imm == 0 && ctx->simplified) { /* inofficial, produced by IDA */
-        fmt_twoop(ctx->instr_str, "mr", ra, rs);
-        return;
-    }
-    fmt_threeop_uimm(ctx->instr_str, "ori", ra, rs, imm);
-}
-
-void opc_oris(PPCDisasmContext* ctx)
-{
-    auto ra = (ctx->instr_code >> 16) & 0x1F;
-    auto rs = (ctx->instr_code >> 21) & 0x1F;
-    auto imm = ctx->instr_code & 0xFFFF;
-
-    fmt_threeop_uimm(ctx->instr_str, "oris", ra, rs, imm);
-}
-
-void opc_xori(PPCDisasmContext* ctx)
-{
-    auto ra = (ctx->instr_code >> 16) & 0x1F;
-    auto rs = (ctx->instr_code >> 21) & 0x1F;
-    auto imm = ctx->instr_code & 0xFFFF;
-
-    fmt_threeop_uimm(ctx->instr_str, "xori", ra, rs, imm);
-}
-
-void opc_xoris(PPCDisasmContext* ctx)
-{
-    auto ra = (ctx->instr_code >> 16) & 0x1F;
-    auto rs = (ctx->instr_code >> 21) & 0x1F;
-    auto imm = ctx->instr_code & 0xFFFF;
-
-    fmt_threeop_uimm(ctx->instr_str, "xoris", ra, rs, imm);
-}
-
-void opc_andidot(PPCDisasmContext* ctx)
-{
-    auto ra = (ctx->instr_code >> 16) & 0x1F;
-    auto rs = (ctx->instr_code >> 21) & 0x1F;
-    auto imm = ctx->instr_code & 0xFFFF;
-
-    fmt_threeop_uimm(ctx->instr_str, "andi.", ra, rs, imm);
-}
-
-void opc_andisdot(PPCDisasmContext* ctx)
-{
-    auto ra = (ctx->instr_code >> 16) & 0x1F;
-    auto rs = (ctx->instr_code >> 21) & 0x1F;
-    auto imm = ctx->instr_code & 0xFFFF;
-
-    fmt_threeop_uimm(ctx->instr_str, "andis.", ra, rs, imm);
-}
-
 void opc_sc(PPCDisasmContext* ctx)
 {
     ctx->instr_str = my_sprintf("%-8s", "sc");
@@ -1447,15 +1385,12 @@ void opc_group63(PPCDisasmContext* ctx)
         return;
 
     case 23: /* fsel */
-        strcpy(opcode, "fsel");
+        strcpy(opcode, opc_flt_ext_arith[23]);
 
         if (rc_set)
             strcat(opcode, ".");
 
-        if ((rc != 0) | (ra != 0))
-            opc_illegal(ctx);
-        else
-            fmt_fourop_flt(ctx->instr_str, opcode, rs, ra, rb, rc);
+        fmt_fourop_flt(ctx->instr_str, opcode, rs, ra, rc, rb);
 
         return;
 

cpu/ppc/test/ppcdisasmtest.csv

@@ -146,12 +146,12 @@
 0xFFF00100,0x7C843515,addeo.,r4,r4,r6
 0xFFF00100,0x7CE80194,addze,r7,r8
 0xFFF00100,0x7C800195,addze.,r4,r0
-# FIXME addzeo
-# FIXME addzeo.
-# FIXME addme
-# FIXME addme.
-# FIXME addmeo
-# FIXME addmeo.
+0xFFF00100,0x7C000594,addzeo,r0,r0
+0xFFF00100,0x7C000595,addzeo.,r0,r0
+0xFFF00100,0x7F9C01D4,addme,r28,r28
+0xFFF00100,0x7D0801D5,addme.,r8,r8
+0xFFF00100,0x7D0805D4,addmeo,r8,r8
+0xFFF00100,0x7D0805D5,addmeo.,r8,r8
 0xFFF00100,0x7F03EA14,add,r24,r3,r29
 0xFFF00100,0x7ED6E215,add.,r22,r22,r28
 0xFFF00100,0x7D040614,addo,r8,r4,r0
@@ -231,6 +231,7 @@
 0xFFF00100,0x6744AAAA,oris,r4,r26,0xAAAA
 
 # synchronization instructions
+0xFFF00100,0x7FEF2E2C,lhbrx,r31,r15,r5
 0xFFF00100,0x7D201828,lwarx,r9,0,r3
 0xFFF00100,0x7D20192D,stwcx.,r9,0,r3
 0xFFF00100,0x7FAB052C,stwbrx,r29,r11,r0
@@ -285,9 +286,16 @@
 #floating point operations 
 0xFFF00100,0xFC03282A,fadd,f0,f3,f5
 0xFFF00100,0xFDAD682B,fadd.,f13,f13,f13
+0xFFF00100,0xFC0D6028,fsub,f0,f13,f12
+0xFFF00100,0xFC2107F2,fmul,f1,f1,f31
+0xFFF00100,0xFF2C07F3,fmul.,f25,f12,f31
 0xFFF00100,0xFC0D0024,fdiv,f0,f13,f0
 0xFFF00100,0xFC2B0025,fdiv.,f1,f11,f0
 0xFFF00100,0xFD8952FC,fnmsub,f12,f9,f11,f10
+0xFFF00100,0xEDA66278,fmsubs,f13,f6,f9,f12
+0xFFF00100,0xEDA66279,fmsubs.,f13,f6,f9,f12
+0xFFF00100,0xEC00637C,fnmsubs,f0,f0,f13,f12
+0xFFF00100,0xFE0820AF,fsel.,f16,f8,f2,f4
 0xFFF00100,0xFD600110,fnabs,f11,f0
 0xFFF00100,0xFD002034,frsqrte,f8,f4
 0xFFF00100,0x7FF957AE,stfiwx,f31,r25,r10