From 593230f3263e91ca6b7685b454209c61fb00626c Mon Sep 17 00:00:00 2001
From: dingusdev <kataetheweirdo@gmail.com>
Date: Sat, 23 Jan 2021 22:44:14 -0700
Subject: [PATCH] Disassembler - floating point instruction fixes

---
 cpu/ppc/ppcdisasm.cpp          | 48 ++++++++++++++++++++++++++--------
 cpu/ppc/test/ppcdisasmtest.csv |  9 +++++++
 2 files changed, 46 insertions(+), 11 deletions(-)

diff --git a/cpu/ppc/ppcdisasm.cpp b/cpu/ppc/ppcdisasm.cpp
index d4309bf..1c60fd2 100644
--- a/cpu/ppc/ppcdisasm.cpp
+++ b/cpu/ppc/ppcdisasm.cpp
@@ -1737,7 +1737,7 @@ void opc_group63(PPCDisasmContext* ctx) {
         if (ra != 0)
             opc_illegal(ctx);
         else
-            ctx->instr_str = my_sprintf("%-8sr%d, r%d", opcode, rs, rb);
+            ctx->instr_str = my_sprintf("%-8sf%d, f%d", opcode, rs, rb);
         break;
     case 64:
         strcpy(opcode, "mcrfs");
@@ -1750,31 +1750,52 @@ void opc_group63(PPCDisasmContext* ctx) {
         if (rc_set)
             strcat(opcode, ".");
 
-        ctx->instr_str = my_sprintf("%-8scrb%d", opcode, rs);
+        ctx->instr_str = my_sprintf("%-8s%d", opcode, rs);
         break;
     case 72: /* fmr */
         if (ra != 0)
             opc_illegal(ctx);
-        else
-            ctx->instr_str = my_sprintf("%-8sr%d, r%d", "fmr", rs, rb);
+        else {
+            strcpy(opcode, "fmr");
+
+            if (rc_set)
+                strcat(opcode, ".");
+
+            ctx->instr_str = my_sprintf("%-8sf%d, f%d", opcode, rs, rb);
+        }
         break;
     case 134: /* mtfsfi */
         if (ra != 0)
             opc_illegal(ctx);
-        else
-            ctx->instr_str = my_sprintf("%-8scr%d, r%d", "mtfsfi", (rs >> 2), (rb >> 1));
+        else {
+            strcpy(opcode, "mtfsfi");
+            if (rc_set)
+                strcat(opcode, ".");
+
+            ctx->instr_str = my_sprintf("%-8scr%d, %d", opcode, (rs >> 2), (rb >> 1));
+        }
         break;
     case 136: /* fnabs */
         if (ra != 0)
             opc_illegal(ctx);
-        else
-            ctx->instr_str = my_sprintf("%-8sf%d, f%d", "fnabs", rs, rb);
+        else {
+            strcpy(opcode, "fnabs");
+            if (rc_set)
+                strcat(opcode, ".");
+
+            ctx->instr_str = my_sprintf("%-8sf%d, f%d", opcode, rs, rb);
+        }
         break;
     case 264: /* fabs */
         if (ra != 0)
             opc_illegal(ctx);
-        else
-            ctx->instr_str = my_sprintf("%-8s%d, f%d, f%d", "fabs", rs, rb);
+        else {
+            strcpy(opcode, "fabs");
+            if (rc_set)
+                strcat(opcode, ".");
+
+            ctx->instr_str = my_sprintf("%-8sf%d, f%d", opcode, rs, rb);
+        }
         break;
     case 583: /* mffs */
         strcpy(opcode, "mffs");
@@ -1788,7 +1809,12 @@ void opc_group63(PPCDisasmContext* ctx) {
             ctx->instr_str = my_sprintf("%-8sf%d", opcode, rs);
         break;
     case 711: /* mtfsf */
-        ctx->instr_str = my_sprintf("%-8sfm%d, r%d", "mtfsf", fm, rb);
+        strcpy(opcode, "mtfsf");
+
+        if (rc_set)
+            strcat(opcode, ".");
+
+        ctx->instr_str = my_sprintf("%-8s%d, f%d", opcode, fm, rb);
         break;
     default:
         opc_illegal(ctx);
diff --git a/cpu/ppc/test/ppcdisasmtest.csv b/cpu/ppc/test/ppcdisasmtest.csv
index 77de4d6..e470688 100644
--- a/cpu/ppc/test/ppcdisasmtest.csv
+++ b/cpu/ppc/test/ppcdisasmtest.csv
@@ -362,6 +362,8 @@
 0xFFF00100,0xEDA66279,fmsubs.,f13,f6,f9,f12
 0xFFF00100,0xEC00637C,fnmsubs,f0,f0,f13,f12
 0xFFF00100,0xFE0820AF,fsel.,f16,f8,f2,f4
+0xFFF00100,0xFDA06050,fneg,f13,f12
+0xFFF00100,0xFD80EA10,fabs,f12,f29
 0xFFF00100,0xFD600110,fnabs,f11,f0
 0xFFF00100,0xFD002034,frsqrte,f8,f4
 0xFFF00100,0x7FF957AE,stfiwx,f31,r25,r10
@@ -369,6 +371,12 @@
 0xFFF00100,0xFC201019,frsp.,f1,f2
 0xFFF00100,0xFDA0F81E,fctiwz,f13,f31
 0xFFF00100,0xFCA0501D,fctiw.,f5,f10
+0xFFF00100,0xFD9C0080,mcrfs,cr3,cr7
+0xFFF00100,0xFDFE058E,mtfsf,255,f0
+0xFFF00100,0xFF80F10C,mtfsfi,cr7,15
+0xFFF00100,0xFF80F10D,mtfsfi.,cr7,15
+0xFFF00100,0xFC406890,fmr,f2,f13
+0xFFF00100,0xFC20E891,fmr.,f1,f29
 
 # compare instructions
 0xFFF00100,0x7C15A000,cmpw,r21,r20
@@ -388,6 +396,7 @@
 0xFFF00100,0x7CBC04AA,lswi,r5,r28,0x20
 0xFFF00100,0x7FEF2C2A,lswx,r31,r15,r5
 0xFFF00100,0x7E000400,mcrxr,cr4
+0xFFF00100,0xFDC0008C,mtfsb0,14
 0xFFF00100,0xFFE0004C,mtfsb1,31
 0xFFF00100,0xFFE0048F,mffs.,f31
 0xFFF00100,0x7C2000A6,mfmsr,r1