control: MISC_ENABLES is a 12 bit register.
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@ -80,6 +80,8 @@ enum {
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enum {
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SCAN_CONTROL = 1 << 0, // 0 - interlaced, 1 - progressive
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FB_ENDIAN_LITTLE = 1 << 1, // framebuffer endianness: 0 - big, 1 - little
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// ? = 1 << 4,
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// ? = 1 << 5,
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VRAM_WIDE_MODE = 1 << 6, // VRAM bus width: 1 - 128bit, 0 - 64bit
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BLANK_DISABLE = 1 << 11, // 0 - enable blanking, 1 - disable it
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};
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@ -153,7 +155,7 @@ private:
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int strobe_counter = 0;
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uint8_t num_banks = 0;
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uint8_t cur_mon_id = 0;
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uint8_t enables = 0;
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uint16_t enables = 0;
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uint8_t int_enable = 0;
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uint8_t int_status = 0;
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uint8_t last_int_status = -1;
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