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https://github.com/dingusdev/dingusppc.git
synced 2024-12-25 03:29:38 +00:00
Revert strcat_s/strcpy_s to strcat/strcpy.
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37078ddfe1
commit
5d5c568714
@ -34,7 +34,7 @@ const char* bx_mnem[4] = {
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const char* bclrx_mnem[2] = {
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"bclr", "bclrl"
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};
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};
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const char* bcctrx_mnem[2] = {
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"bcctr", "bcctrl"
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@ -46,7 +46,7 @@ const char* br_cond[8] = { /* simplified branch conditions */
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const char* bclrx_cond[8] = { /* simplified branch conditions */
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"gelr", "lelr", "nelr", "nslr", "ltlr", "gtlr", "eqlr", "solr"
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};
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};
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const char* bcctrx_cond[8] = { /* simplified branch conditions */
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"gectr", "lectr", "nectr", "nsctr", "ltctr", "gtctr", "eqctr", "soctr"
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@ -245,10 +245,10 @@ void generic_bcx(PPCDisasmContext* ctx, uint32_t bo, uint32_t bi, uint32_t dst)
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char opcode[10] = "bc";
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if (ctx->instr_code & 1) {
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strcat_s(opcode, "l"); /* add suffix "l" if the LK bit is set */
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strcat(opcode, "l"); /* add suffix "l" if the LK bit is set */
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}
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if (ctx->instr_code & 2) {
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strcat_s(opcode, "a"); /* add suffix "a" if the AA bit is set */
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strcat(opcode, "a"); /* add suffix "a" if the AA bit is set */
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}
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ctx->instr_str = my_sprintf("%-8s%d, %d, 0x%08X", opcode, bo, bi, dst);
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}
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@ -258,7 +258,7 @@ void generic_bcctrx(PPCDisasmContext* ctx, uint32_t bo, uint32_t bi)
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char opcode[10] = "bcctr";
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if (ctx->instr_code & 1) {
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strcat_s(opcode, "l"); /* add suffix "l" if the LK bit is set */
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strcat(opcode, "l"); /* add suffix "l" if the LK bit is set */
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}
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ctx->instr_str = my_sprintf("%-8s%d, %d, 0x%08X", opcode, bo, bi);
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@ -269,7 +269,7 @@ void generic_bclrx(PPCDisasmContext* ctx, uint32_t bo, uint32_t bi)
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char opcode[10] = "bclr";
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if (ctx->instr_code & 1) {
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strcat_s(opcode, "l"); /* add suffix "l" if the LK bit is set */
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strcat(opcode, "l"); /* add suffix "l" if the LK bit is set */
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}
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ctx->instr_str = my_sprintf("%-8s%d, %d, 0x%08X", opcode, bo, bi);
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@ -299,34 +299,34 @@ void opc_bcx(PPCDisasmContext* ctx)
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}
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if (!(bo & 4)) {
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strcat_s(opcode, "d");
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strcat_s(opcode, (bo & 2) ? "z" : "nz");
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strcat(opcode, "d");
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strcat(opcode, (bo & 2) ? "z" : "nz");
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if (!(bo & 0x10)) {
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strcat_s(opcode, (bo & 8) ? "t" : "f");
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strcat(opcode, (bo & 8) ? "t" : "f");
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if (cr) {
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strcat_s(operands, "4*cr0+");
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strcat(operands, "4*cr0+");
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operands[4] = cr + '0';
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}
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strcat_s(operands, br_cond[4 + (bi & 3)]);
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strcat_s(operands, ", ");
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strcat(operands, br_cond[4 + (bi & 3)]);
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strcat(operands, ", ");
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}
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}
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else { /* CTR ignored */
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strcat_s(opcode, br_cond[((bo >> 1) & 4) | (bi & 3)]);
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strcat(opcode, br_cond[((bo >> 1) & 4) | (bi & 3)]);
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if (cr) {
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strcat_s(operands, "cr0, ");
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strcat(operands, "cr0, ");
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operands[2] = cr + '0';
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}
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}
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if (ctx->instr_code & 1) {
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strcat_s(opcode, "l"); /* add suffix "l" if the LK bit is set */
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strcat(opcode, "l"); /* add suffix "l" if the LK bit is set */
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}
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if (ctx->instr_code & 2) {
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strcat_s(opcode, "a"); /* add suffix "a" if the AA bit is set */
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strcat(opcode, "a"); /* add suffix "a" if the AA bit is set */
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}
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if (bo & 1) { /* incorporate prediction bit if set */
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strcat_s(opcode, (ctx->instr_code & 0x8000) ? "-" : "+");
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strcat(opcode, (ctx->instr_code & 0x8000) ? "-" : "+");
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}
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ctx->instr_str = my_sprintf("%-8s%s0x%08X", opcode, operands, dst);
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@ -354,31 +354,31 @@ void opc_bcctrx(PPCDisasmContext* ctx)
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}
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if (!(bo & 4)) {
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strcat_s(opcode, "d");
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strcat_s(opcode, (bo & 2) ? "z" : "nz");
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strcat(opcode, "d");
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strcat(opcode, (bo & 2) ? "z" : "nz");
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if (!(bo & 0x10)) {
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strcat_s(opcode, (bo & 8) ? "t" : "f");
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strcat(opcode, (bo & 8) ? "t" : "f");
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if (cr) {
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strcat_s(operands, "4*cr0+");
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strcat(operands, "4*cr0+");
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operands[4] = cr + '0';
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}
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strcat_s(operands, br_cond[4 + (bi & 3)]);
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strcat_s(operands, ", ");
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strcat(operands, br_cond[4 + (bi & 3)]);
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strcat(operands, ", ");
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}
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}
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else { /* CTR ignored */
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strcat_s(opcode, br_cond[((bo >> 1) & 4) | (bi & 3)]);
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strcat(opcode, br_cond[((bo >> 1) & 4) | (bi & 3)]);
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if (cr) {
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strcat_s(operands, "cr0, ");
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strcat(operands, "cr0, ");
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operands[2] = cr + '0';
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}
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}
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if (ctx->instr_code & 1) {
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strcat_s(opcode, "l"); /* add suffix "l" if the LK bit is set */
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strcat(opcode, "l"); /* add suffix "l" if the LK bit is set */
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}
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if (bo & 1) { /* incorporate prediction bit if set */
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strcat_s(opcode, (ctx->instr_code & 0x8000) ? "-" : "+");
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strcat(opcode, (ctx->instr_code & 0x8000) ? "-" : "+");
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}
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ctx->instr_str = my_sprintf("%-8s%s0x%08X", opcode, operands);
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@ -406,31 +406,31 @@ void opc_bclrx(PPCDisasmContext* ctx)
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}
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if (!(bo & 4)) {
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strcat_s(opcode, "d");
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strcat_s(opcode, (bo & 2) ? "z" : "nz");
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strcat(opcode, "d");
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strcat(opcode, (bo & 2) ? "z" : "nz");
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if (!(bo & 0x10)) {
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strcat_s(opcode, (bo & 8) ? "t" : "f");
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strcat(opcode, (bo & 8) ? "t" : "f");
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if (cr) {
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strcat_s(operands, "4*cr0+");
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strcat(operands, "4*cr0+");
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operands[4] = cr + '0';
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}
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strcat_s(operands, br_cond[4 + (bi & 3)]);
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strcat_s(operands, ", ");
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strcat(operands, br_cond[4 + (bi & 3)]);
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strcat(operands, ", ");
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}
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}
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else { /* CTR ignored */
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strcat_s(opcode, br_cond[((bo >> 1) & 4) | (bi & 3)]);
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strcat(opcode, br_cond[((bo >> 1) & 4) | (bi & 3)]);
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if (cr) {
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strcat_s(operands, "cr0, ");
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strcat(operands, "cr0, ");
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operands[2] = cr + '0';
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}
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}
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if (ctx->instr_code & 1) {
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strcat_s(opcode, "l"); /* add suffix "l" if the LK bit is set */
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strcat(opcode, "l"); /* add suffix "l" if the LK bit is set */
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}
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if (bo & 1) { /* incorporate prediction bit if set */
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strcat_s(opcode, (ctx->instr_code & 0x8000) ? "-" : "+");
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strcat(opcode, (ctx->instr_code & 0x8000) ? "-" : "+");
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}
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ctx->instr_str = my_sprintf("%-8s%s0x%08X", opcode, operands);
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@ -582,11 +582,11 @@ void opc_group31(PPCDisasmContext* ctx)
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opc_illegal(ctx);
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}
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else {
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strcpy_s(opcode, opc_subs[index]);
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strcpy(opcode, opc_subs[index]);
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if (ext_opc & 0x200) /* check OE bit */
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strcat_s(opcode, "o");
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strcat(opcode, "o");
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if (rc_set)
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strcat_s(opcode, ".");
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strcat(opcode, ".");
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if (index == 3 || index == 6 || index == 7 || index == 11 ||
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index == 15) { /* ugly check for two-operands instructions */
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if (rb != 0)
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@ -605,11 +605,11 @@ void opc_group31(PPCDisasmContext* ctx)
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opc_illegal(ctx);
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}
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else {
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strcpy_s(opcode, opc_adds[index]);
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strcpy(opcode, opc_adds[index]);
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if (ext_opc & 0x200) /* check OE bit */
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strcat_s(opcode, "o");
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strcat(opcode, "o");
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if (rc_set)
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strcat_s(opcode, ".");
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strcat(opcode, ".");
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if (index == 6 || index == 7) {
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if (rb != 0)
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opc_illegal(ctx);
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@ -627,11 +627,11 @@ void opc_group31(PPCDisasmContext* ctx)
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opc_illegal(ctx);
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}
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else {
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strcpy_s(opcode, opc_muldivs[index]);
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strcpy(opcode, opc_muldivs[index]);
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if (ext_opc & 0x200) /* check OE bit */
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strcat_s(opcode, "o");
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strcat(opcode, "o");
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if (rc_set)
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strcat_s(opcode, ".");
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strcat(opcode, ".");
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if ((!index || index == 2) && (ext_opc & 0x200))
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opc_illegal(ctx);
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else
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@ -644,13 +644,13 @@ void opc_group31(PPCDisasmContext* ctx)
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fmt_twoop(ctx->instr_str, rc_set ? "mr." : "mr", ra, rs);
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}
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else {
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strcpy_s(opcode, opc_logic[index]);
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strcpy(opcode, opc_logic[index]);
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if (!strlen(opcode)) {
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opc_illegal(ctx);
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}
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else {
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if (rc_set)
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strcat_s(opcode, ".");
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strcat(opcode, ".");
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fmt_threeop(ctx->instr_str, opcode, ra, rs, rb);
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}
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}
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@ -785,4 +785,4 @@ string disassemble_single(PPCDisasmContext* ctx)
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ctx->instr_addr += 4;
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return ctx->instr_str;
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}
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}
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