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Replace OpcodeGrabber map with an array of function pointers.
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ppcemumain.h
20
ppcemumain.h
@ -605,26 +605,6 @@ extern void ppc_psq_stu();
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extern void ppc_main_opcode();
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//A listing of all of the available opcodes on the PPC.
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static std::map<uint8_t, PPCOpcode> OpcodeGrabber =
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{{0, &ppc_illegalop}, {1, &ppc_illegalop}, {2, &ppc_illegalop}, {3, &ppc_twi},
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{4, &ppc_opcode4}, {5, &ppc_illegalop}, {6, &ppc_illegalop}, {7, &ppc_mulli},
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{8, &ppc_subfic}, {9, &power_dozi}, {10, &ppc_cmpli}, {11, &ppc_cmpi},
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{12, &ppc_addic}, {13, &ppc_addicdot}, {14, &ppc_addi}, {15, &ppc_addis},
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{16, &ppc_opcode16}, {17, &ppc_sc}, {18, &ppc_opcode18}, {19, &ppc_opcode19},
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{20, &ppc_rlwimi}, {21, &ppc_rlwinm}, {22, &power_rlmi}, {23, &ppc_rlwnm},
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{24, &ppc_ori}, {25, &ppc_oris}, {26, &ppc_xori}, {27, &ppc_xoris},
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{28, &ppc_andidot}, {29, &ppc_andisdot}, {30, &ppc_illegalop}, {31, &ppc_opcode31},
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{32, &ppc_lwz}, {33, &ppc_lwzu}, {34, &ppc_lbz}, {35, &ppc_lbzu},
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{36, &ppc_stw}, {37, &ppc_stwu}, {38, &ppc_stb}, {39, &ppc_stbu},
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{40, &ppc_lhz}, {41, &ppc_lhzu}, {42, &ppc_lha}, {43, &ppc_lhau},
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{44, &ppc_sth}, {45, &ppc_sthu}, {46, &ppc_lmw}, {47, &ppc_stmw},
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{48, &ppc_lfs}, {49, &ppc_lfsu}, {50, &ppc_lfd}, {51, &ppc_lfdu},
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{52, &ppc_stfs}, {53, &ppc_stfsu}, {54, &ppc_stfd}, {55, &ppc_stfdu},
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{56, &ppc_psq_l}, {57, &ppc_psq_lu}, {58, &ppc_illegalop}, {59, &ppc_opcode59},
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{60, &ppc_psq_st}, {61, &ppc_psq_stu}, {62, &ppc_illegalop}, {63, &ppc_opcode63}};
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//All of the opcodes possible are generated from the first 6 bits
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//of each instruction given by the processor.
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@ -58,6 +58,25 @@
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uint32_t strwrd_replace_value;
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/** Lookup tables. */
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/** Primary opcode (bits 0...5) lookup table. */
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static PPCOpcode OpcodeGrabber[] = {
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ppc_illegalop, ppc_illegalop, ppc_illegalop, ppc_twi, ppc_opcode4,
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ppc_illegalop, ppc_illegalop, ppc_mulli, ppc_subfic, power_dozi,
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ppc_cmpli, ppc_cmpi, ppc_addic, ppc_addicdot, ppc_addi,
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ppc_addis, ppc_opcode16, ppc_sc, ppc_opcode18, ppc_opcode19,
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ppc_rlwimi, ppc_rlwinm, power_rlmi, ppc_rlwnm, ppc_ori,
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ppc_oris, ppc_xori, ppc_xoris, ppc_andidot, ppc_andisdot,
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ppc_illegalop, ppc_opcode31, ppc_lwz, ppc_lwzu, ppc_lbz,
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ppc_lbzu, ppc_stw, ppc_stwu, ppc_stb, ppc_stbu,
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ppc_lhz, ppc_lhzu, ppc_lha, ppc_lhau, ppc_sth,
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ppc_sthu, ppc_lmw, ppc_stmw, ppc_lfs, ppc_lfsu,
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ppc_lfd, ppc_lfdu, ppc_stfs, ppc_stfsu, ppc_stfd,
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ppc_stfdu, ppc_psq_l, ppc_psq_lu, ppc_illegalop, ppc_illegalop,
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ppc_psq_st, ppc_psq_stu, ppc_illegalop, ppc_opcode63
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};
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/**
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Extract the registers desired and the values of the registers
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This also takes the MSR into account, mainly to determine
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