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https://github.com/dingusdev/dingusppc.git
synced 2025-01-24 13:30:26 +00:00
atimach64gx: PCI BAR changes.
Support changing BAR address.
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parent
49f7da4402
commit
691fcfb657
@ -43,9 +43,11 @@ AtiMach64Gx::AtiMach64Gx()
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// set up PCI configuration space header
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this->vendor_id = PCI_VENDOR_ATI;
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this->device_id = ATI_MACH64_GX_DEV_ID;
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this->class_rev = (0x030000 << 8) | 3;
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this->setup_bars({{0, 0xFF000000UL}}); // declare main aperture (16MB)
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this->class_rev = (0x030000 << 8) | 0x03;
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for (int i = 0; i < this->aperture_count; i++) {
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this->bars_cfg[i] = (uint32_t)(-this->aperture_size[i] | this->aperture_flag[i]);
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}
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this->finish_config_bars();
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this->pci_notify_bar_change = [this](int bar_num) {
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this->notify_bar_change(bar_num);
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@ -61,32 +63,35 @@ AtiMach64Gx::AtiMach64Gx()
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this->disp_id = std::unique_ptr<DisplayID> (new DisplayID(0x07, 0x3A));
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// allocate video RAM
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this->vram_size = 2 << 20;
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this->vram_size = 2 << 20; // 2MB ; up to 6MB supported
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this->vram_ptr = std::unique_ptr<uint8_t[]> (new uint8_t[this->vram_size]);
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// set up RAMDAC identification
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this->regs[ATI_CONFIG_STAT0] = 1 << 9;
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}
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void AtiMach64Gx::change_one_bar(uint32_t &aperture, uint32_t aperture_size, uint32_t aperture_new, int bar_num) {
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if (aperture != aperture_new) {
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if (aperture)
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this->host_instance->pci_unregister_mmio_region(aperture, aperture_size, this);
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aperture = aperture_new;
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if (aperture)
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this->host_instance->pci_register_mmio_region(aperture, aperture_size, this);
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LOG_F(INFO, "%s: aperture[%d] set to 0x%08X", this->name.c_str(), bar_num, aperture);
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}
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}
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void AtiMach64Gx::notify_bar_change(int bar_num)
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{
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if (bar_num) // only BAR0 is supported
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return;
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if (this->aperture_base != (this->bars[bar_num] & 0xFFFFFFF0UL)) {
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if (this->aperture_base) {
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LOG_F(WARNING, "AtiMach64Gx: deallocating I/O memory not implemented");
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}
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this->aperture_base = this->bars[0] & 0xFFFFFFF0UL;
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this->host_instance->pci_register_mmio_region(this->aperture_base,
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APERTURE_SIZE, this);
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{
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change_one_bar(this->aperture_base[bar_num], this->aperture_size[bar_num], this->bars[bar_num] & ~15, bar_num);
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// copy aperture address to CONFIG_CNTL:CFG_MEM_AP_LOC
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this->config_cntl = (this->config_cntl & 0xFFFFC00FUL) |
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((this->aperture_base >> 18) & 0x3FF0U);
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LOG_F(INFO, "AtiMach64Gx: aperture address set to 0x%08X", this->aperture_base);
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insert_bits<uint32_t>(this->config_cntl, this->aperture_base[0] >> 22, ATI_CFG_MEM_AP_LOC, ATI_CFG_MEM_AP_LOC_size);
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}
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}
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@ -263,17 +268,21 @@ void AtiMach64Gx::write_reg(uint32_t reg_offset, uint32_t value, uint32_t size)
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uint32_t AtiMach64Gx::read(uint32_t rgn_start, uint32_t offset, int size)
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{
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if (rgn_start == this->aperture_base) {
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if (rgn_start == this->aperture_base[0]) {
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if (offset < this->vram_size) {
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return read_mem(&this->vram_ptr[offset], size);
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} else if (offset >= this->mm_regs_offset) {
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}
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if (offset >= this->mm_regs_offset) {
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return BYTESWAP_SIZED(read_reg(offset - this->mm_regs_offset, size), size);
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}
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return 0;
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}
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// memory mapped expansion ROM region
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if (rgn_start == this->exp_rom_addr && offset < this->exp_rom_size) {
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return read_mem(&this->exp_rom_data[offset], size);
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if (rgn_start == this->exp_rom_addr) {
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if (offset < this->exp_rom_size)
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return read_mem(&this->exp_rom_data[offset], size);
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return 0;
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}
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return 0;
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@ -281,12 +290,14 @@ uint32_t AtiMach64Gx::read(uint32_t rgn_start, uint32_t offset, int size)
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void AtiMach64Gx::write(uint32_t rgn_start, uint32_t offset, uint32_t value, int size)
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{
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if (rgn_start == this->aperture_base) {
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if (rgn_start == this->aperture_base[0]) {
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if (offset < this->vram_size) {
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write_mem(&this->vram_ptr[offset], value, size);
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} else if (offset >= this->mm_regs_offset) {
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write_reg(offset - this->mm_regs_offset, BYTESWAP_SIZED(value, size), size);
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return write_mem(&this->vram_ptr[offset], value, size);
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}
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if (offset >= this->mm_regs_offset) {
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return write_reg(offset - this->mm_regs_offset, BYTESWAP_SIZED(value, size), size);
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}
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return;
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}
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}
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@ -64,10 +64,18 @@ protected:
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void rgb514_write_ind_reg(uint8_t reg_addr, uint8_t value);
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private:
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void change_one_bar(uint32_t &aperture, uint32_t aperture_size, uint32_t aperture_new, int bar_num);
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uint32_t regs[256] = {}; // internal registers
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int vram_size;
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uint32_t aperture_base;
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// main aperture (16MB)
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const uint32_t aperture_count = 1;
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const uint32_t aperture_size[1] = { 0x1000000 };
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const uint32_t aperture_flag[1] = { 0 };
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uint32_t aperture_base[1] = { 0 };
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uint32_t config_cntl;
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uint32_t mm_regs_offset;
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int crtc_enable = 0;
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