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https://github.com/dingusdev/dingusppc.git
synced 2025-01-11 05:29:43 +00:00
Support more than one I/O region per device.
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@ -70,7 +70,8 @@ AddressMapEntry last_dma_area = { 0 };
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ret = OP((ENTRY).mem_ptr + ((ADDR) - (ENTRY).start)); \
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} \
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else if (entry->type & RT_MMIO) { \
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ret = entry->devobj->read((ADDR) - entry->start, (SIZE)); \
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ret = entry->devobj->read(entry->start, (ADDR) - entry->start, \
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(SIZE)); \
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} \
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else { \
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LOG_F(ERROR, "Please check your address map! \n"); \
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@ -99,10 +100,11 @@ AddressMapEntry last_dma_area = { 0 };
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OP((ENTRY).mem_ptr + ((ADDR) - (ENTRY).start), (VAL)); \
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} \
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else if (entry->type & RT_MMIO) { \
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entry->devobj->write((ADDR) - entry->start, (VAL), (SIZE)); \
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entry->devobj->write(entry->start, (ADDR) - entry->start, \
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(VAL), (SIZE)); \
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} \
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else { \
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LOG_F(ERROR, "Please check your address map!\n"); \
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LOG_F(ERROR, "Please check your address map!\n"); \
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} \
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} \
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else { \
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@ -116,7 +116,7 @@ void HeathrowIC::dma_write(uint32_t offset, uint32_t value, int size)
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}
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uint32_t HeathrowIC::read(uint32_t offset, int size)
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uint32_t HeathrowIC::read(uint32_t reg_start, uint32_t offset, int size)
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{
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uint32_t res = 0;
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@ -153,7 +153,7 @@ uint32_t HeathrowIC::read(uint32_t offset, int size)
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return res;
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}
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void HeathrowIC::write(uint32_t offset, uint32_t value, int size)
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void HeathrowIC::write(uint32_t reg_start, uint32_t offset, uint32_t value, int size)
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{
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LOG_F(9, "%s: writing to offset %x \n", this->name.c_str(), offset);
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@ -51,10 +51,11 @@ public:
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return type == HWCompType::MMIO_DEV;
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};
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uint32_t read(uint32_t offset, int size) {
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uint32_t read(uint32_t reg_start, uint32_t offset, int size) {
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return ((!offset && size == 2) ? this->id : 0); };
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void write(uint32_t offset, uint32_t value, int size) {}; /* not writable */
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void write(uint32_t reg_start, uint32_t offset, uint32_t value, int size)
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{}; /* not writable */
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private:
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uint16_t id;
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@ -102,8 +102,8 @@ public:
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void pci_cfg_write(uint32_t reg_offs, uint32_t value, uint32_t size);
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/* MMIO device methods */
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uint32_t read(uint32_t offset, int size);
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void write(uint32_t offset, uint32_t value, int size);
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uint32_t read(uint32_t reg_start, uint32_t offset, int size);
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void write(uint32_t reg_start, uint32_t offset, uint32_t value, int size);
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protected:
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uint32_t dma_read(uint32_t offset, int size);
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@ -35,13 +35,14 @@ enum RangeType {
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at some other address) */
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};
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/** Defines the format for the address map entry. */
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typedef struct AddressMapEntry {
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uint32_t start; /* first address of the corresponding range */
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uint32_t end; /* last address of the corresponding range */
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uint32_t mirror; /* mirror address for RT_MIRROR */
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uint32_t type; /* range type */
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MMIODevice *devobj; /* pointer to device object */
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unsigned char *mem_ptr; /* direct pointer to data for memory objects */
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MMIODevice* devobj; /* pointer to device object */
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unsigned char* mem_ptr; /* direct pointer to data for memory objects */
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} AddressMapEntry;
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@ -29,8 +29,8 @@ along with this program. If not, see <https://www.gnu.org/licenses/>.
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/** Abstract class representing a simple, memory-mapped I/O device */
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class MMIODevice : public HWComponent {
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public:
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virtual uint32_t read(uint32_t offset, int size) = 0;
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virtual void write(uint32_t offset, uint32_t value, int size) = 0;
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virtual uint32_t read(uint32_t reg_start, uint32_t offset, int size) = 0;
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virtual void write(uint32_t reg_start, uint32_t offset, uint32_t value, int size) = 0;
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virtual ~MMIODevice() = default;
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};
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@ -61,7 +61,7 @@ bool MPC106::supports_type(HWCompType type)
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}
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}
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uint32_t MPC106::read(uint32_t offset, int size)
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uint32_t MPC106::read(uint32_t reg_start, uint32_t offset, int size)
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{
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if (offset >= 0x200000) {
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if (this->config_addr & 0x80) // process only if bit E (enable) is set
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@ -73,7 +73,7 @@ uint32_t MPC106::read(uint32_t offset, int size)
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return 0;
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}
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void MPC106::write(uint32_t offset, uint32_t value, int size)
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void MPC106::write(uint32_t reg_start, uint32_t offset, uint32_t value, int size)
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{
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if (offset < 0x200000) {
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this->config_addr = value;
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@ -52,8 +52,8 @@ public:
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bool supports_type(HWCompType type);
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uint32_t read(uint32_t offset, int size);
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void write(uint32_t offset, uint32_t value, int size);
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uint32_t read(uint32_t reg_start, uint32_t offset, int size);
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void write(uint32_t reg_start, uint32_t offset, uint32_t value, int size);
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/* PCI host bridge API */
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bool pci_register_device(int dev_num, PCIDevice *dev_instance);
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