mpc106: Remove pci_read and pci_write.
Because they are only called once and are small enough to include in read and write methods like they are in BanditHost.
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7a3a661e2a
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696bd6f316
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@ -76,10 +76,20 @@ uint32_t MPC106::read(uint32_t rgn_start, uint32_t offset, int size) {
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return pci_io_read_broadcast(offset, size);
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}
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if (offset < 0x200000) {
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return this->config_addr;
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}
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return this->config_addr;
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}
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if (this->config_addr & 0x80) { // process only if bit E (enable) is set
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return pci_read(offset, size);
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int bus_num, dev_num, fun_num;
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uint8_t reg_offs;
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AccessDetails details;
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PCIDevice *device;
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cfg_setup(offset, size, bus_num, dev_num, fun_num, reg_offs, details, device);
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details.flags |= PCI_CONFIG_READ;
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if (device) {
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return pci_conv_rd_data(device->pci_cfg_read(reg_offs, details), details);
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}
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LOG_READ_NON_EXISTENT_PCI_DEVICE();
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return 0xFFFFFFFFUL; // PCI spec §6.1
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}
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return 0;
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}
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@ -87,50 +97,32 @@ uint32_t MPC106::read(uint32_t rgn_start, uint32_t offset, int size) {
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void MPC106::write(uint32_t rgn_start, uint32_t offset, uint32_t value, int size) {
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if (rgn_start == 0xFE000000) {
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pci_io_write_broadcast(offset, size, value);
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return;
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}
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if (offset < 0x200000) {
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this->config_addr = value;
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return;
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}
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if (offset < 0x200000) {
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this->config_addr = value;
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return;
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}
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if (this->config_addr & 0x80) { // process only if bit E (enable) is set
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return pci_write(offset, value, size);
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}
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}
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uint32_t MPC106::pci_read(uint32_t offset, uint32_t size) {
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int bus_num, dev_num, fun_num;
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uint8_t reg_offs;
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AccessDetails details;
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PCIDevice *device;
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cfg_setup(offset, size, bus_num, dev_num, fun_num, reg_offs, details, device);
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details.flags |= PCI_CONFIG_READ;
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if (device) {
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return pci_conv_rd_data(device->pci_cfg_read(reg_offs, details), details);
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}
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LOG_READ_NON_EXISTENT_PCI_DEVICE();
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return 0xFFFFFFFFUL; // PCI spec §6.1
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}
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void MPC106::pci_write(uint32_t offset, uint32_t value, uint32_t size) {
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int bus_num, dev_num, fun_num;
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uint8_t reg_offs;
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AccessDetails details;
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PCIDevice *device;
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cfg_setup(offset, size, bus_num, dev_num, fun_num, reg_offs, details, device);
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details.flags |= PCI_CONFIG_WRITE;
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if (device) {
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if (size == 4 && !details.offset) { // aligned DWORD writes -> fast path
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device->pci_cfg_write(reg_offs, BYTESWAP_32(value), details);
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int bus_num, dev_num, fun_num;
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uint8_t reg_offs;
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AccessDetails details;
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PCIDevice *device;
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cfg_setup(offset, size, bus_num, dev_num, fun_num, reg_offs, details, device);
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details.flags |= PCI_CONFIG_WRITE;
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if (device) {
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if (size == 4 && !details.offset) { // aligned DWORD writes -> fast path
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device->pci_cfg_write(reg_offs, BYTESWAP_32(value), details);
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return;
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}
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// otherwise perform necessary data transformations -> slow path
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uint32_t old_val = details.size == 4 ? 0 : device->pci_cfg_read(reg_offs, details);
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uint32_t new_val = pci_conv_wr_data(old_val, value, details);
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device->pci_cfg_write(reg_offs, new_val, details);
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return;
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}
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// otherwise perform necessary data transformations -> slow path
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uint32_t old_val = details.size == 4 ? 0 : device->pci_cfg_read(reg_offs, details);
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uint32_t new_val = pci_conv_wr_data(old_val, value, details);
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device->pci_cfg_write(reg_offs, new_val, details);
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return;
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LOG_WRITE_NON_EXISTENT_PCI_DEVICE();
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}
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LOG_WRITE_NON_EXISTENT_PCI_DEVICE();
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}
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inline void MPC106::cfg_setup(uint32_t offset, int size, int &bus_num, int &dev_num,
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@ -82,10 +82,6 @@ public:
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int device_postinit();
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protected:
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/* PCI access */
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uint32_t pci_read(uint32_t offset, uint32_t size);
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void pci_write(uint32_t offset, uint32_t value, uint32_t size);
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/* my own PCI configuration registers access */
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uint32_t pci_cfg_read(uint32_t reg_offs, AccessDetails &details);
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void pci_cfg_write(uint32_t reg_offs, uint32_t value, AccessDetails &details);
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