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Further condition reg opcode patches

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dingusdev 2022-01-07 20:40:07 -07:00 committed by GitHub
parent 9cd7ca0077
commit 756d32df07
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GPG Key ID: 4AEE18F83AFDEB23
1 changed files with 14 additions and 7 deletions
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21
cpu/ppc/ppcopcodes.cpp
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@ -1244,7 +1244,8 @@ void dppc_interpreter::ppc_mcrf() {
void dppc_interpreter::ppc_crand() {
ppc_grab_regsdab();
if ((ppc_state.cr & (0x80000000UL >> reg_a)) && (ppc_state.cr & (0x80000000UL >> reg_b))) {
uint8_t ir = (ppc_state.cr >> (31 - reg_a)) & (ppc_state.cr >> (31 - reg_b));
if (ir & 1) {
ppc_state.cr |= (0x80000000UL >> reg_d);
} else {
ppc_state.cr &= ~(0x80000000UL >> reg_d);
@ -1253,7 +1254,8 @@ void dppc_interpreter::ppc_crand() {
void dppc_interpreter::ppc_crandc() {
ppc_grab_regsdab();
if ((ppc_state.cr & (0x80000000UL >> reg_a)) && !(ppc_state.cr & (0x80000000UL >> reg_b))) {
uint8_t ir = (ppc_state.cr >> (31 - reg_a)) & ~(ppc_state.cr >> (31 - reg_b));
if (ir & 1) {
ppc_state.cr |= (0x80000000UL >> reg_d);
} else {
ppc_state.cr &= ~(0x80000000UL >> reg_d);
@ -1261,7 +1263,8 @@ void dppc_interpreter::ppc_crandc() {
}
void dppc_interpreter::ppc_creqv() {
ppc_grab_regsdab();
if (!((ppc_state.cr & (0x80000000UL >> reg_a)) ^ (ppc_state.cr & (0x80000000UL >> reg_b)))) {
uint8_t ir = ~((ppc_state.cr & (31 - reg_a)) ^ (ppc_state.cr & (31 - reg_b)));
if (ir & 1) {
ppc_state.cr |= (0x80000000UL >> reg_d);
} else {
ppc_state.cr &= ~(0x80000000UL >> reg_d);
@ -1269,7 +1272,8 @@ void dppc_interpreter::ppc_creqv() {
}
void dppc_interpreter::ppc_crnand() {
ppc_grab_regsdab();
if (!((ppc_state.cr & (0x80000000UL >> reg_a)) && (ppc_state.cr & (0x80000000UL >> reg_b)))) {
uint8_t ir = ~((ppc_state.cr >> (31 - reg_a)) & (ppc_state.cr >> (31 - reg_b)));
if (ir & 1) {
ppc_state.cr |= (0x80000000UL >> reg_d);
} else {
ppc_state.cr &= ~(0x80000000UL >> reg_d);
@ -1277,7 +1281,8 @@ void dppc_interpreter::ppc_crnand() {
}
void dppc_interpreter::ppc_crnor() {
ppc_grab_regsdab();
if (!((ppc_state.cr & (0x80000000UL >> reg_a)) || (ppc_state.cr & (0x80000000UL >> reg_b)))) {
uint8_t ir = ~((ppc_state.cr >> (31 - reg_a)) | (ppc_state.cr >> (31 - reg_b)));
if (ir & 1) {
ppc_state.cr |= (0x80000000UL >> reg_d);
} else {
ppc_state.cr &= ~(0x80000000UL >> reg_d);
@ -1286,7 +1291,8 @@ void dppc_interpreter::ppc_crnor() {
void dppc_interpreter::ppc_cror() {
ppc_grab_regsdab();
if ((ppc_state.cr & (0x80000000UL >> reg_a)) || (ppc_state.cr & (0x80000000UL >> reg_b))) {
uint8_t ir = (ppc_state.cr >> (31 - reg_a)) || (ppc_state.cr >> (31 - reg_b));
if (ir & 1) {
ppc_state.cr |= (0x80000000UL >> reg_d);
} else {
ppc_state.cr &= ~(0x80000000UL >> reg_d);
@ -1294,7 +1300,8 @@ void dppc_interpreter::ppc_cror() {
}
void dppc_interpreter::ppc_crorc() {
ppc_grab_regsdab();
if ((ppc_state.cr & (0x80000000UL >> reg_a)) || !(ppc_state.cr & (0x80000000UL >> reg_b))) {
uint8_t ir = (ppc_state.cr >> (31 - reg_a)) || ~(ppc_state.cr >> (31 - reg_b));
if (ir & 1) {
ppc_state.cr |= (0x80000000UL >> reg_d);
} else {
ppc_state.cr &= ~(0x80000000UL >> reg_d);