From 7978d9d59fb77d52bedc269d93318ac275b9a51e Mon Sep 17 00:00:00 2001
From: Maxim Poliakovski <maximumspatium@googlemail.com>
Date: Sun, 1 Mar 2020 17:24:16 +0100
Subject: [PATCH] Fix SRR0 setting in exception handler.

---
 cpu/ppc/ppcexceptions.cpp | 18 +++++++++---------
 1 file changed, 9 insertions(+), 9 deletions(-)

diff --git a/cpu/ppc/ppcexceptions.cpp b/cpu/ppc/ppcexceptions.cpp
index 743958e..27b35ca 100644
--- a/cpu/ppc/ppcexceptions.cpp
+++ b/cpu/ppc/ppcexceptions.cpp
@@ -39,7 +39,7 @@ jmp_buf exc_env; /* Global exception environment. */
 
     switch(exception_type) {
         case Except_Type::EXC_SYSTEM_RESET:
-            ppc_state.ppc_spr[SPR::SRR0] = ppc_cur_instruction & 0xFFFFFFFC;
+            ppc_state.ppc_spr[SPR::SRR0] = ppc_state.ppc_pc & 0xFFFFFFFC;
             ppc_next_instruction_address = 0x0100;
             break;
 
@@ -47,12 +47,12 @@ jmp_buf exc_env; /* Global exception environment. */
             if (!(ppc_state.ppc_msr & 0x1000)) {
                 /* TODO: handle internal checkstop */
             }
-            ppc_state.ppc_spr[SPR::SRR0] = ppc_cur_instruction & 0xFFFFFFFC;
+            ppc_state.ppc_spr[SPR::SRR0] = ppc_state.ppc_pc & 0xFFFFFFFC;
             ppc_next_instruction_address = 0x0200;
             break;
 
         case Except_Type::EXC_DSI:
-            ppc_state.ppc_spr[SPR::SRR0] = ppc_cur_instruction & 0xFFFFFFFC;
+            ppc_state.ppc_spr[SPR::SRR0] = ppc_state.ppc_pc & 0xFFFFFFFC;
             ppc_next_instruction_address = 0x0300;
             break;
 
@@ -67,32 +67,32 @@ jmp_buf exc_env; /* Global exception environment. */
             break;
 
         case Except_Type::EXC_ALIGNMENT:
-            ppc_state.ppc_spr[SPR::SRR0] = ppc_cur_instruction & 0xFFFFFFFC;
+            ppc_state.ppc_spr[SPR::SRR0] = ppc_state.ppc_pc & 0xFFFFFFFC;
             ppc_next_instruction_address = 0x0600;
             break;
 
         case Except_Type::EXC_PROGRAM:
-            ppc_state.ppc_spr[SPR::SRR0] = ppc_cur_instruction & 0xFFFFFFFC;
+            ppc_state.ppc_spr[SPR::SRR0] = ppc_state.ppc_pc & 0xFFFFFFFC;
             ppc_next_instruction_address = 0x0700;
             break;
 
         case Except_Type::EXC_NO_FPU:
-            ppc_state.ppc_spr[SPR::SRR0] = ppc_cur_instruction & 0xFFFFFFFC;
+            ppc_state.ppc_spr[SPR::SRR0] = ppc_state.ppc_pc & 0xFFFFFFFC;
             ppc_next_instruction_address = 0x0800;
             break;
 
         case Except_Type::EXC_DECR:
-            ppc_state.ppc_spr[SPR::SRR0] = (ppc_cur_instruction & 0xFFFFFFFC) + 4;
+            ppc_state.ppc_spr[SPR::SRR0] = (ppc_state.ppc_pc & 0xFFFFFFFC) + 4;
             ppc_next_instruction_address = 0x0900;
             break;
 
         case Except_Type::EXC_SYSCALL:
-            ppc_state.ppc_spr[SPR::SRR0] = (ppc_cur_instruction & 0xFFFFFFFC) + 4;
+            ppc_state.ppc_spr[SPR::SRR0] = (ppc_state.ppc_pc & 0xFFFFFFFC) + 4;
             ppc_next_instruction_address = 0x0C00;
             break;
 
         case Except_Type::EXC_TRACE:
-            ppc_state.ppc_spr[SPR::SRR0] = (ppc_cur_instruction & 0xFFFFFFFC) + 4;
+            ppc_state.ppc_spr[SPR::SRR0] = (ppc_state.ppc_pc & 0xFFFFFFFC) + 4;
             ppc_next_instruction_address = 0x0D00;
             break;