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Minor fixes to floating point
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@ -40,13 +40,13 @@ uint64_t fp_return_uint64(uint32_t reg) {
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return ppc_state.fpr[reg].int64_r;
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}
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inline void ppc_update_cr1() {
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inline static void ppc_update_cr1() {
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// copy FPSCR[FX|FEX|VX|OX] to CR1
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ppc_state.cr = (ppc_state.cr & ~CR_select::CR1_field) |
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((ppc_state.fpscr >> 4) & CR_select::CR1_field);
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}
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int32_t round_to_nearest(double f) {
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static int32_t round_to_nearest(double f) {
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return static_cast<int32_t>(static_cast<int64_t> (std::floor(f + 0.5)));
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}
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@ -74,37 +74,32 @@ void update_fpscr(uint32_t new_fpscr) {
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ppc_state.fpscr = new_fpscr;
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}
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int32_t round_to_zero(double f) {
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static int32_t round_to_zero(double f) {
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return static_cast<int32_t>(std::trunc(f));
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}
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int32_t round_to_pos_inf(double f) {
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static int32_t round_to_pos_inf(double f) {
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return static_cast<int32_t>(std::ceil(f));
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}
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int32_t round_to_neg_inf(double f) {
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static int32_t round_to_neg_inf(double f) {
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return static_cast<int32_t>(std::floor(f));
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}
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inline bool check_snan(int check_reg) {
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inline static bool check_snan(int check_reg) {
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uint64_t check_int = ppc_state.fpr[check_reg].int64_r;
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return (((check_int & (0x7FFULL << 52)) == (0x7FFULL << 52)) &&
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((check_int & ~(0xFFFULL << 52)) != 0ULL) &&
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((check_int & (0x1ULL << 51)) == 0ULL));
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}
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inline bool check_qnan(int check_reg) {
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inline static bool check_qnan(int check_reg) {
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uint64_t check_int = ppc_state.fpr[check_reg].int64_r;
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return (((check_int & (0x7FFULL << 52)) == (0x7FFULL << 52)) &&
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((check_int & ~(0xFFFULL << 52)) == 0ULL) &&
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((check_int & (0x1ULL << 51)) == (0x1ULL << 51)));
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}
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void update_fex() {
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int fex_result = !!((ppc_state.fpscr & (ppc_state.fpscr << 22)) & 0x3E000000);
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ppc_state.fpscr = (ppc_state.fpscr & ~FEX) | (fex_result << 30);
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}
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static void fpresult_update(double set_result) {
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if (std::isnan(set_result)) {
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ppc_state.fpscr |= FPCC_FUNAN | FPRCD;
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