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ppcexec: Fix OP59d.
Some of these accept a 4th register "C" so they exist in the opcode table 32 times. Some of these don't accept a 4th register "C" so they exist in the opcode table once.
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@ -558,9 +558,21 @@ do { \
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#define OP59d(subopcode, fn) \
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do { \
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for (uint32_t mod = 0; mod < 16; mod++) { \
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OPXd(59, (mod << 5) | (subopcode), fn); \
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} \
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OPXd(59, (subopcode), fn); \
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} while (0)
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#define OP59cd(subopcode, fn) \
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do { \
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for (uint32_t ccccc = 0; ccccc < 32; ccccc++) { \
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OPXd(59, (ccccc << 5) | (subopcode), fn); \
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} \
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} while (0)
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#define OP4_ccccc10xxxx(subopcode, fn) \
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do { \
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for (uint32_t ccccc = 0; ccccc < 32; ccccc++) { \
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OPr(4, (ccccc << 6) | (subopcode), fn); \
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} \
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} while (0)
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void initialize_ppc_opcode_table() {
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@ -779,11 +791,11 @@ void initialize_ppc_opcode_table() {
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OP59d(21, ppc_fadds);
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if (ppc_state.spr[SPR::PVR] == PPC_VER::MPC970MP) OP59d(22, ppc_fsqrts);
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if (!is_601) OP59d(24, ppc_fres);
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OP59d(25, ppc_fmuls);
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OP59d(28, ppc_fmsubs);
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OP59d(29, ppc_fmadds);
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OP59d(30, ppc_fnmsubs);
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OP59d(31, ppc_fnmadds);
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OP59cd(25, ppc_fmuls);
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OP59cd(28, ppc_fmsubs);
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OP59cd(29, ppc_fmadds);
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OP59cd(30, ppc_fnmsubs);
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OP59cd(31, ppc_fnmadds);
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OP63(0, ppc_fcmpu);
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OP63d(12, ppc_frsp);
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