Continued work on implementing opcodes

2024-06-11 04:29:37 +00:00 · 2020-11-23 19:49:13 -07:00 · 2020-11-23 19:49:13 -07:00 · 922c4abf5f
commit 922c4abf5f
parent 00d8c64fc6
5 changed files with 436 additions and 6 deletions
--- a/cpu/ppc/interpops.h
+++ b/cpu/ppc/interpops.h
@ -235,7 +235,7 @@ GEN_OP(rlwimix, {
    uint32_t rotator        = ((val_s << code->d3) | (val_s >> (32 - code->d3)));
    ppc_state.gpr[code->d2] = (ppc_state.gpr[code->d2] & ~code->uimm) | (rotator & code->uimm);
    if (code->d4) {
-        ppc_changecrf0(ppc_result_a);
+        ppc_changecrf0(ppc_state.gpr[code->d2]);
    }
 })

@ -270,7 +270,7 @@ GEN_OP(xoris, {

 GEN_OP(andisdot, {
    ppc_state.gpr[code->d2] = ppc_state.gpr[code->d1] & (code->uimm << 16);
-    ppc_changecrf0(ppc_result_a);
+    ppc_changecrf0(ppc_state.gpr[code->d2]);
    NEXT;
 })

@ -479,4 +479,432 @@ GEN_OP(stfdu, {
    } else {
        ppc_exception_handler(Except_Type::EXC_PROGRAM, 0x20000);
    }
+})
+
+// placeholders until I can figure out how to refactor these fully
+GEN_OP(bcl, {})
+GEN_OP(bca, {})
+GEN_OP(bcla, {})
+GEN_OP(b, {})
+GEN_OP(bl, {})
+GEN_OP(ba, {})
+GEN_OP(bla, {})
+GEN_OP(bclrl, {})
+
+GEN_OP(crnor, {})
+GEN_OP(rfi, {})
+GEN_OP(crandc, {})
+GEN_OP(isync, {})
+GEN_OP(crxor, {})
+GEN_OP(crnand, {})
+GEN_OP(crand, {})
+GEN_OP(creqv, {})
+GEN_OP(crorc, {})
+GEN_OP(cror, {})
+GEN_OP(bcctr, {})
+GEN_OP(bcctrl, {})
+
+// back to real code!
+
+GEN_OP(cmp, {
+    uint32_t xer_in = (ppc_state.spr[SPR::XER] & 0x80000000UL) >> 3;
+    uint32_t cmp_in = (((int32_t)ppc_state.gpr[code->d2]) == ((int32_t)ppc_state.gpr[code->d3]))
+        ? 0x20000000UL
+        : (((int32_t)ppc_state.gpr[code->d2]) > ((int32_t)ppc_state.gpr[code->d3])) ? 0x40000000UL : 0x80000000UL;
+    ppc_state.cr =
+        ((ppc_state.cr & ~(0xf0000000UL >> (code->d1 & 0x1C))) |
+         ((cmp_in + xer_in) >> (code->d1 & 0x1C)));
+})
+
+GEN_OP(tw, {})
+
+GEN_OP(subfc, {
+    ppc_state.gpr[code->d1] = ppc_state.gpr[code->d3] - ppc_state.gpr[code->d2];
+
+    if (ppc_state.gpr[code->d1] >= ppc_state.gpr[code->d2]) {
+        ppc_state.spr[SPR::XER] |= 0x20000000UL;
+    } else {
+        ppc_state.spr[SPR::XER] &= 0xDFFFFFFFUL;
+    }
+})
+
+GEN_OP(subfcdot, {
+    ppc_state.gpr[code->d1] = ppc_state.gpr[code->d3] - ppc_state.gpr[code->d2];
+
+    if (ppc_state.gpr[code->d1] >= ppc_state.gpr[code->d2]) {
+        ppc_state.spr[SPR::XER] |= 0x20000000UL;
+    } else {
+        ppc_state.spr[SPR::XER] &= 0xDFFFFFFFUL;
+    }
+
+    ppc_changecrf0(ppc_state.gpr[code->d1]);
+})
+
+GEN_OP(addc, {
+    ppc_state.gpr[code->d1] = ppc_state.gpr[code->d3] + ppc_state.gpr[code->d2];
+
+    if (ppc_state.gpr[code->d2] < ppc_state.gpr[code->d1]) {
+        ppc_state.spr[SPR::XER] |= 0x20000000UL;
+    } else {
+        ppc_state.spr[SPR::XER] &= 0xDFFFFFFFUL;
+    }
+})
+
+GEN_OP(addcdot, {
+    ppc_state.gpr[code->d1] = ppc_state.gpr[code->d3] + ppc_state.gpr[code->d2];
+
+    if (ppc_state.gpr[code->d2] < ppc_state.gpr[code->d1]) {
+        ppc_state.spr[SPR::XER] |= 0x20000000UL;
+    } else {
+        ppc_state.spr[SPR::XER] &= 0xDFFFFFFFUL;
+    }
+
+    ppc_changecrf0(ppc_state.gpr[code->d1]);
+})
+
+GEN_OP(mulhwu, {
+    uint64_t product        = (uint64_t)ppc_state.gpr[code->d3] * (uint64_t)ppc_state.gpr[code->d2];
+    ppc_state.gpr[code->d1] = (uint32_t)(product >> 32);
+
+    if (ppc_state.gpr[code->d2] < ppc_state.gpr[code->d1]) {
+        ppc_state.spr[SPR::XER] |= 0x20000000UL;
+    } else {
+        ppc_state.spr[SPR::XER] &= 0xDFFFFFFFUL;
+    }
+})
+
+GEN_OP(mulhwudot, {
+    uint64_t product        = (uint64_t)ppc_state.gpr[code->d3] * (uint64_t)ppc_state.gpr[code->d2];
+    ppc_state.gpr[code->d1] = (uint32_t)(product >> 32);
+
+    if (ppc_state.gpr[code->d2] < ppc_state.gpr[code->d1]) {
+        ppc_state.spr[SPR::XER] |= 0x20000000UL;
+    } else {
+        ppc_state.spr[SPR::XER] &= 0xDFFFFFFFUL;
+    }
+
+    ppc_changecrf0(ppc_state.gpr[code->d1]);
+})
+
+GEN_OP(neg,  { 
+    ppc_state.gpr[code->d1] = ~(ppc_state.gpr[code->d2]) + 1; 
+})
+
+GEN_OP(negdot, {
+    ppc_state.gpr[code->d1] = ~(ppc_state.gpr[code->d2]) + 1;
+    ppc_changecrf0(ppc_result_d);
+})
+
+GEN_OP(nego, {
+    ppc_result_d = ~(ppc_result_a) + 1;
+
+    if (ppc_state.gpr[code->d2] == 0x80000000)
+        ppc_state.spr[SPR::XER] |= 0xC0000000;
+    else
+        ppc_state.spr[SPR::XER] &= 0xBFFFFFFF;
+})
+
+GEN_OP(negodot, {
+    ppc_result_d = ~(ppc_result_a) + 1;
+
+    if (oe_flag) {
+        if (ppc_result_a == 0x80000000)
+            ppc_state.spr[SPR::XER] |= 0xC0000000;
+        else
+            ppc_state.spr[SPR::XER] &= 0xBFFFFFFF;
+    }
+
+    ppc_changecrf0(ppc_result_d);
+})
+
+GEN_OP(dcbf, {})
+
+GEN_OP(lbzx, {
+    uint32_t ea  = ((code->d2) ? ppc_state.gpr[code->d2] : 0) + ppc_state.gpr[code->d3];
+    ppc_state.gpr[code->d1] = mem_grab_byte(ea);
+})
+
+GEN_OP(mfmsr, {
+    if (ppc_state.msr & 0x4000) {
+        ppc_exception_handler(Except_Type::EXC_PROGRAM, 0x00040000);
+    }
+
+    ppc_state.gpr[code->d1] = ppc_state.msr;
+})
+
+GEN_OP(mfcr, { 
+    ppc_state.gpr[code->d1] = ppc_state.cr; 
+})
+
+GEN_OP(lwarx, {
+    ppc_state.reserve = true;
+    ppc_state.gpr[code->d1] =
+        (mem_grab_dword(((code->d2) ? ppc_state.gpr[code->d2] : 0) + ppc_state.gpr[code->d3]));
+})
+
+GEN_OP(lwzx, {
+    ppc_state.gpr[code->d1] =
+        (mem_grab_dword(((code->d2) ? ppc_state.gpr[code->d2] : 0) + ppc_state.gpr[code->d3]));
+})
+
+GEN_OP(slw, {
+    ppc_state.gpr[code->d2] = 
+            ((ppc_state.gpr[code->d3] > 0x1F) ? 0 : ppc_state.gpr[code->d1] << (ppc_state.gpr[code->d3] & 0x1F));
+})
+
+GEN_OP(slwdot, {
+    ppc_state.gpr[code->d2] =
+            ((ppc_state.gpr[code->d3] > 0x1F) ? 0 : ppc_state.gpr[code->d1] << (ppc_state.gpr[code->d3] & 0x1F));
+
+    ppc_changecrf0(ppc_state.gpr[code->d2]);
+})
+
+GEN_OP(cntlzw, {
+    uint32_t lead      = 0;
+    uint32_t bit_check = ppc_state.gpr[code->d1];
+
+    #ifdef USE_GCC_BUILTINS
+        lead = __builtin_clz(bit_check);
+    #elif defined USE_VS_BUILTINS
+        lead = __lzcnt(bit_check);
+    #else
+        for (uint32_t mask = 0x80000000UL; mask; lead++, mask >>= 1) {
+            if (bit_check & mask)
+                break;
+        }
+    #endif
+
+    ppc_state.gpr[code->d2] = lead;
+})
+
+GEN_OP(cntlzwdot, {
+    uint32_t lead      = 0;
+    uint32_t bit_check = ppc_state.gpr[code->d1];
+
+    #ifdef USE_GCC_BUILTINS
+        lead = __builtin_clz(bit_check);
+    #elif defined USE_VS_BUILTINS
+        lead = __lzcnt(bit_check);
+    #else
+        for (uint32_t mask = 0x80000000UL; mask; lead++, mask >>= 1) {
+            if (bit_check & mask)
+                break;
+        }
+    #endif
+
+    ppc_state.gpr[code->d2] = lead;
+
+    ppc_changecrf0(ppc_state.gpr[code->d2]);
+})
+
+GEN_OP(ppc_and, {
+    ppc_state.gpr[code->d2] = ppc_state.gpr[code->d1] & ppc_state.gpr[code->d3];
+    ppc_changecrf0(ppc_state.gpr[code->d2]);
+})
+
+GEN_OP(anddot, {
+    ppc_state.gpr[code->d2] = ppc_state.gpr[code->d1] & ppc_state.gpr[code->d3];
+    ppc_changecrf0(ppc_state.gpr[code->d2]);
+})
+
+GEN_OP(cmpl, {
+    xercon = (ppc_state.spr[SPR::XER] & 0x80000000UL) >> 3;
+    cmp_c  = (ppc_state.gpr[code->d2] == ppc_state.gpr[code->d3])
+        ? 0x20000000UL
+        : (ppc_state.gpr[code->d2] > ppc_state.gpr[code->d3]) ? 0x40000000UL : 0x80000000UL;
+    ppc_state.cr = ((ppc_state.cr & ~(0xf0000000UL >> code->d1)) | ((cmp_c + xercon) >> code->d1));
+})
+
+GEN_OP(subf, { 
+    ppc_state.gpr[code->d1] = ppc_state.gpr[code->d3] - ppc_state.gpr[code->d2];
+})
+
+GEN_OP(subfdot, { 
+    ppc_state.gpr[code->d1] = ppc_state.gpr[code->d3] - ppc_state.gpr[code->d2];
+    ppc_changecrf0(ppc_state.gpr[code->d1]);
+})
+
+GEN_OP(dcbst, {
+})
+
+GEN_OP(lwzux, {
+    if ((code->d2 != code->d1) || code->d2 != 0) {
+        ppc_result_d          = mem_grab_dword((ppc_state.gpr[code->d2] + ppc_state.gpr[code->d3]));
+        ppc_result_a          = ppc_effective_address;
+    } else {
+        ppc_exception_handler(Except_Type::EXC_PROGRAM, 0x20000);
+    }
+})
+
+GEN_OP(andc, { 
+    ppc_state.gpr[code->d2] = ppc_state.gpr[code->d1] & ~(ppc_state.gpr[code->d3]);
+})
+
+GEN_OP(andcdot, { 
+    ppc_state.gpr[code->d2] = ppc_state.gpr[code->d1] & ~(ppc_state.gpr[code->d3]);
+    ppc_changecrf0(ppc_state.gpr[code->d2]);
+})
+
+GEN_OP(subfco, {
+    ppc_state.gpr[code->d1] = ppc_state.gpr[code->d3] - ppc_state.gpr[code->d2];
+
+    if (ppc_state.gpr[code->d1] >= ppc_state.gpr[code->d2]) {
+        ppc_state.spr[SPR::XER] |= 0x20000000UL;
+    } else {
+        ppc_state.spr[SPR::XER] &= 0xDFFFFFFFUL;
+    }
+
+    if ((ppc_state.gpr[code->d2] ^ ppc_state.gpr[code->d3]) &
+        (ppc_state.gpr[code->d2] ^ ppc_state.gpr[code->d1]) & 0x80000000UL) {
+        ppc_state.spr[SPR::XER] |= 0xC0000000UL;
+    } else {
+        ppc_state.spr[SPR::XER] &= 0xBFFFFFFFUL;
+    }
+})
+
+GEN_OP(subfcodot, {
+    ppc_state.gpr[code->d1] = ppc_state.gpr[code->d3] - ppc_state.gpr[code->d2];
+
+    if (ppc_state.gpr[code->d1] >= ppc_state.gpr[code->d2]) {
+        ppc_state.spr[SPR::XER] |= 0x20000000UL;
+    } else {
+        ppc_state.spr[SPR::XER] &= 0xDFFFFFFFUL;
+    }
+
+    if ((ppc_state.gpr[code->d2] ^ ppc_state.gpr[code->d3]) &
+        (ppc_state.gpr[code->d2] ^ ppc_state.gpr[code->d1]) & 0x80000000UL) {
+        ppc_state.spr[SPR::XER] |= 0xC0000000UL;
+    } else {
+        ppc_state.spr[SPR::XER] &= 0xBFFFFFFFUL;
+    }
+
+    ppc_changecrf0(ppc_state.gpr[code->d1]);
+})
+
+GEN_OP(lhbrx, {
+    uint32_t ea = ((code->d1 == 0) ? ppc_state.gpr[code->d3] : 0) + ppc_state.gpr[code->d3];
+    ppc_state.gpr[code->d1] = (uint32_t)(BYTESWAP_16(mem_grab_word(ppc_effective_address)));
+})
+
+GEN_OP(srawi, {
+    uint32_t val_s  = ppc_state.gpr[code->d1];
+    uint32_t result = (int32_t)val_s >> code->d2;
+    if ((val_s & 0x80000000UL) && (val_s & code->uimm)) {
+        ppc_state.spr[SPR::XER] |= 0x20000000UL;
+    } else {
+        ppc_state.spr[SPR::XER] &= 0xDFFFFFFFUL;
+    }
+    ppc_state.gpr[code->d2] = result;
+    NEXT;
+})
+
+GEN_OP(eieio, {})
+
+GEN_OP(sthbrx, {
+    uint32_t ea = (code->d2 == 0) ? ppc_state.gpr[code->d3]
+                                  : (ppc_state.gpr[code->d2] + ppc_state.gpr[code->d3]);
+    uint32_t val1 = (uint32_t)(BYTESWAP_16((uint16_t)ppc_state.gpr[code->d1]));
+    mem_write_word(ea, val1);
+})
+
+GEN_OP(extsb, {
+    ppc_state.gpr[code->d2] = (int32_t)(int8_t)ppc_state.gpr[code->d1];
+})
+     
+GEN_OP(extsbdot, {
+    ppc_state.gpr[code->d2] = (int32_t)(int8_t)ppc_state.gpr[code->d1];
+    ppc_changecrf0(ppc_state.gpr[code->d2]);
+})
+  
+GEN_OP(extsh, { 
+    ppc_state.gpr[code->d2] = (int32_t)(int16_t)ppc_state.gpr[code->d1];
+})                  
+     
+GEN_OP(extshdot, {
+    ppc_state.gpr[code->d2] = (int32_t)(int16_t)ppc_state.gpr[code->d1];
+    ppc_changecrf0(ppc_state.gpr[code->d2]);
+}) 
+           
+GEN_OP(divwu, {
+    if (!ppc_state.gpr[code->d3]) { /* division by zero */
+        ppc_result_d = 0;
+        ppc_state.spr[SPR::XER] |= 0xC0000000;
+    } else {
+        ppc_state.gpr[code->d1] = ppc_state.gpr[code->d2] / ppc_state.gpr[code->d3];
+        ppc_state.spr[SPR::XER] &= 0xBFFFFFFFUL;
+    }
+})
+
+GEN_OP(divwudot, {
+    if (!ppc_state.gpr[code->d3]) { /* division by zero */
+        ppc_result_d = 0;
+        ppc_state.spr[SPR::XER] |= 0xC0000000;
+        ppc_state.cr |= 0x20000000;
+    } else {
+        ppc_state.gpr[code->d1] = ppc_state.gpr[code->d2] / ppc_state.gpr[code->d3];
+        ppc_state.spr[SPR::XER] &= 0xBFFFFFFFUL;
+        ppc_changecrf0(ppc_result_d);
+    }
+})
+    
+GEN_OP(tlbld, {})
+
+GEN_OP(icbi, {})
+
+GEN_OP(stfiwx, {
+    uint32_t ea = (code->d2 == 0) ? ppc_state.gpr[code->d3]
+                                  : ppc_state.gpr[code->d2] + ppc_state.gpr[code->d3];
+    mem_write_dword(ea, (uint32_t)(ppc_state.fpr[code->d1].int64_r));
+})
+    
+GEN_OP(divwo, {
+    if (!ppc_state.gpr[code->d3]) { /* handle the "anything / 0" case */
+        ppc_state.gpr[code->d1] = (ppc_state.gpr[code->d2] & 0x80000000) ? -1
+                                                                         : 0; /* UNDOCUMENTED! */
+
+        if (oe_flag)
+            ppc_state.spr[SPR::XER] |= 0xC0000000;
+
+    } else if (ppc_state.gpr[code->d2] == 0x80000000UL && ppc_state.gpr[code->d3] == 0xFFFFFFFFUL) {
+        ppc_state.gpr[code->d1] = 0xFFFFFFFF;
+        ppc_state.spr[SPR::XER] |= 0xC0000000;
+
+    } else { /* normal signed devision */
+        ppc_state.gpr[code->d1] = (int32_t)ppc_state.gpr[code->d2] / (int32_t)ppc_state.gpr[code->d3];
+        ppc_state.spr[SPR::XER] &= 0xBFFFFFFFUL;
+    }
+})
+
+GEN_OP(divwodot, {
+    if (!ppc_state.gpr[code->d3]) { /* handle the "anything / 0" case */
+        ppc_state.gpr[code->d1] = (ppc_state.gpr[code->d2] & 0x80000000) ? -1
+                                                                         : 0; /* UNDOCUMENTED! */
+
+        if (oe_flag)
+            ppc_state.spr[SPR::XER] |= 0xC0000000;
+
+    } else if (ppc_state.gpr[code->d2] == 0x80000000UL && ppc_state.gpr[code->d3] == 0xFFFFFFFFUL) {
+        ppc_state.gpr[code->d1] = 0xFFFFFFFF;
+        ppc_state.spr[SPR::XER] |= 0xC0000000;
+
+    } else { /* normal signed devision */
+        ppc_state.gpr[code->d1] = (int32_t)ppc_state.gpr[code->d2] / (int32_t)ppc_state.gpr[code->d3];
+        ppc_state.spr[SPR::XER] &= 0xBFFFFFFFUL;
+    }
+
+    ppc_changecrf0(ppc_result_d);
+})
+
+GEN_OP(tlbli, {})
+
+GEN_OP(dcbz, {
+    if (!(ppc_state.pc & 32) && (ppc_state.pc < 0xFFFFFFE0UL)) {
+        uint32_t ea = ((code->d2) ? ppc_state.gpr[code->d2] : 0) + ppc_state.gpr[code->d3];
+        mem_write_qword(ea, 0);
+        mem_write_qword((ea + 8), 0);
+        mem_write_qword((ea + 16), 0);
+        mem_write_qword((ea + 24), 0);
+    } else {
+        ppc_exception_handler(Except_Type::EXC_ALIGNMENT, 0x00000);
+    }
 })
--- a/cpu/ppc/jittables.cpp
+++ b/cpu/ppc/jittables.cpp
@ -130,7 +130,7 @@ static std::map<uint16_t, PPCInstr> Subop31Init = {
    { 1104, PPCInstr::subfo},       { 1105, PPCInstr::subfodot},
    { 1132, PPCInstr::tlbsync},     { 1134, PPCInstr::lfsux},
    { 1190, PPCInstr::mfsr},        { 1194, PPCInstr::lswi},
-    { 1196, PPCInstr::sync},        { 1198, PPCInstr::lfdx},
+    { 1196, PPCInstr::ppc_sync},    { 1198, PPCInstr::lfdx},
    { 1232, PPCInstr::nego},        { 1233, PPCInstr::negodot},
    { 1238, PPCInstr::mulo},        { 1239, PPCInstr::mulodot},
    { 1262, PPCInstr::lfdux},       { 1296, PPCInstr::subfeo},
--- a/cpu/ppc/ppcdefs.h
+++ b/cpu/ppc/ppcdefs.h
@ -187,7 +187,7 @@ enum PPCInstr : int {
    lfsux,
    mfsr,
    lswi,
-    sync,
+    ppc_sync,
    lfdx,
    nego,
    negodot,
--- a/cpu/ppc/ppcmmu.cpp
+++ b/cpu/ppc/ppcmmu.cpp
@ -371,7 +371,7 @@ static uint32_t ppc_mmu_addr_translate(uint32_t la, int is_write) {
 }

 static void mem_write_unaligned(uint32_t addr, uint32_t value, uint32_t size) {
-    LOG_F(WARNING, "Attempt to write unaligned %d bytes to 0x%08X\n", size, addr);
+    //LOG_F(WARNING, "Attempt to write unaligned %d bytes to 0x%08X\n", size, addr);

    if (((addr & 0xFFF) + size) > 0x1000) {
        LOG_F(ERROR, "SOS! Cross-page unaligned write, addr=%08X, size=%d\n", addr, size);
@ -444,7 +444,7 @@ void mem_write_qword(uint32_t addr, uint64_t value) {
 static uint32_t mem_grab_unaligned(uint32_t addr, uint32_t size) {
    uint32_t ret = 0;

-    LOG_F(WARNING, "Attempt to read unaligned %d bytes from 0x%08X\n", size, addr);
+    //LOG_F(WARNING, "Attempt to read unaligned %d bytes from 0x%08X\n", size, addr);

    if (((addr & 0xFFF) + size) > 0x1000) {
        LOG_F(ERROR, "SOS! Cross-page unaligned read, addr=%08X, size=%d\n", addr, size);
--- a/devices/viacuda.cpp
+++ b/devices/viacuda.cpp
@ -26,6 +26,7 @@ along with this program.  If not, see <https://www.gnu.org/licenses/>.

 #include "viacuda.h"
 #include "adb.h"
+//#include "cpu/ppc/ppcemu.h"
 #include <cinttypes>
 #include <thirdparty/loguru/loguru.hpp>

@ -351,6 +352,7 @@ void ViaCuda::pseudo_command(int cmd, int data_count) {
        break;
    default:
        LOG_F(ERROR, "Cuda: unsupported pseudo command 0x%x \n", cmd);
+        //LOG_F(ERROR, "Cuda: unsupported pseudo command 0x%x - Address: 0x%x \n", cmd, ppc_state.pc);
        error_response(CUDA_ERR_BAD_CMD);
    }
 }