From 9f5e3fa47af2b056931d128c457ab73673c97c61 Mon Sep 17 00:00:00 2001 From: dingusdev Date: Tue, 3 Mar 2020 18:21:14 -0700 Subject: [PATCH] Started expanding documentation --- zdocs/grackle.md | 15 ++++++-- zdocs/memorymaps.md | 94 +++++++++++++++++++++++++++++++++++++++++++++ zdocs/misc.md | 10 +++++ zdocs/viacuda.md | 23 +++++++++++ 4 files changed, 139 insertions(+), 3 deletions(-) create mode 100644 zdocs/memorymaps.md diff --git a/zdocs/grackle.md b/zdocs/grackle.md index 8c75d02..8f6574e 100644 --- a/zdocs/grackle.md +++ b/zdocs/grackle.md @@ -1,15 +1,24 @@ The MPC106, codenamed "Grackle", is a memory controller and PCI host bridge. Its predecessor was the MPC105, codenamed "Bandit". -Unlike the CPU, the Grackle runs in little-endian mode in compliance with the PCI standard. This usually means that to get the result in the correct endian, the PowerPC must load and store byte-reversed inputs and results. +Unlike the CPU, which generally runs in big-endian mode, the Grackle runs in little-endian mode in compliance with the PCI standard. This usually means that to get the result in the correct endian, the PowerPC must load and store byte-reversed inputs and results. By default, Grackle operates on Address Map B. -CONFIG_ADDR can be found at any address in the range 0xFEC00000–0xFEDFFFFF, while CONFIG_DAT can be found at any address in the range 0xFEE00000–0xFEEFFFFF +CONFIG_ADDR can be found at any address in the range 0xFEC00000–0xFEDFFFFF, while CONFIG_DAT can be found at any address in the range 0xFEE00000–0xFEEFFFFF. The device trees also establish 0xFEF00000 as the 8259 interrupt acknowledgement register. PCI Config addresses work as follows: bus << 16 | device << 11 | function << 8 | offset -#Revisions +# Revisions Revisions under 4.0 could allow up to 75 MHz, whereas 4.0 and newer can allow up to 83 MHz. + +# General Data + +Vendor ID: 0x1057 (Motorola) +Device ID: 0x0002 (MPC106) + +Within the Mac's own device tree, this is usually device 0. + +It also spans for 0x7F000000 bytes starting from 0x80000000. diff --git a/zdocs/memorymaps.md b/zdocs/memorymaps.md new file mode 100644 index 0000000..1d89241 --- /dev/null +++ b/zdocs/memorymaps.md @@ -0,0 +1,94 @@ +# VIRTUAL MEMORY MAP + +| Address | Area | +|:-------------:|:--------------------------------------:| +| 0x5FFFE000 | InfoRecord | +| 0x5FFFEFF0 | NKSystemInfo | +| 0x68000000 | Motorola 68K Emulator (0x100000 bytes) | +| 0x68060000 | Emulator Code | +| 0x68080000 | Opcode Dispatch Table | +| 0x68FFE000 | KernelData | +| 0x68FFF000 | EmulatorData | +| 0xFF800000 | OpenFirmware | +| 0xFFF0C000 | HardwarePriv | + +# PHYSICAL MEMORY MAP + +## NuBus Power Macs + +(Sourced Heavily from: http://mess.redump.net/mess/driver_info/mac_technical_notes) + +|Starting Address|Ending Address| Area | +|:--------------:|:------------:|:----------------------------:| +| 0x00000000 | 0x3FFFFFFF | Main Memory | +| 0x40000000 | 0x4FFFFFFF | ROM Mirrors | +| 0x50000000 | 0x5FFFFFFF | IO Devices | +| 0x5FFFFFFC | | "cpuid", really a Machine ID | +| 0x60000000 | 0xEFFFFFFF | NuBus "super slot" space | +| 0xF1000000 | 0xFFBFFFFF | NuBus "standard slot" space | +| 0xFFC00000 | 0xFFFFFFFF | ROM | + +## PCI Power Macs + +### Main Memory +* 0x00000000 - 0x7FFFFFFF + Mac OS + +* 0x00400000 - OpenFirmware + +### PCI/Device Memory Area 0x80000000 - 0xFF000000 + +* 0x81000000 - Video Display Device (normally) + +* 0xF3000000 - + Mac OS I/O Device area + +* 0xF3008000 - 0xF3008FFF - DMA Channels + +* 0xF3008000 - SCSI DMA +* 0xF3008100 - Floppy DMA +* 0xF3008200 - Ethernet transmit DMA +* 0xF3008300 - Ethernet receive DMA +* 0xF3008400 - SCC channel A transmit DMA +* 0xF3008500 - SCC channel A receive DMA +* 0xF3008600 - SCC channel B transmit DMA +* 0xF3008700 - SCC channel B receive DMA +* 0xF3008800 - Audio out DMA +* 0xF3008900 - Audio in DMA + +* 0xF3009000 - ATI Mach 64 video card + +* 0xF3010000 - SCSI device registers (0x100 bytes) +* 0xF3011000 - MACE (serial) device registers (0x100 bytes) +* 0xF3012000 - SCC compatibility port (?) (0x100 bytes) +* 0xF3013000 - SCC MacRISC port (Serial for 0x20, then Modem for 0x20, with remaining 0xC0 unknown) +* 0xF3014000 - AWAC (Audio) chip device registers +* 0xF3015000 - SWIM3 (floppy controller) device registers +* 0xF3016000 - pseudo VIA1 device registers +* 0xF3017000 - pseudo VIA2 device registers + +* 0xF3020000 - Heathrow ATA + +* 0xF8000000 - Hammerhead memory controller registers (0x1000000 bytes) + +* 0xFE010000 - 53C875 Hard Drive Controller + +* 0xFE000000 - Grackle Low/Base +* 0xFEC00000 - Grackle CONFIG_ADDR (0x4 bytes, all redirected to 0xXXXXXCF8) +* 0xFEE00000 - Grackle CONFIG_DATA (0x4 bytes, all redirected to 0xXXXXXCFF) + +### ROM / Misc Area (0xFF000000 - 0xFFFFFFFF) +* 0xFF000000 - ? + + * 0xFF000004 - "cpuid", really a machine ID + +* 0xFFC00000 - 0xFFFFFFFF + Mac OS ROM Area + + * 0xFFC00000 - 0xFFEFFFFF - 68k Code Area + + (below addresses apply to Old World ROMs) + + * 0xFFF00100 - Reset Area (where the ROM begins executing) + * 0xFFF10000 - Nanokernel Code + * 0xFFF20000 - HW Init \ No newline at end of file diff --git a/zdocs/misc.md b/zdocs/misc.md index 23939e7..ca745df 100644 --- a/zdocs/misc.md +++ b/zdocs/misc.md @@ -2,6 +2,16 @@ The Old World ROM is always 4 megabytes (MB). The first three MB are reserved for the 68k code, while the last MB is for the PowerPC boot-up code. +# BMac + +The BMac is an ethernet controller. + +The max frame size is 0x5EE bytes. + +It resides on 0xF3011000, with Writing DMA on 0xF3008200 and Reading DMA on 0xF3008300. + +Swim3 is located at 0xF3015000. + # Serial For serial, it replicates the functionality of a Zilog ESCC. There are two different ports - one located at 0xF3013000 for the printer, and the other at 0xF3013020 for the modem. diff --git a/zdocs/viacuda.md b/zdocs/viacuda.md index 5150080..66a5e85 100644 --- a/zdocs/viacuda.md +++ b/zdocs/viacuda.md @@ -2,6 +2,29 @@ Using a combination of a 6522 along with some integrated circuits, the VIA Cuda The usual offset for a VIA Cuda is IOBase (ex.: 0xF3000000 for Power Mac G3 Beige) + 0x16000. The registers are spaced out by 0x200 bytes on the Heathrow. +# Registers + +Within the emulated CUDA, these registers are spaced apart by 0x200 bytes. Apple themselves recommended avoiding the usage of Handshake Data A. + +| Register Name |Abbreviation| Offset | +|:-------------------------:|:----------:|:------:| +| Data B | ORB | 0x0 | +| Handshake Data A | ORA(H) | 0x1 | +| Data Direction B | DIRB | 0x2 | +| Data Direction A | DIRA | 0x3 | +| Timer 1 Counter Low | T1C | 0x4 | +| Timer 1 Counter High | T1CH | 0x5 | +| Timer 1 Latch Low | T1L | 0x6 | +| Timer 1 Latch High | T1LH | 0x7 | +| Timer 2 Counter Low | T2C | 0x8 | +| Timer 2 Counter High | T2CH | 0x9 | +| Shift | SR | 0xA | +| Auxiliary Control | ACR | 0xB | +| Peripheral Control | PCR | 0xC | +| Interrupt Flag | IFE | 0xD | +| Interrupt Enable | IER | 0xE | +| Data A | ORA | 0xF | + # Usage The VIA Cuda is emulated in all Power Macs through an interrupt controller. Early Power Macs also used the Parameter RAM.