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CPU clean-up
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a59475af1c
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@ -184,9 +184,7 @@ extern uint32_t reg_a;
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extern uint32_t reg_b;
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extern uint32_t reg_c;
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extern uint32_t uimm;
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extern uint32_t ppc_to;
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extern int32_t simm;
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extern int32_t adr_li;
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// Used for GP calcs
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extern uint32_t ppc_result_a;
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@ -130,8 +130,8 @@ static BATResult mpc601_block_address_translation(uint32_t la)
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template <const BATType type>
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static BATResult ppc_block_address_translation(uint32_t la)
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{
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uint32_t pa; // translated physical address
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uint8_t prot; // protection bits for the translated address
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uint32_t pa = 0; // translated physical address
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uint8_t prot = 0; // protection bits for the translated address
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PPC_BAT_entry *bat_array;
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bool bat_hit = false;
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@ -34,9 +34,7 @@ uint32_t reg_a;
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uint32_t reg_b;
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uint32_t reg_c; // used only for floating point multiplication operations
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uint32_t uimm;
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uint32_t ppc_to;
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int32_t simm;
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int32_t adr_li;
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// Used for GP calcs
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uint32_t ppc_result_a = 0;
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@ -62,27 +60,27 @@ void ppc_store_result_rega() {
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void ppc_grab_regsdasimm() {
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reg_d = (ppc_cur_instruction >> 21) & 31;
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reg_a = (ppc_cur_instruction >> 16) & 31;
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simm = (int32_t)((int16_t)((ppc_cur_instruction)&65535));
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simm = int32_t(int16_t(ppc_cur_instruction & 0xFFFFUL));
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ppc_result_a = ppc_state.gpr[reg_a];
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}
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inline void ppc_grab_regsdauimm() {
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reg_d = (ppc_cur_instruction >> 21) & 31;
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reg_a = (ppc_cur_instruction >> 16) & 31;
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uimm = (uint32_t)((uint16_t)((ppc_cur_instruction)&65535));
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uimm = ppc_cur_instruction & 0xFFFFUL;
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ppc_result_a = ppc_state.gpr[reg_a];
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}
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inline void ppc_grab_regsasimm() {
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reg_a = (ppc_cur_instruction >> 16) & 31;
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simm = (int32_t)((int16_t)(ppc_cur_instruction & 65535));
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simm = int32_t(int16_t(ppc_cur_instruction & 0xFFFFUL));
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ppc_result_a = ppc_state.gpr[reg_a];
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}
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inline void ppc_grab_regssauimm() {
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reg_s = (ppc_cur_instruction >> 21) & 31;
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reg_a = (ppc_cur_instruction >> 16) & 31;
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uimm = (uint32_t)((uint16_t)((ppc_cur_instruction)&65535));
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uimm = ppc_cur_instruction & 0xFFFFUL;
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ppc_result_d = ppc_state.gpr[reg_s];
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ppc_result_a = ppc_state.gpr[reg_a];
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}
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@ -1087,8 +1085,7 @@ void dppc_interpreter::ppc_mcrxr() {
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void dppc_interpreter::ppc_extsb() {
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ppc_grab_regssa();
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ppc_result_d = ppc_result_d & 0xFF;
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ppc_result_a = (ppc_result_d < 0x80) ? (ppc_result_d & 0x000000FF)
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: (0xFFFFFF00UL | (ppc_result_d & 0x000000FF));
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ppc_result_a = (int32_t(int8_t(ppc_result_d)));
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if (rc_flag)
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ppc_changecrf0(ppc_result_a);
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@ -1099,8 +1096,7 @@ void dppc_interpreter::ppc_extsb() {
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void dppc_interpreter::ppc_extsh() {
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ppc_grab_regssa();
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ppc_result_d = ppc_result_d & 0xFFFF;
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ppc_result_a = (ppc_result_d < 0x8000) ? (ppc_result_d & 0x0000FFFF)
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: (0xFFFF0000UL | (ppc_result_d & 0x0000FFFF));
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ppc_result_a = (int32_t(int16_t(ppc_result_d)));
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if (rc_flag)
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ppc_changecrf0(ppc_result_a);
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@ -1114,30 +1110,30 @@ void dppc_interpreter::ppc_extsh() {
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void dppc_interpreter::ppc_b() {
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uint32_t quick_test = (ppc_cur_instruction & 0x03FFFFFC);
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adr_li = (quick_test < 0x2000000) ? quick_test : (0xFC000000UL + quick_test);
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uint32_t quick_test = (ppc_cur_instruction & 0x03FFFFFCUL);
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int32_t adr_li = (quick_test < 0x2000000UL) ? quick_test : (0xFC000000UL + quick_test);
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ppc_next_instruction_address = (uint32_t)(ppc_state.pc + adr_li);
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exec_flags = EXEF_BRANCH;
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}
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void dppc_interpreter::ppc_bl() {
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uint32_t quick_test = (ppc_cur_instruction & 0x03FFFFFC);
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adr_li = (quick_test < 0x2000000) ? quick_test : (0xFC000000UL + quick_test);
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uint32_t quick_test = (ppc_cur_instruction & 0x03FFFFFCUL);
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int32_t adr_li = (quick_test < 0x2000000UL) ? quick_test : (0xFC000000UL + quick_test);
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ppc_next_instruction_address = (uint32_t)(ppc_state.pc + adr_li);
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ppc_state.spr[SPR::LR] = (uint32_t)(ppc_state.pc + 4);
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exec_flags = EXEF_BRANCH;
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}
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void dppc_interpreter::ppc_ba() {
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uint32_t quick_test = (ppc_cur_instruction & 0x03FFFFFC);
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adr_li = (quick_test < 0x2000000) ? quick_test : (0xFC000000UL + quick_test);
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uint32_t quick_test = (ppc_cur_instruction & 0x03FFFFFCUL);
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int32_t adr_li = (quick_test < 0x2000000UL) ? quick_test : (0xFC000000UL + quick_test);
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ppc_next_instruction_address = adr_li;
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exec_flags = EXEF_BRANCH;
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}
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void dppc_interpreter::ppc_bla() {
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uint32_t quick_test = (ppc_cur_instruction & 0x03FFFFFC);
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adr_li = (quick_test < 0x2000000) ? quick_test : (0xFC000000UL + quick_test);
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uint32_t quick_test = (ppc_cur_instruction & 0x03FFFFFCUL);
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int32_t adr_li = (quick_test < 0x2000000UL) ? quick_test : (0xFC000000UL + quick_test);
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ppc_next_instruction_address = adr_li;
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ppc_state.spr[SPR::LR] = ppc_state.pc + 4;
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exec_flags = EXEF_BRANCH;
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@ -1486,7 +1482,7 @@ void dppc_interpreter::ppc_sc() {
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void dppc_interpreter::ppc_tw() {
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reg_a = (ppc_cur_instruction >> 11) & 31;
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reg_b = (ppc_cur_instruction >> 16) & 31;
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ppc_to = (ppc_cur_instruction >> 21) & 31;
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uint32_t ppc_to = (ppc_cur_instruction >> 21) & 31;
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if ((((int32_t)ppc_state.gpr[reg_a] < (int32_t)ppc_state.gpr[reg_b]) && (ppc_to & 0x10)) ||
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(((int32_t)ppc_state.gpr[reg_a] > (int32_t)ppc_state.gpr[reg_b]) && (ppc_to & 0x08)) ||
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(((int32_t)ppc_state.gpr[reg_a] == (int32_t)ppc_state.gpr[reg_b]) && (ppc_to & 0x04)) ||
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@ -1499,7 +1495,7 @@ void dppc_interpreter::ppc_tw() {
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void dppc_interpreter::ppc_twi() {
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simm = (int32_t)((int16_t)((ppc_cur_instruction)&0xFFFF));
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reg_a = (ppc_cur_instruction >> 16) & 0x1F;
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ppc_to = (ppc_cur_instruction >> 21) & 0x1F;
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uint32_t ppc_to = (ppc_cur_instruction >> 21) & 0x1F;
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if ((((int32_t)ppc_state.gpr[reg_a] < simm) && (ppc_to & 0x10)) ||
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(((int32_t)ppc_state.gpr[reg_a] > simm) && (ppc_to & 0x08)) ||
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(((int32_t)ppc_state.gpr[reg_a] == simm) && (ppc_to & 0x04)) ||
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@ -2034,14 +2030,14 @@ void dppc_interpreter::ppc_lwzux() {
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ppc_grab_regsdab();
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if ((reg_a != reg_d) || reg_a != 0) {
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ppc_effective_address = ppc_result_a + ppc_result_b;
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// ppc_result_d = mem_grab_dword(ppc_effective_address);
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ppc_result_d = mmu_read_vmem<uint32_t>(ppc_effective_address);
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ppc_result_a = ppc_effective_address;
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ppc_store_result_regd();
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ppc_store_result_rega();
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} else {
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ppc_exception_handler(Except_Type::EXC_PROGRAM, Exc_Cause::ILLEGAL_OP);
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}
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//ppc_result_d = mem_grab_dword(ppc_effective_address);
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ppc_result_d = mmu_read_vmem<uint32_t>(ppc_effective_address);
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ppc_result_a = ppc_effective_address;
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ppc_store_result_regd();
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ppc_store_result_rega();
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}
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void dppc_interpreter::ppc_lwarx() {
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@ -2063,14 +2059,19 @@ void dppc_interpreter::ppc_lmw() {
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#endif
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ppc_grab_regsda();
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ppc_effective_address = (int32_t)((int16_t)(ppc_cur_instruction & 0xFFFF));
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ppc_effective_address += (reg_a > 0) ? ppc_result_a : 0;
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// How many words to load in memory - using a do-while for this
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do {
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//ppc_state.gpr[reg_d] = mem_grab_dword(ppc_effective_address);
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ppc_state.gpr[reg_d] = mmu_read_vmem<uint32_t>(ppc_effective_address);
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ppc_effective_address += 4;
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reg_d++;
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} while (reg_d < 32);
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if ((reg_d > reg_a) || reg_a != 0) {
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ppc_effective_address += (reg_a > 0) ? ppc_result_a : 0;
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// How many words to load in memory - using a do-while for this
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do {
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// ppc_state.gpr[reg_d] = mem_grab_dword(ppc_effective_address);
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ppc_state.gpr[reg_d] = mmu_read_vmem<uint32_t>(ppc_effective_address);
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ppc_effective_address += 4;
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reg_d++;
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} while (reg_d < 32);
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}
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else {
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ppc_exception_handler(Except_Type::EXC_PROGRAM, Exc_Cause::ILLEGAL_OP);
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}
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}
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void dppc_interpreter::ppc_lswi() {
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@ -2116,7 +2117,8 @@ void dppc_interpreter::ppc_lswx() {
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ppc_grab_regsdab();
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// Invalid instruction forms
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if ((reg_d | reg_a) == 0 || (reg_d == reg_a) || (reg_d == reg_b)) {
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if ((reg_d == 0 && reg_a == 0) || (reg_d == reg_a) || (reg_d == reg_b) || \
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(reg_d <= reg_b) || (reg_d <= reg_a)) {
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ppc_exception_handler(Except_Type::EXC_PROGRAM, Exc_Cause::ILLEGAL_OP);
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}
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@ -182,7 +182,7 @@ static void read_test_float_data() {
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uint32_t opcode, src1, src2, check_cr, check_fpscr;
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uint64_t dest_64;
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//float sfp_dest, sfp_src1, sfp_src2, sfp_src3;
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double dfp_dest, dfp_src1, dfp_src2, dfp_src3;
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double dfp_src1, dfp_src2, dfp_src3;
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string rounding_mode;
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ifstream tf2stream("ppcfloattests.csv");
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@ -218,7 +218,6 @@ static void read_test_float_data() {
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src2 = 0;
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check_cr = 0;
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check_fpscr = 0;
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dfp_dest = 0.0;
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dfp_src1 = 0.0;
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dfp_src2 = 0.0;
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dfp_src3 = 0.0;
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