From aa5ef742f68127c6222ed8f087d76fdadd1dde05 Mon Sep 17 00:00:00 2001 From: Maxim Poliakovski Date: Mon, 9 Oct 2023 19:18:55 +0200 Subject: [PATCH] atirage: return meaningful value for GUI_STAT:GUI_FIFO. --- devices/video/atirage.cpp | 5 +++++ devices/video/atirage.h | 2 ++ 2 files changed, 7 insertions(+) diff --git a/devices/video/atirage.cpp b/devices/video/atirage.cpp index 462176f..4ab00d2 100644 --- a/devices/video/atirage.cpp +++ b/devices/video/atirage.cpp @@ -106,9 +106,11 @@ ATIRage::ATIRage(uint16_t dev_id) switch (dev_id) { case ATI_RAGE_GT_DEV_ID: asic_id = 0x9A; // GT-B2U3 fabricated by UMC + this->cmd_fifo_size = 48; break; case ATI_RAGE_PRO_DEV_ID: asic_id = 0x5C; // R3B/D/P-A4 fabricated by UMC + this->cmd_fifo_size = 128; break; default: asic_id = 0xDD; @@ -244,6 +246,9 @@ uint32_t ATIRage::read_reg(uint32_t reg_offset, uint32_t size) { } } break; + case ATI_GUI_STAT: + result = this->cmd_fifo_size << 16; // HACK: tell the guest the command FIFO is empty + break; default: result = this->regs[reg_offset >> 2]; } diff --git a/devices/video/atirage.h b/devices/video/atirage.h index 7c36abe..578c3b2 100644 --- a/devices/video/atirage.h +++ b/devices/video/atirage.h @@ -84,6 +84,8 @@ private: uint32_t regs[512] = {}; // internal registers uint8_t plls[64] = {}; // internal PLL registers + uint8_t cmd_fifo_size = 0; + // Video RAM variables std::unique_ptr vram_ptr; uint32_t vram_size;