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grandcentral: fix interrupt processing.

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This commit is contained in:
Maxim Poliakovski 2022-08-24 14:02:44 +02:00
parent 293c5a40f3
commit bb77b2d525
2 changed files with 15 additions and 5 deletions
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13
devices/ioctrl/grandcentral.cpp
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@ -240,7 +240,10 @@ void GrandCentral::write(uint32_t rgn_start, uint32_t offset, uint32_t value, in
break;
case MIO_INT_CLEAR1:
if (value & MACIO_INT_CLR) {
this->int_events = 0;
this->int_events = 0;
this->cpu_int_latch = false;
ppc_release_int();
LOG_F(5, "GC: CPU INT latch cleared");
} else {
this->int_events &= BYTESWAP_32(value);
}
@ -293,7 +296,13 @@ void GrandCentral::ack_int(uint32_t irq_id, uint8_t irq_line_state)
}
// signal CPU interrupt
if (this->int_events) {
ppc_ext_int();
if (!this->cpu_int_latch) {
this->cpu_int_latch = true;
ppc_assert_int();
LOG_F(5, "GC: CPU INT asserted, source: %d", irq_id);
} else {
LOG_F(5, "GC: CPU INT already latched");
}
}
} else {
ABORT_F("GC: native interrupt mode not implemented");

7
devices/ioctrl/macio.h
View File

@ -120,9 +120,10 @@ private:
uint8_t emmo_pin; // factory tester status, active low
// interrupt state
uint32_t int_mask = 0;
uint32_t int_levels = 0;
uint32_t int_events = 0;
uint32_t int_mask = 0;
uint32_t int_levels = 0;
uint32_t int_events = 0;
bool cpu_int_latch = false;
uint32_t nvram_addr_hi;