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Sc53C94: improve status register.

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This commit is contained in:
Maxim Poliakovski 2022-11-01 02:11:06 +01:00
parent 8abefb8f8d
commit c54c1cdb65
2 changed files with 9 additions and 2 deletions
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5
devices/common/scsi/sc53c94.cpp
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@ -168,6 +168,7 @@ uint16_t Sc53C94::pseudo_dma_read()
this->xfer_count -= 2;
if (!this->xfer_count) {
is_done = true;
this->status |= STAT_TC; // signal zero transfer count
this->cur_state = SeqState::XFER_END;
this->sequencer();
}
@ -206,7 +207,7 @@ void Sc53C94::update_command_reg(uint8_t cmd)
}
} else {
LOG_F(ERROR, "SC53C94: the top of the command FIFO overwritten!");
this->status |= 0x40; // signal IOE/Gross Error
this->status |= STAT_GE; // signal IOE/Gross Error
}
}
@ -312,7 +313,7 @@ void Sc53C94::fifo_push(const uint8_t data)
this->data_fifo[this->data_fifo_pos++] = data;
} else {
LOG_F(ERROR, "SC53C94: data FIFO overflow!");
this->status |= 0x40; // signal IOE/Gross Error
this->status |= STAT_GE; // signal IOE/Gross Error
}
}

6
devices/common/scsi/sc53c94.h
View File

@ -90,6 +90,12 @@ enum {
CMD_ENA_SEL_RESEL = 0x44,
};
/** Status register bits. **/
enum {
STAT_TC = 1 << 4, // Terminal count (NCR) / count to zero (AMD)
STAT_GE = 1 << 6, // Gross Error (NCR) / Illegal Operation Error (AMD)
};
/** Interrupt status register bits. */
enum {
INTSTAT_SRST = 0x80, // bus reset